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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-20 10:35:35 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-20 13:52:14 +0200 |
| commit | 99648958668d3a33ee57974479b36201fe303f34 (patch) | |
| tree | 6f27ea790e2823c6156e71219a4f54680263fac6 /bsps/powerpc/qoriq/start/mmu-tlb1.S | |
| parent | bsps: Move start files to bsps (diff) | |
| download | rtems-99648958668d3a33ee57974479b36201fe303f34.tar.bz2 | |
bsps: Move startup files to bsps
Adjust build support files to new directory layout.
This patch is a part of the BSP source reorganization.
Update #3285.
Diffstat (limited to 'bsps/powerpc/qoriq/start/mmu-tlb1.S')
| -rw-r--r-- | bsps/powerpc/qoriq/start/mmu-tlb1.S | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/bsps/powerpc/qoriq/start/mmu-tlb1.S b/bsps/powerpc/qoriq/start/mmu-tlb1.S new file mode 100644 index 0000000000..2dd06e2ed8 --- /dev/null +++ b/bsps/powerpc/qoriq/start/mmu-tlb1.S @@ -0,0 +1,107 @@ +/** + * @file + * + * @ingroup QorIQMMU + * + * @brief qoriq_tlb1_write() and qoriq_tlb1_invalidate() implementation. + */ + +/* + * Copyright (c) 2011, 2017 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <rtems@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include <bspopts.h> + +#include <libcpu/powerpc-utility.h> + + .global qoriq_tlb1_write + .global qoriq_tlb1_invalidate + .global qoriq_tlb1_invalidate_all_by_ts + + .section ".bsp_start_text", "ax" + +qoriq_tlb1_write: + rlwinm r3, r3, 16, 10, 15 +#ifdef __powerpc64__ + rldicr r8, r8, 0, 51 +#else + rlwinm r8, r8, 0, 0, 19 +#endif + oris r3, r3, 0x1000 + mtspr FSL_EIS_MAS0, r3 + oris r4, r4, 0xc000 + rlwinm r9, r9, 8, 20, 23 + or r9, r4, r9 + mtspr FSL_EIS_MAS1, r9 + or r5, r8, r5 + mtspr FSL_EIS_MAS2, r5 + or r6, r8, r6 + mtspr FSL_EIS_MAS3, r6 +#ifdef __powerpc64__ + srdi r8, r8, 32 + or r7, r7, r8 + mtspr FSL_EIS_MAS7, r7 +#endif + mtspr FSL_EIS_MAS7, r7 +#if defined(QORIQ_HAS_HYPERVISOR_MODE) && !defined(QORIQ_IS_HYPERVISOR_GUEST) + li r0, 0 + mtspr FSL_EIS_MAS8, r0 +#endif + isync + msync + tlbwe + isync + blr + +qoriq_tlb1_invalidate: + rlwinm r3, r3, 16, 10, 15 + oris r3, r3, 0x1000 + mtspr FSL_EIS_MAS0, r3 + li r0, 0 + mtspr FSL_EIS_MAS1, r0 + mtspr FSL_EIS_MAS2, r0 + mtspr FSL_EIS_MAS3, r0 + mtspr FSL_EIS_MAS7, r0 +#if defined(QORIQ_HAS_HYPERVISOR_MODE) && !defined(QORIQ_IS_HYPERVISOR_GUEST) + mtspr FSL_EIS_MAS8, r0 +#endif + isync + msync + tlbwe + isync + blr + +/* r3 = 0 for TS0, 1 for TS1 */ +qoriq_tlb1_invalidate_all_by_ts: + mflr r12 + li r11, QORIQ_TLB1_ENTRY_COUNT + mtctr r11 + li r11, 0 + mr r10, r3 + +2: + rlwinm r0, r11, 16, 10, 15 + oris r0, r0, (FSL_EIS_MAS0_TLBSEL >> 16) + mtspr FSL_EIS_MAS0, r0 + tlbre + mfspr r0, FSL_EIS_MAS1 + rlwinm r0, r0, 20, 31, 31 + cmpw r0, r10 + bne 1f + mr r3, r11 + bl qoriq_tlb1_invalidate +1: + addi r11, r11, 1 + bdnz 2b + mtlr r12 + blr |