bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

4 files changed, 601 insertions, 0 deletions

diff --git a/bsps/powerpc/mpc8260ads/start/bsp_specs b/bsps/powerpc/mpc8260ads/start/bsp_specs
new file mode 100644
index 0000000000..2625609327
--- /dev/null
+++ b/bsps/powerpc/mpc8260ads/start/bsp_specs
@@ -0,0 +1,9 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s}}
+
+*endfile:
+%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s ecrtn.o%s}
diff --git a/bsps/powerpc/mpc8260ads/start/bspstart.c b/bsps/powerpc/mpc8260ads/start/bspstart.c
new file mode 100644
index 0000000000..44ec072775
--- /dev/null
+++ b/bsps/powerpc/mpc8260ads/start/bspstart.c
@@ -0,0 +1,191 @@
+/*
+ *  This routine does the bulk of the system initialization.
+ */
+
+/*
+ *  The MPC860 specific stuff was written by Jay Monkman (jmonkman@frasca.com)
+ *
+ *  Modified for the MPC8260ADS board by Andy Dachs <a.dachs@sstl.co.uk>
+ *  Surrey Satellite Technology Limited, 2001
+ *  A 40MHz system clock is assumed.
+ *  The PON. RST.CONF. Dip switches (DS1) are
+ *  1 - Off
+ *  2 - On
+ *  3 - Off
+ *  4 - On
+ *  5 - Off
+ *  6 - Off
+ *  7 - Off
+ *  8 - Off
+ *  Dip switches on DS2 and DS3 are all set to ON
+ *  The LEDs on the board are used to signal panic and fatal_error
+ *  conditions.
+ *  The mmu is unused at this time.
+ *
+ *  COPYRIGHT (c) 1989-2007.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/bootcard.h>
+
+/*
+#include <mmu.h>
+*/
+
+#include <mpc8260.h>
+#include <rtems/score/thread.h>
+#include <rtems/powerpc/powerpc.h>
+
+#include <rtems/bspIo.h>
+#include <rtems/counter.h>
+#include <bsp/irq.h>
+#include <libcpu/cpuIdent.h>
+#include <libcpu/spr.h>
+
+#include <string.h>
+
+#define UART1_E	0x02000002		/* bit 6 of BCSR1 */
+#define UART2_E	0x01000001		/* bit 7 of BCSR1 */
+
+#define GP0_LED 0x02000002    /*  bit 6 of BCSR0 */
+#define GP1_LED 0x01000001    /*  bit 7 of BCSR0 */
+
+SPR_RW(SPRG1)
+
+/*
+ *  Driver configuration parameters
+ */
+uint32_t   bsp_clock_speed;
+uint32_t   bsp_time_base_frequency;
+uint32_t   bsp_clicks_per_usec;
+uint32_t   bsp_serial_per_sec;	       /* Serial clocks per second */
+bool       bsp_serial_external_clock;
+bool       bsp_serial_xon_xoff;
+bool       bsp_serial_cts_rts;
+uint32_t   bsp_serial_rate;
+
+extern char IntrStack_start [];
+extern char intrStack [];
+
+static void _BSP_GPLED0_on(void)
+{
+  BCSR *csr;
+  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
+  csr->bcsr0 &=  ~GP0_LED;		/* Turn on GP0 LED */
+}
+
+static void _BSP_GPLED0_off(void)
+{
+  BCSR *csr;
+  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
+  csr->bcsr0 |=  GP0_LED;		/* Turn off GP0 LED */
+}
+
+static void _BSP_GPLED1_on(void)
+{
+  BCSR *csr;
+  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
+  csr->bcsr0 &=  ~GP1_LED;		/* Turn on GP1 LED */
+}
+
+static void _BSP_GPLED1_off(void)
+{
+  BCSR *csr;
+  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
+  csr->bcsr0 |=  GP1_LED;		/* Turn off GP1 LED */
+}
+
+static void _BSP_Uart1_enable(void)
+{
+  BCSR *csr;
+  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
+  csr->bcsr1 &= ~UART1_E;		/* Enable Uart1 */
+}
+
+static void _BSP_Uart2_enable(void)
+{
+  BCSR *csr;
+  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
+  csr->bcsr1 &= ~UART2_E;		/* Enable Uart2 */
+}
+
+void bsp_start(void)
+{
+  /* Set MPC8260ADS board LEDS and Uart enable lines */
+  _BSP_GPLED0_off();
+  _BSP_GPLED1_off();
+  _BSP_Uart1_enable();
+  _BSP_Uart2_enable();
+
+  /*
+   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
+   * function stores the result in global variables so that it can be used
+   * later...
+   */
+  get_ppc_cpu_type();
+  get_ppc_cpu_revision();
+
+  cpu_init();
+
+/*
+  mmu_init();
+*/
+
+  /* Initialize exception handler */
+  /* FIXME: Interrupt stack begin and size */
+  ppc_exc_initialize(
+    (uintptr_t) IntrStack_start,
+    (uintptr_t) intrStack - (uintptr_t) IntrStack_start
+  );
+
+  /* Initalize interrupt support */
+  bsp_interrupt_initialize();
+
+/*
+  mmu_init();
+*/
+
+  /*
+   * Enable instruction and data caches. Do not force writethrough mode.
+   */
+#if BSP_INSTRUCTION_CACHE_ENABLED
+  rtems_cache_enable_instruction();
+#endif
+#if BSP_DATA_CACHE_ENABLED
+  rtems_cache_enable_data();
+#endif
+
+  /*
+   *  initialize the device driver parameters
+   */
+  bsp_time_base_frequency    = 10000000;
+  bsp_clicks_per_usec 	     = 10;  /* for 40MHz extclk */
+  bsp_serial_per_sec  	     = 40000000;
+  bsp_serial_external_clock  = 0;
+  bsp_serial_xon_xoff 	     = 0;
+  bsp_serial_cts_rts 	     = 0;
+  bsp_serial_rate 	     = 9600;
+  bsp_clock_speed 	   = 40000000;
+  rtems_counter_initialize_converter(bsp_clock_speed);
+
+#ifdef REV_0_2
+  /* set up some board specific registers */
+  m8260.siumcr &= 0xF3FFFFFF;		/* set TBEN ** BUG FIX ** */
+  m8260.siumcr |= 0x08000000;
+#endif
+
+  /* use BRG1 to generate 32kHz timebase */
+/*
+  m8260.brgc1 = M8260_BRG_EN + (uint32_t)(((uint16_t)((40016384)/(32768)) - 1) << 1) + 0;
+*/
+
+#ifdef SHOW_MORE_INIT_SETTINGS
+  printk("Exit from bspstart\n");
+#endif
+
+}
diff --git a/bsps/powerpc/mpc8260ads/start/cpuinit.c b/bsps/powerpc/mpc8260ads/start/cpuinit.c
new file mode 100644
index 0000000000..c56ec69362
--- /dev/null
+++ b/bsps/powerpc/mpc8260ads/start/cpuinit.c
@@ -0,0 +1,49 @@
+/*
+ *  cpuinit.c - this file contains functions for initializing the CPU
+ *
+ *  Written by Jay Monkman (jmonkman@frasca.com)
+ */
+
+#include <bsp.h>
+
+/* Macros for handling all the MMU SPRs */
+#define PUT_IC_CST(r)   __asm__ volatile ("mtspr 0x230,%0\n" ::"r"(r))
+#define GET_IC_CST(r)   __asm__ volatile ("mfspr %0,0x230\n" :"=r"(r))
+#define PUT_DC_CST(r)   __asm__ volatile ("mtspr 0x238,%0\n" ::"r"(r))
+#define GET_DC_CST(r)   __asm__ volatile ("mfspr %0,0x238\n" :"=r"(r))
+
+void cpu_init(void)
+{
+  /* BRGCLK is VCO_OUT/4 */
+/*
+  m8260.sccr = 0;
+*/
+
+#if 0
+  register unsigned long t1, t2;
+
+  /* Let's clear MSR[IR] and MSR[DR] */
+  t2 = PPC_MSR_IR | PPC_MSR_DR;
+  __asm__ volatile (
+    "mfmsr    %0\n"
+    "andc     %0, %0, %1\n"
+    "mtmsr    %0\n" :"=r"(t1), "=r"(t2):
+    "1"(t2));
+
+  t1 = M8xx_CACHE_CMD_UNLOCK;
+  /*  PUT_DC_CST(t1); */
+  PUT_IC_CST(t1);
+
+  t1 = M8xx_CACHE_CMD_INVALIDATE;
+  /*  PUT_DC_CST(t1); */
+  PUT_IC_CST(t1);
+
+  t1 = M8xx_CACHE_CMD_ENABLE;
+  PUT_IC_CST(t1);
+
+  t1 = M8xx_CACHE_CMD_SFWT;
+  /*  PUT_DC_CST(t1); */
+  t1 = M8xx_CACHE_CMD_ENABLE;
+  /*  PUT_DC_CST(t1);*/
+#endif
+}
diff --git a/bsps/powerpc/mpc8260ads/start/linkcmds b/bsps/powerpc/mpc8260ads/start/linkcmds
new file mode 100644
index 0000000000..f3092b862d
--- /dev/null
+++ b/bsps/powerpc/mpc8260ads/start/linkcmds
@@ -0,0 +1,352 @@
+/*
+ *  This file contains directives for the GNU linker which are specific
+ *  to the MPC8260ADS Board
+ */
+
+OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
+              "elf32-powerpc")
+OUTPUT_ARCH(powerpc)
+
+ENTRY(start)
+STARTUP(start.o)
+EXTERN(__vectors)
+
+/*
+ * Declare some sizes.
+ * XXX: The assignment of ". += XyzSize;" fails in older gld's if the
+ *      number used there is not constant.  If this happens to you, edit
+ *      the lines marked XXX below to use a constant value.
+ */
+StackSize   = DEFINED(StackSize) ? StackSize : 0x8000;
+RamBase     = DEFINED(RamBase) ? RamBase : 0x0;
+RamSize     = DEFINED(RamSize) ? RamDiskSize : 0x0800000; /* 8M program ram */
+HeapSize    = DEFINED(HeapSize) ? HeapSize : 0x0;
+RamDiskBase = DEFINED(RamDiskBase) ? RamDiskBase : 0x0800000;
+RamDiskSize = DEFINED(RamDiskSize) ? RamDiskSize : 0x0800000; /* 8M ram disk */
+
+MEMORY
+{
+  ram : org = 0x0, l = 8M
+  ramdisk : org = 0x0800000, l = 8M
+  dpram : org = 0x04700000, l = 128K
+  flash : org = 0xff800000, l = 8M
+}
+
+
+SECTIONS
+{
+    /*
+     * The stack will live in this area - between the vectors and
+     * the text section.
+     */
+
+    .text 0x10000:
+    {
+    _textbase = .;
+
+
+    text.start = .;
+
+    /* Entry point is the .entry section */
+    *(.entry)
+    *(.entry2)
+
+    /* Actual Code */
+    *(.text*)
+
+
+    *(.rodata*)
+    *(.rodata1)
+
+
+    /*
+     * Special FreeBSD sysctl sections.
+     */
+    . = ALIGN (16);
+    __start_set_sysctl_set = .;
+    *(set_sysctl_*);
+    __stop_set_sysctl_set = ABSOLUTE(.);
+    *(set_domain_*);
+    *(set_pseudo_*);
+
+    /* C++ constructors/destructors */
+    *(.gnu.linkonce.t*)
+
+    /*  Initialization and finalization code.
+     *
+     *  Various files can provide initialization and finalization functions.
+     *  The bodies of these functions are in .init and .fini sections. We
+     *  accumulate the bodies here, and prepend function prologues from
+     *  ecrti.o and function epilogues from ecrtn.o. ecrti.o must be linked
+     *  first; ecrtn.o must be linked last. Because these are wildcards, it
+     *  doesn't matter if the user does not actually link against ecrti.o and
+     *  ecrtn.o; the linker won't look for a file to match a wildcard.  The
+     *  wildcard also means that it doesn't matter which directory ecrti.o
+     *  and ecrtn.o are in.
+     */
+    PROVIDE (_init = .);
+    *ecrti.o(.init)
+    *(.init)
+    *ecrtn.o(.init)
+
+    PROVIDE (_fini = .);
+    *ecrti.o(.fini)
+    *(.fini)
+    *ecrtn.o(.init)
+
+    /*
+     *  C++ constructors and destructors for static objects.
+     *  PowerPC EABI does not use crtstuff yet, so we build "old-style"
+     *  constructor and destructor lists that begin with the list length
+     *  end terminate with a NULL entry.
+     */
+
+    PROVIDE (__CTOR_LIST__ = .);	
+    /* LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) */
+    *crtbegin.o(.ctors)
+    *(.ctors)
+    *crtend.o(.ctors)
+    LONG(0)
+    PROVIDE (__CTOR_END__ = .);
+
+    PROVIDE (__DTOR_LIST__ = .);
+    /* LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) */
+    *crtbegin.o(.dtors)
+    *(.dtors)
+    *crtend.o(.dtors)
+    LONG(0)
+    PROVIDE (__DTOR_END__ = .);
+
+    /* Exception frame info */
+    *(.eh_frame)
+
+    /* Miscellaneous read-only data */
+    _rodata_start = . ;
+    *(.gnu.linkonce.r*)
+    *(.lit)
+    *(.shdata)
+    *(.rodata)
+    *(.rodata1)
+    KEEP (*(SORT(.rtemsroset.*)))
+    *(.descriptors)
+    *(rom_ver)
+    _erodata = .;
+
+
+    /* Various possible names for the end of the .text section */
+    etext = ALIGN(0x10);
+    _etext = .;
+    _endtext = .;
+    text.end = .;
+    PROVIDE (etext = .);
+    PROVIDE (__etext = .);
+
+    } > ram
+
+  .tdata : {
+    _TLS_Data_begin = .;
+    *(.tdata .tdata.* .gnu.linkonce.td.*)
+    _TLS_Data_end = .;
+  } >ram
+
+  .tbss : {
+    _TLS_BSS_begin = .;
+    *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
+    _TLS_BSS_end = .;
+  } >ram
+
+  _TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
+  _TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
+  _TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
+  _TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
+  _TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
+  _TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
+
+
+  .rel.dyn        :
+    {
+      *(.rel.init)
+      *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
+      *(.rel.fini)
+      *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
+      *(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*)
+      *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
+      *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
+      *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
+      *(.rel.ctors)
+      *(.rel.dtors)
+      *(.rel.got)
+      *(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*)
+      *(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*)
+      *(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*)
+      *(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*)
+      *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
+    } >ram
+  .rela.dyn       :
+    {
+      *(.rela.init)
+      *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
+      *(.rela.fini)
+      *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
+      *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
+      *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
+      *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
+      *(.rela.ctors)
+      *(.rela.dtors)
+      *(.rela.got)
+      *(.rela.got1)
+      *(.rela.got2)
+      *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*)
+      *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*)
+      *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*)
+      *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*)
+      *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
+    } >ram
+  .rel.plt        : { *(.rel.plt) }
+  .rela.plt       : { *(.rela.plt) }
+
+    PROVIDE (__EXCEPT_START__ = .);
+    .gcc_except_table   : { *(.gcc_except_table*) } >ram
+    PROVIDE (__EXCEPT_END__ = .);
+    __GOT_START__ = .;
+    .got :
+    {
+      s.got = .;
+      *(.got.plt) *(.got)
+    } > ram
+    __GOT_END__ = .;
+
+    .got1		  : { *(.got1) 		} >ram
+    PROVIDE (__GOT2_START__ = .);
+    PROVIDE (_GOT2_START_ = .);
+    .got2		  :  { *(.got2) 	} >ram
+    PROVIDE (__GOT2_END__ = .);
+    PROVIDE (_GOT2_END_ = .);
+
+    PROVIDE (__FIXUP_START__ = .);
+    PROVIDE (_FIXUP_START_ = .);
+    .fixup	  : { *(.fixup) 	} >ram
+    PROVIDE (_FIXUP_END_ = .);
+    PROVIDE (__FIXUP_END__ = .);
+  
+    .sdata : {
+      PROVIDE (_SDA_BASE_ = 32768);
+      *(.sdata .sdata.* .gnu.linkonce.s.*)
+    } > ram
+ 
+    .sbss : {
+      __bss_start = .;
+ 
+      PROVIDE (__sbss_start = .); PROVIDE (___sbss_start = .);
+      *(.scommon)
+      *(.dynsbss)
+      *(.sbss .sbss.* .gnu.linkonce.sb.*)
+      PROVIDE (__sbss_end = .); PROVIDE (___sbss_end = .);
+    } > ram
+ 
+    .sdata2 : {
+      PROVIDE (_SDA2_BASE_ = 32768);
+ 
+      *(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
+    } > ram =0
+ 
+    .sbss2 : {
+      *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
+    } > ram =0
+
+    .bss :
+    {
+      bss.start = .;
+      *(.bss .bss* .gnu.linkonce.b*)
+      . = ALIGN(4);
+      bss.end = .;
+    } > ram
+
+    /* R/W Data */
+    .data ( . ) :
+    {
+      . = ALIGN (4);
+
+      data.start = .;
+
+      *(.data)
+      *(.data1)
+      *(.data.* .gnu.linkonce.d.*)
+      KEEP (*(SORT(.rtemsrwset.*)))
+      PROVIDE (__SDATA_START__ = .);
+      *(.sdata .sdata.* .gnu.linkonce.s.*)
+      data.end = .;
+    } > ram
+
+    data.size = data.end - data.start;
+    bss.size = bss.end - bss.start;
+    text.size = text.end - text.start;
+
+    PROVIDE(_end = data.end);
+
+    .gzipmalloc : {
+	. = ALIGN (16);
+        _startmalloc = .;
+     } >ram
+
+
+    /*
+     * Interrupt stack setup
+     */
+    IntrStack_start = ALIGN(0x10);
+    . += 0x4000;
+    intrStack = .;
+    PROVIDE(intrStackPtr = intrStack);
+
+
+    clear_end = .;
+
+    WorkAreaBase = .;
+
+    /* Sections for compressed .text and .data         */
+    /* after the .datarom section is an int specifying */
+    /* the length of the following compressed image    */
+    /* Executes once then could get overwritten        */
+    .textrom 0x100000 :
+    {
+    	*(.textrom)
+    	_endloader = .;
+    } > ram
+
+    .datarom :
+    {
+    	_dr_start = .;
+    	*(.datarom)
+    	_dr_end = .;
+    } > ram
+    dr_len = _dr_end - _dr_start;
+
+    .dpram :
+    {
+      m8260 = .;
+      _m8260 = .;
+      . += (128 * 1024);
+     } > dpram
+
+
+     /* the reset vector is at 0xfff00000 which is */
+     /* located at offset 0x400000 from the base   */
+     /* of flash                                   */
+    .bootrom 0xFFF00000 :
+    {
+      *(.bootrom)
+      _endboot = .;
+    } > flash
+
+
+    .line 0 : { *(.line) }
+    .debug 0 : { *(.debug) }
+    .debug_sfnames 0 : { *(.debug_sfnames) }
+    .debug_srcinfo 0 : { *(.debug_srcinfo) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+    .debug_aregion 0 : { *(.debug_aregion) }
+    .debug_macinfo 0 : { *(.debug_macinfo) }
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+}