diff options
author | Chris Johns <chrisj@rtems.org> | 2023-04-24 08:23:14 +1000 |
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committer | Chris Johns <chrisj@rtems.org> | 2023-04-24 09:13:45 +1000 |
commit | 3e4fa73935ca25e7941de72bf4285e229e5fe8b1 (patch) | |
tree | dabeab648ab7ecb6dc0d9de75759f699aef25331 /bsps/powerpc/mpc55xxevb/start/flash_support.c | |
parent | bsps/microblaze: Fix UART transmit interrupt (diff) | |
download | rtems-3e4fa73935ca25e7941de72bf4285e229e5fe8b1.tar.bz2 |
bsps/powerpc: Fix warnings with PPC_SPECIAL_PURPOSE_REGISTER
Diffstat (limited to 'bsps/powerpc/mpc55xxevb/start/flash_support.c')
-rw-r--r-- | bsps/powerpc/mpc55xxevb/start/flash_support.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/bsps/powerpc/mpc55xxevb/start/flash_support.c b/bsps/powerpc/mpc55xxevb/start/flash_support.c index c7382ca4d4..a6dfe119e5 100644 --- a/bsps/powerpc/mpc55xxevb/start/flash_support.c +++ b/bsps/powerpc/mpc55xxevb/start/flash_support.c @@ -297,9 +297,9 @@ addr_map( rtems_interrupt_disable(level); PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS0, mas0); asm volatile("tlbre"); - mas1 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1); - mas2 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS2); - mas3 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mas1); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS2, mas2); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3, mas3); rtems_interrupt_enable(level); if (mas1 & 0x80000000) { @@ -671,7 +671,7 @@ mpc55xx_flash_writable(void) rtems_interrupt_disable(level); PPC_SET_SPECIAL_PURPOSE_REGISTER( FSL_EIS_MAS0, 0x10010000); asm volatile("tlbre"); - mas3 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3, mas3); rtems_interrupt_enable(level); return ((mas3 & 0x0000000C) == 0x0000000C) ? 1 : 0; @@ -689,7 +689,7 @@ mpc55xx_flash_address(void) rtems_interrupt_disable(level); PPC_SET_SPECIAL_PURPOSE_REGISTER( FSL_EIS_MAS0, 0x10010000); asm volatile("tlbre"); - mas2 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS2); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS2, mas2); rtems_interrupt_enable(level); return mas2 & 0xFFFFF000; |