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author | Chris Johns <chrisj@rtems.org> | 2023-04-24 08:23:14 +1000 |
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committer | Chris Johns <chrisj@rtems.org> | 2023-04-24 09:13:45 +1000 |
commit | 3e4fa73935ca25e7941de72bf4285e229e5fe8b1 (patch) | |
tree | dabeab648ab7ecb6dc0d9de75759f699aef25331 /bsps/powerpc/gen83xx/start/cpuinit.c | |
parent | bsps/microblaze: Fix UART transmit interrupt (diff) | |
download | rtems-3e4fa73935ca25e7941de72bf4285e229e5fe8b1.tar.bz2 |
bsps/powerpc: Fix warnings with PPC_SPECIAL_PURPOSE_REGISTER
Diffstat (limited to 'bsps/powerpc/gen83xx/start/cpuinit.c')
-rw-r--r-- | bsps/powerpc/gen83xx/start/cpuinit.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/bsps/powerpc/gen83xx/start/cpuinit.c b/bsps/powerpc/gen83xx/start/cpuinit.c index 1e867bb323..feeda59766 100644 --- a/bsps/powerpc/gen83xx/start/cpuinit.c +++ b/bsps/powerpc/gen83xx/start/cpuinit.c @@ -93,7 +93,7 @@ void cpu_init( void) clear_mmu_regs(); /* Clear caches */ - hid0 = PPC_SPECIAL_PURPOSE_REGISTER(HID0); + PPC_SPECIAL_PURPOSE_REGISTER(HID0, hid0); if ((hid0 & (HID0_ICE | HID0_DCE)) == 0) { hid0 &= ~(HID0_ILOCK | HID0_DLOCK | HID0_ICE | HID0_DCE); PPC_SET_SPECIAL_PURPOSE_REGISTER(HID0, hid0); |