diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-01 07:11:12 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-27 08:58:16 +0200 |
| commit | 7ee59313932398aa2781503d25154c56301b9b73 (patch) | |
| tree | efaeaf7fa038f3de1b58676deb16d52744c0b373 /bsps/mips | |
| parent | Remove unused CPU_MODES_INTERRUPT_LEVEL (diff) | |
| download | rtems-7ee59313932398aa2781503d25154c56301b9b73.tar.bz2 | |
Remove Clock_driver_support_shutdown_hardware()
The aim of this clock driver hook was to stop clock tick interrupts at
some late point in the exit() procedure.
The use of atexit() pulls in malloc() which pulls in errno. It is
incompatible with the intention of the
CONFIGURE_DISABLE_NEWLIB_REENTRANCY configuration option.
The exit() function must be called from thread context, so accompanied
clock tick interrupts should cause no harm. On the contrary, someone
may assume a normal operating system operation, e.g. working timeouts.
Remove the Clock_driver_support_shutdown_hardware() clock driver hook.
Close #3436.
Diffstat (limited to 'bsps/mips')
| -rw-r--r-- | bsps/mips/csb350/clock/clockdrv.c | 2 | ||||
| -rw-r--r-- | bsps/mips/jmr3904/clock/clockdrv.c | 2 | ||||
| -rw-r--r-- | bsps/mips/rbtx4925/clock/clockdrv.c | 12 | ||||
| -rw-r--r-- | bsps/mips/rbtx4938/clock/clockdrv.c | 14 | ||||
| -rw-r--r-- | bsps/mips/shared/clock/clockdrv.c | 5 |
5 files changed, 0 insertions, 35 deletions
diff --git a/bsps/mips/csb350/clock/clockdrv.c b/bsps/mips/csb350/clock/clockdrv.c index e42261e529..3816bc1ef3 100644 --- a/bsps/mips/csb350/clock/clockdrv.c +++ b/bsps/mips/csb350/clock/clockdrv.c @@ -83,8 +83,6 @@ void au1x00_clock_init(void) au1x00_clock_init(); \ } while(0) -#define Clock_driver_support_shutdown_hardware() - #define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER #include "../../../shared/dev/clock/clockimpl.h" diff --git a/bsps/mips/jmr3904/clock/clockdrv.c b/bsps/mips/jmr3904/clock/clockdrv.c index e0539f1f3f..29f616f42f 100644 --- a/bsps/mips/jmr3904/clock/clockdrv.c +++ b/bsps/mips/jmr3904/clock/clockdrv.c @@ -43,8 +43,6 @@ *((volatile uint32_t*) 0xFFFFC01C) = 0x00000700; \ } while(0) -#define Clock_driver_support_shutdown_hardware() - #define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER #include "../../../shared/dev/clock/clockimpl.h" diff --git a/bsps/mips/rbtx4925/clock/clockdrv.c b/bsps/mips/rbtx4925/clock/clockdrv.c index 2a3121a58e..395be9f320 100644 --- a/bsps/mips/rbtx4925/clock/clockdrv.c +++ b/bsps/mips/rbtx4925/clock/clockdrv.c @@ -103,18 +103,6 @@ } while(0) -#define Clock_driver_support_shutdown_hardware() \ - do { \ - uint32_t temp; \ - temp = TX4925_REG_READ( TX4925_REG_BASE, TX4925_TIMER0_BASE + TX4925_TIMER_ITMR ); /* Disable interval timer interrupt */ \ - temp &= ~TIMER_INT_ENABLE_MASK; \ - TX4925_REG_WRITE( TX4925_REG_BASE, TX4925_TIMER0_BASE + TX4925_TIMER_ITMR, temp ); \ - temp = TX4925_REG_READ( TX4925_REG_BASE, TX4925_TIMER0_BASE + TX4925_TIMER_PGMR ); /* Disable pulse generator interrupt */ \ - temp &= ~(TPIAE | TPIBE); \ - TX4925_REG_WRITE( TX4925_REG_BASE, TX4925_TIMER0_BASE + TX4925_TIMER_PGMR, temp ); \ - TX4925_REG_WRITE( TX4925_REG_BASE, TX4925_TIMER0_BASE + TX4925_TIMER_TCR, 0x0 ); /* Disable timer */ \ - } while(0) - #define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER #include "../../../shared/dev/clock/clockimpl.h" diff --git a/bsps/mips/rbtx4938/clock/clockdrv.c b/bsps/mips/rbtx4938/clock/clockdrv.c index 616defc91e..c952424f42 100644 --- a/bsps/mips/rbtx4938/clock/clockdrv.c +++ b/bsps/mips/rbtx4938/clock/clockdrv.c @@ -100,20 +100,6 @@ void new_brk_esr(void) } while(0) - -#define Clock_driver_support_shutdown_hardware() \ - do { \ - uint32_t temp; \ - temp = TX4938_REG_READ( TX4938_REG_BASE, TX4938_TIMER0_BASE + TX4938_TIMER_ITMR ); /* Disable interval timer interrupt */ \ - temp &= ~TIMER_INT_ENABLE_MASK; \ - TX4938_REG_WRITE( TX4938_REG_BASE, TX4938_TIMER0_BASE + TX4938_TIMER_ITMR, temp ); \ - temp = TX4938_REG_READ( TX4938_REG_BASE, TX4938_TIMER0_BASE + TX4938_TIMER_PGMR ); /* Disable pulse generator interrupt */ \ - temp &= ~(TPIAE | TPIBE); \ - TX4938_REG_WRITE( TX4938_REG_BASE, TX4938_TIMER0_BASE + TX4938_TIMER_PGMR, temp ); \ - TX4938_REG_WRITE( TX4938_REG_BASE, TX4938_TIMER0_BASE + TX4938_TIMER_TCR, 0x0 ); /* Disable timer */ \ - } while(0) - - #define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER #include "../../../shared/dev/clock/clockimpl.h" diff --git a/bsps/mips/shared/clock/clockdrv.c b/bsps/mips/shared/clock/clockdrv.c index 658666c887..f1074a652a 100644 --- a/bsps/mips/shared/clock/clockdrv.c +++ b/bsps/mips/shared/clock/clockdrv.c @@ -39,11 +39,6 @@ static uint32_t mips_timer_rate = 0; mips_enable_in_interrupt_mask(CLOCK_VECTOR_MASK); \ } while(0) -#define Clock_driver_support_shutdown_hardware() \ - do { \ - mips_disable_in_interrupt_mask(CLOCK_VECTOR_MASK); \ - } while (0) - #define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER #include "../../../shared/dev/clock/clockimpl.h" |