bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

6 files changed, 445 insertions, 0 deletions

diff --git a/bsps/mips/hurricane/start/bsp_specs b/bsps/mips/hurricane/start/bsp_specs
new file mode 100644
index 0000000000..87638cc027
--- /dev/null
+++ b/bsps/mips/hurricane/start/bsp_specs
@@ -0,0 +1,9 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{!nostdlib: %{qrtems: crti.o%s crtbegin.o%s}}
+
+*endfile:
+%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s}
diff --git a/bsps/mips/hurricane/start/bspstart.c b/bsps/mips/hurricane/start/bspstart.c
new file mode 100644
index 0000000000..8b36b58628
--- /dev/null
+++ b/bsps/mips/hurricane/start/bspstart.c
@@ -0,0 +1,39 @@
+/**
+ *  @file
+ *  
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-2012.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <string.h>
+
+#include <bsp.h>
+#include <libcpu/isr_entries.h>
+#include <bsp/irq-generic.h>
+
+void bsp_start( void );
+uint32_t bsp_clicks_per_microsecond;
+
+/*
+ *  bsp_start
+ *
+ *  This routine does the bulk of the system initialization.
+ */
+void bsp_start( void )
+{
+
+  bsp_clicks_per_microsecond = CPU_CLOCK_RATE_MHZ;
+
+  bsp_interrupt_initialize();
+}
diff --git a/bsps/mips/hurricane/start/ghlinkcmds b/bsps/mips/hurricane/start/ghlinkcmds
new file mode 100644
index 0000000000..9b6c6dce87
--- /dev/null
+++ b/bsps/mips/hurricane/start/ghlinkcmds
@@ -0,0 +1,19 @@
+#
+#  ghlinkcmds
+#
+
+-map
+-sec
+{
+  .text 0x80010000  :
+  .data  align(16)  :
+  .rodata :
+  .fini :
+#  .sdata :
+  .symtab :
+  .strtab :
+  .debug :
+#  .sbss :
+  .bss     align(8)  :
+  .init 0xbfc00000 :
+}
diff --git a/bsps/mips/hurricane/start/inittlb.c b/bsps/mips/hurricane/start/inittlb.c
new file mode 100644
index 0000000000..800cf3d23c
--- /dev/null
+++ b/bsps/mips/hurricane/start/inittlb.c
@@ -0,0 +1,10 @@
+#include <bsp.h>
+#include <rtems/mips/idtcpu.h>
+
+void init_tlb(void)
+{
+  int i;
+
+        for (i = 0; i < N_TLB_ENTRIES; i++ )
+                resettlb(i);
+}
diff --git a/bsps/mips/hurricane/start/linkcmds b/bsps/mips/hurricane/start/linkcmds
new file mode 100644
index 0000000000..4e10c29f6e
--- /dev/null
+++ b/bsps/mips/hurricane/start/linkcmds
@@ -0,0 +1,188 @@
+/*
+ *   linkcmds
+ */
+
+/*
+ * Declare some sizes.
+ */
+RamBase = DEFINED(RamBase) ? RamBase : 0x80000000;
+RamSize = DEFINED(RamSize) ? RamSize : 4M;
+HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
+_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000;
+
+ENTRY(start)
+STARTUP(start.o)
+
+SECTIONS
+{
+  /* 0x80000000 - 0x8001FFFF used by PMON (with 0x80010000 - 0x8001FFFF as heap for symbol storage)
+	0x80020000 - 0x8002FFFF reserved for shared memory
+	0x80030000 beginning of text (code) section
+   */
+  .text 0x80030000  :
+  {
+    _ftext = . ;
+    eprol = .;
+    *(.text)
+    *(.text.*)
+    *(.gnu.linkonce.t*)
+    *(.mips16.fn.*)
+    *(.mips16.call.*)
+    PROVIDE (__runtime_reloc_start = .);
+    *(.rel.sdata)
+    PROVIDE (__runtime_reloc_stop = .);
+
+      /*
+       * Special FreeBSD sysctl sections.
+       */
+      . = ALIGN (16);
+      __start_set_sysctl_set = .;
+      *(set_sysctl_*);
+      __stop_set_sysctl_set = ABSOLUTE(.);
+      *(set_domain_*);
+      *(set_pseudo_*);
+
+      *(.gcc_except_table*)
+      *(.eh_frame_hdr)
+      *(.eh_frame)
+  }
+
+  .init :
+  {
+	KEEP(*crti.o(.init))
+	KEEP(*(.init))
+	KEEP(*crtn.o(.init))
+  }
+
+  .fini :
+  {
+	KEEP(*crti.o(.fini))
+	KEEP(*(.fini))
+	KEEP(*crtn.o(.fini))
+  }
+
+  .ctors    :
+  {
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+
+    KEEP (*crtbegin.o(.ctors))
+
+    /* We don't want to include the .ctor section from
+       from the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+  }
+
+  .dtors    :
+  {
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+
+    etext  =  .;
+    _etext  =  .;
+  }
+
+  .rdata : {
+    *(.rdata)
+    *(.rodata)
+    *(.rodata.*)
+    KEEP (*(SORT(.rtemsroset.*)))
+    *(.gnu.linkonce.r*)
+  }
+
+  .tdata : {
+    _TLS_Data_begin = .;
+    *(.tdata .tdata.* .gnu.linkonce.td.*)
+    _TLS_Data_end = .;
+  }
+
+  .tbss : {
+    _TLS_BSS_begin = .;
+    *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
+    _TLS_BSS_end = .;
+  }
+
+  _TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
+  _TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
+  _TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
+  _TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
+  _TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
+  _TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
+
+   _fdata = ALIGN(16);
+
+  .data : {
+    *(.data)
+    *(.data.*)
+    KEEP (*(SORT(.rtemsrwset.*)))
+    *(.gnu.linkonce.d*)
+    SORT(CONSTRUCTORS)
+  }
+  . = ALIGN(8);
+
+  .jcr : {
+	KEEP (*(.jcr))
+  }
+
+  _gp = ALIGN(16) + 0x8000;
+  __global = _gp;
+
+  .sdata : {
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s*)
+  }
+  .lit8 : {
+    *(.lit8)
+  }
+  .lit4 : {
+    *(.lit4)
+  }
+
+   edata  =  .;
+   _edata  =  .;
+   _fbss = .;
+
+  .sbss : {
+    *(.sbss)
+    *(.scommon)
+  }
+  .bss : {
+    _bss_start = . ;
+    *(.bss)
+    *(COMMON)
+    . = ALIGN (64);
+    _stack_limit = .;
+    . += _StackSize;
+    __stack = .;
+    _stack_init = .;
+     end = .;
+    _end = .;
+    WorkAreaBase = .;
+  }
+
+
+  /* Debug sections.  These should never be loadable, but they must have
+     zero addresses for the debuggers to work correctly.  */
+  .line			0 : { *(.line)			}
+  .debug		0 : { *(.debug)			}
+  .debug_sfnames	0 : { *(.debug_sfnames)		}
+  .debug_srcinfo	0 : { *(.debug_srcinfo)		}
+  .debug_macinfo	0 : { *(.debug_macinfo)		}
+  .debug_pubnames	0 : { *(.debug_pubnames)	}
+  .debug_aranges	0 : { *(.debug_aranges)		}
+}
diff --git a/bsps/mips/hurricane/start/usc.S b/bsps/mips/hurricane/start/usc.S
new file mode 100644
index 0000000000..887290e2a9
--- /dev/null
+++ b/bsps/mips/hurricane/start/usc.S
@@ -0,0 +1,180 @@
+/*  usc.S
+ *
+ *  COPYRIGHT (c) 1989-2010.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bspopts.h>
+#include <rtems/asm.h>
+#include <rtems/mips/iregdef.h>
+#include <rtems/mips/idtcpu.h>
+#if BSP_HAS_USC320
+  #include <usc.h>
+#endif
+
+
+/***************************************************************************
+**
+**   The following code was added to support boards using V3 USC320
+**     system controller chip.
+**
+****************************************************************************/
+
+/*************************************************************
+*  init_hbt()
+*	Initialize the heartbeat timer
+*/
+FRAME(init_hbt,sp,0,ra)
+	.set noreorder
+	la	t0,SYSTEM	# Unlock USC registers
+	li	t1,0xA5
+	sb	t1,(t0)
+
+	la	t0,WD_HBI	# Initialize heatbeat and watchdog timers
+
+				# (1 / 64 MHz) * 4000 * (63 + 1) = 4000.0 microseconds
+				# Watchdog period is heartbeat period times watchdog timer constant (bits 7 - 0)
+				# Watchdog period = 4000 * 5 = 20000 microseconds
+	li	t1,(WD_EN | HBI_4000_PS | 0x00003F00 | 0x5)
+
+				# (1 / 64 MHz) * 4000 * (15 + 1) = 1000.0 microseconds
+				# Watchdog period is heartbeat period times watchdog timer constant (bits 7 - 0)
+				# Watchdog period = 1000 * 20 = 20000 microseconds
+	li	t1,(WD_EN | HBI_4000_PS | 0x00000F00 | 0x14)
+
+				# (1 / 64 MHz) * 40000 * (15 + 1) = 10000.0 microseconds
+				# Watchdog period is heartbeat period times watchdog timer constant (bits 7 - 0)
+				# Watchdog period = 10000 * 20 = 200000 microseconds
+	li	t1,(WD_EN | HBI_4000_PS | 0x00009600 | 0x14)
+
+	sw	t1,(t0)
+
+	la	t0,SYSTEM	# Lock USC registers
+	li	t1,0x60
+	sb	t1,(t0)
+
+	.set reorder
+	j	ra
+	nop
+	.set reorder
+ENDFRAME(init_hbt)
+
+/*************************************************************
+*  reset_wdt()
+*	Reset the watchdog timer
+*/
+FRAME(reset_wdt,sp,0,ra)
+	.set noreorder
+
+	la	t0,WD_HBI+2	# Load address watchdog timer reset byte
+	li	t1,WD_INIT
+	sb	t1,(t0)
+
+	.set reorder
+	j	ra
+	nop
+	.set reorder
+ENDFRAME(reset_wdt)
+
+/*************************************************************
+*  disable_wdt()
+*	Disable watchdog timer
+*/
+FRAME(disable_wdt,sp,0,ra)
+	.set noreorder
+	la	t0,WD_HBI	# Clear watchdog enable bit in control register
+	lw	t1,(t0)
+	li	t2,~WD_EN
+	and	t1,t1,t2
+	sw	t1,(t0)
+
+	.set reorder
+	j	ra
+	nop
+	.set reorder
+ENDFRAME(disable_wdt)
+
+/*************************************************************
+*  enable_hbi(ints)
+*	Enable the heartbeat interrupt
+*/
+FRAME(enable_hbi,sp,0,ra)
+	.set noreorder
+
+	la	t0,INT_CFG3	# Enable heartbeat interrupt in USC320
+	lw	t1,(t0)
+	li	t2,(HBI_MASK | MODE_TOTEM_POLE)
+	or	t1,t1,t2
+	sw	t1,(t0)
+
+	.set reorder
+	j	ra
+	nop
+	.set reorder
+ENDFRAME(enable_hbi)
+
+/*************************************************************
+*  disable_hbi(ints)
+*	Disable the heartbeat interrupt
+*/
+FRAME(disable_hbi,sp,0,ra)
+	.set noreorder
+	la	t0,INT_CFG3	# Disable heartbeat interrupt in USC320
+	lw	t1,(t0)
+	li	t2,~HBI_MASK
+	and	t1,t1,t2
+	sw	t1,(t0)
+
+	.set reorder
+	j	ra
+	nop
+	.set reorder
+ENDFRAME(disable_hbi)
+
+
+/*************************************************************
+*  enable_wdi()
+*	Enable the watchdog interrupt
+*/
+FRAME(enable_wdi,sp,0,ra)
+	.set noreorder
+
+	la	t0,INT_CFG1	# Enable watchdog interrupt in USC320
+	lw	t1,(t0)
+	li	t2,(WDI_MASK | MODE_TOTEM_POLE)
+	or	t1,t1,t2
+	sw	t1,(t0)
+
+	.set reorder
+	j	ra
+	nop
+	.set reorder
+ENDFRAME(enable_wdi)
+
+/*************************************************************
+*  disable_wdi(ints)
+*	Disable the watchdog interrupt
+*/
+FRAME(disable_wdi,sp,0,ra)
+	.set noreorder
+
+	la	t0,INT_CFG1	# Disable watchdog interrupt in USC320
+	lw	t1,(t0)
+	li	t2,~(WDI_MASK | MODE_TOTEM_POLE)
+	and	t1,t1,t2
+	sw	t1,(t0)
+
+	la	t0,INT_STAT	# Clear watchdog interrupt status bit
+	li	t1,WDI_MASK
+	sw	t1,(t0)
+
+	.set reorder
+	j	ra
+	nop
+	.set reorder
+ENDFRAME(disable_wdi)
+