bsps: Move documentation, etc. files to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

24 files changed, 4141 insertions, 0 deletions

diff --git a/bsps/m68k/av5282/README b/bsps/m68k/av5282/README
new file mode 100644
index 0000000000..af59e36c65
--- /dev/null
+++ b/bsps/m68k/av5282/README
@@ -0,0 +1,437 @@
+Description: Avnet MCF5282 
+============
+CPU: MCF5282, 59MHz
+RAM: 16M
+ROM: 8M
+
+This is an evaluation board that uses the MCF5282 Coldfire CPU. It runs at about 59MHz scaled
+from a 7.372MHz crystal and is integrated with the Avnet designed AvBus. 
+
+ACKNOWLEDGEMENTS:
+=================
+This BSP is based on the work of:
+    D. Peter Siddons
+    Brett Swimley
+    Jay Monkman
+    Eric Norum
+    Mike Bertosh
+
+BSP NAME:           av5282
+BOARD:              Avnet MCF5282
+CPU FAMILY:         ColdFire 5282
+CPU:                MCF5282
+COPROCESSORS:       N/A
+
+DEBUG MONITOR:      AVMON
+
+PERIPHERALS
+===========
+TIMERS:             Four PIT (RTEMS clock is PIT3), Four Timers
+RESOLUTION:         10 microsecond 
+SERIAL PORTS:       Internal UART 1, 2 and 3
+REAL-TIME CLOCK:    none
+DMA:                none
+VIDEO:              none
+SCSI:               none
+NETWORKING:         Internal 10/100MHz FEC
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       PIT3
+IOSUPP DRIVER:      none
+SHMSUPP:            none
+TIMER DRIVER:       TIMER3
+TTY DRIVER:         UART1, 2 and 3
+
+STDIO
+=====
+PORT:               UART1 Terminal
+ELECTRICAL:         RS-232
+BAUD:               19200
+BITS PER CHARACTER: 8
+PARITY:             None
+STOP BITS:          1
+
+
+      Memory map as set up by AVMON bootstrap and BSP initialization
+
+          +--------------------------------------------------+
+0000 0000 |    16 MByte SDRAM                                | 00FF FFFF
+0100 0000 |  ---------------------------------------------   |
+          |    Address space for future SDRAM expansion      |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 0FFF FFFF
+          +--------------------------------------------------+
+1000 0000 |                                                  |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 1FFF FFFF
+          +--------------------------------------------------+
+2000 0000 | 64 kByte on-chip SRAM (RAMBAR)                   |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 2FFF FFFF
+          +--------------------------------------------------+
+3000 0000 |                                                  | 30FF FFFF
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 3FFF FFFF
+          +--------------------------------------------------+
+4000 0000 | Internal peripheral system (IPSBAR)              |
+          .                                                  .
+          |                                                  |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 4FFF FFFF
+          +--------------------------------------------------+
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          +--------------------------------------------------+
+F000 0000 | 512 kByte on-chip flash (FLASHBAR)               |
+          .                                                  .
+FF80 0000 | External 8 MByte Flash memory                                                 .
+          .                                                  .
+          |                                                  | FFFF FFFF
+          +--------------------------------------------------+
+
+============================================================================
+
+      Interrupt map
+
++-----+-----------------------------------------------------------------------+
+|     |                                PRIORITY                               |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|LEVEL|    7   |    6   |    5   |    4   |    3   |    2   |    1   |    0   |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  7  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  6  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  5  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  4  | FEC RX | FEC TX |        |        |        |        |        |   PIT  |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  3  | UART 0 | UART 1 | UART 2 |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  2  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  1  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+
+============================================================================
+
+TIMING TESTS
+**************************
+
+
+*** TIME TEST 1 ***
+rtems_semaphore_create 28
+rtems_semaphore_delete 31
+rtems_semaphore_obtain: available 6
+rtems_semaphore_obtain: not available -- NO_WAIT 7
+rtems_semaphore_release: no waiting tasks 14
+*** END OF TEST 1 ***
+
+*** TIME TEST 2 ***
+rtems_semaphore_obtain: not available -- caller blocks 57
+*** END OF TEST 2 ***
+
+*** TIME TEST 3 ***
+rtems_semaphore_release: task readied -- preempts caller 39
+*** END OF TEST 3 ***
+
+*** TIME TEST 4 ***
+rtems_task_restart: blocked task -- preempts caller 86
+rtems_task_restart: ready task -- preempts caller 82
+rtems_semaphore_release: task readied -- returns to caller 28
+rtems_task_create 139
+rtems_task_start 32
+rtems_task_restart: suspended task -- returns to caller 42
+rtems_task_delete: suspended task 99
+rtems_task_restart: ready task -- returns to caller 44
+rtems_task_restart: blocked task -- returns to caller 59
+rtems_task_delete: blocked task 104
+*** END OF TEST 4 ***
+
+*** TIME TEST 5 ***
+rtems_task_suspend: calling task 36
+rtems_task_resume: task readied -- preempts caller 33
+*** END OF TEST 5 ***
+
+*** TIME TEST 6 ***
+rtems_task_restart: calling task 45
+rtems_task_suspend: returns to caller 12
+rtems_task_resume: task readied -- returns to caller 15
+rtems_task_delete: ready task 106
+*** END OF TEST 6 ***
+
+*** TIME TEST 7 ***
+rtems_task_restart: suspended task -- preempts caller 68
+*** END OF TEST 7 ***
+
+*** TIME TEST 9 ***
+rtems_message_queue_create 81
+rtems_message_queue_send: no waiting tasks 30
+rtems_message_queue_urgent: no waiting tasks 31
+rtems_message_queue_receive: available 30
+rtems_message_queue_flush: no messages flushed 12
+rtems_message_queue_flush: messages flushed 18
+rtems_message_queue_delete 42
+*** END OF TEST 9 ***
+
+*** TIME TEST 10 ***
+rtems_message_queue_receive: not available -- NO_WAIT 16
+rtems_message_queue_receive: not available -- caller blocks 58
+*** END OF TEST 10 ***
+
+*** TIME TEST 11 ***
+rtems_message_queue_send: task readied -- preempts caller 53
+*** END OF TEST 11 ***
+
+*** TIME TEST 12 ***
+rtems_message_queue_send: task readied -- returns to caller 35
+*** END OF TEST 12 ***
+
+*** TIME TEST 13 ***
+rtems_message_queue_urgent: task readied -- preempts caller 51
+*** END OF TEST 13 ***
+
+*** TIME TEST 14 ***
+rtems_message_queue_urgent: task readied -- returns to caller 33
+*** END OF TEST 14 ***
+
+*** TIME TEST 15 ***
+rtems_event_receive: obtain current events 0
+rtems_event_receive: not available -- NO_WAIT 9
+rtems_event_receive: not available -- caller blocks 46
+rtems_event_send: no task readied 7
+rtems_event_receive: available 13
+rtems_event_send: task readied -- returns to caller 19
+*** END OF TEST 15 ***
+
+*** TIME TEST 16 ***
+rtems_event_send: task readied -- preempts caller 35
+*** END OF TEST 16 ***
+
+*** TIME TEST 17 ***
+rtems_task_set_priority: preempts caller 56
+*** END OF TEST 17 ***
+
+*** TIME TEST 18 ***
+rtems_task_delete: calling task 124
+*** END OF TEST 18 ***
+
+*** TIME TEST 19 ***
+rtems_signal_catch 8
+rtems_signal_send: returns to caller 17
+rtems_signal_send: signal to self 29
+exit ASR overhead: returns to calling task 23
+exit ASR overhead: returns to preempting task 26
+*** END OF TEST 19 ***
+
+*** TIME TEST 20 ***
+rtems_partition_create 29
+rtems_region_create 59
+rtems_partition_get_buffer: available 15
+rtems_partition_get_buffer: not available 8
+rtems_partition_return_buffer 16
+rtems_partition_delete 14
+rtems_region_get_segment: available 38
+rtems_region_get_segment: not available -- NO_WAIT 41
+rtems_region_return_segment: no waiting tasks 42
+rtems_region_get_segment: not available -- caller blocks 80
+rtems_region_return_segment: task readied -- preempts caller 108
+rtems_region_return_segment: task readied -- returns to caller 86
+rtems_region_delete 36
+rtems_io_initialize 1
+rtems_io_open 2
+rtems_io_close 2
+rtems_io_read 1
+rtems_io_write 1
+rtems_io_control 1
+*** END OF TEST 20 ***
+
+*** TIME TEST 21 ***
+rtems_task_ident 73
+rtems_message_queue_ident 74
+rtems_semaphore_ident 85
+rtems_partition_ident 73
+rtems_region_ident 75
+rtems_port_ident 73
+rtems_timer_ident 76
+rtems_rate_monotonic_ident 72
+*** END OF TEST 21 *
+
+*** TIME TEST 22 ***
+rtems_message_queue_broadcast: task readied -- returns to caller 48
+rtems_message_queue_broadcast: no waiting tasks 18
+rtems_message_queue_broadcast: task readied -- preempts caller 58
+*** END OF TEST 22 ***
+
+*** TIME TEST 23 ***
+rtems_timer_create 10
+rtems_timer_fire_after: inactive 20
+rtems_timer_fire_after: active 24
+rtems_timer_cancel: active 8
+rtems_timer_cancel: inactive 8
+rtems_timer_reset: inactive 16
+rtems_timer_reset: active 17
+rtems_timer_fire_when: inactive 35
+rtems_timer_fire_when: active 35
+rtems_timer_delete: active 16
+rtems_timer_delete: inactive 14
+rtems_task_wake_when 53
+*** END OF TEST 23 ***
+
+*** TIME TEST 24 ***
+rtems_task_wake_after: yield -- returns to caller 5
+rtems_task_wake_after: yields -- preempts caller 30
+*** END OF TEST 24 ***
+
+*** TIME TEST 25 ***
+rtems_clock_tick 11
+*** END OF TEST 25 ***
+
+*** TIME TEST 26 ***
+_ISR_Disable 0
+_ISR_Flash 0
+_ISR_Enable 0
+_Thread_Disable_dispatch 0
+_Thread_Enable_dispatch 3
+_Thread_Set_state 12
+_Thread_Disptach (NO FP) 23
+context switch: no floating point contexts 19
+context switch: self 3
+context switch: to another task 2
+fp context switch: restore 1st FP task 19
+fp context switch: save idle, restore initialized 4
+fp context switch: save idle, restore idle 17
+fp context switch: save initialized, restore initialized 4
+_Thread_Resume 11
+_Thread_Unblock 8
+_Thread_Ready 7
+_Thread_Get 4
+_Semaphore_Get 2
+_Thread_Get: invalid id 0
+*** END OF TEST 26 ***
+
+*** TIME TEST 27 ***
+interrupt entry overhead: returns to interrupted task 5
+interrupt exit overhead: returns to interrupted task 4
+interrupt entry overhead: returns to nested interrupt 3
+interrupt exit overhead: returns to nested interrupt 3
+interrupt entry overhead: returns to preempting task 6
+interrupt exit overhead: returns to preempting task 30
+*** END OF TEST 27 ***
+
+*** TIME TEST 28 ***
+rtems_port_create 18
+rtems_port_external_to_internal 6
+rtems_port_internal_to_external 7
+rtems_port_delete 18
+*** END OF TEST 28 ***
+
+*** TIME TEST 29 ***
+rtems_rate_monotonic_create 18
+rtems_rate_monotonic_period: initiate period -- returns to caller 29
+rtems_rate_monotonic_period: obtain status 15
+rtems_rate_monotonic_cancel 19
+rtems_rate_monotonic_delete: inactive 22
+rtems_rate_monotonic_delete: active 24
+rtems_rate_monotonic_period: conclude periods -- caller blocks 36
+*** END OF TEST 29 ***
+
+*** TIME CHECKER ***
+Units may not be in microseconds for this test!!!
+0 100000
+Total time = 0
+Average time = 0
+<pause>
+NULL timer stopped at 0
+LOOP (1000) timer stopped at 225
+LOOP (10000) timer stopped at 2242
+LOOP (50000) timer stopped at 11207
+LOOP (100000) timer stopped at 22414
+*** END OF TIME CHECKER ***
+
+*** TIME TEST OVERHEAD ***
+rtems_initialize_executive 0
+rtems_shutdown_executive 0
+rtems_task_create 1
+rtems_task_ident 0
+rtems_task_start 0
+rtems_task_restart 0
+rtems_task_delete 0
+rtems_task_suspend 0
+rtems_task_resume 0
+rtems_task_set_priority 0
+rtems_task_mode 0
+rtems_task_wake_when 1
+rtems_task_wake_after 0
+rtems_interrupt_catch 0
+rtems_clock_get 1
+rtems_clock_set 1
+rtems_clock_tick 0
+<pause>
+rtems_timer_create 0
+rtems_timer_delete 0
+rtems_timer_ident 0
+rtems_timer_fire_after 0
+rtems_timer_fire_when 1
+rtems_timer_reset 0
+rtems_timer_cancel 0
+rtems_semaphore_create 1
+rtems_semaphore_delete 0
+rtems_semaphore_ident 0
+rtems_semaphore_obtain 0
+rtems_semaphore_release 0
+rtems_message_queue_create 0
+rtems_message_queue_ident 0
+rtems_message_queue_delete 0
+rtems_message_queue_send 0
+rtems_message_queue_urgent 0
+rtems_message_queue_broadcast 0
+rtems_message_queue_receive 0
+rtems_message_queue_flush 0
+<pause>
+rtems_event_send 0
+rtems_event_receive 0
+rtems_signal_catch 0
+rtems_signal_send 0
+rtems_partition_create 1
+rtems_partition_ident 0
+rtems_partition_delete 0
+rtems_partition_get_buffer 0
+rtems_partition_return_buffer 0
+rtems_region_create 1
+rtems_region_ident 0
+rtems_region_delete 0
+rtems_region_get_segment 1
+rtems_region_return_segment 0
+rtems_port_create 1
+rtems_port_ident 0
+rtems_port_delete 0
+rtems_port_external_to_internal 0
+rtems_port_internal_to_external 0
+<pause>
+rtems_io_initialize 0
+rtems_io_open 0
+rtems_io_close 0
+rtems_io_read 0
+rtems_io_write 0
+rtems_io_control 0
+rtems_fatal_error_occurred 0
+rtems_rate_monotonic_create 0
+rtems_rate_monotonic_ident 0
+rtems_rate_monotonic_delete 0
+rtems_rate_monotonic_cancel 0
+rtems_rate_monotonic_period 0
+rtems_multiprocessing_announce 0
+*** END OF TIME OVERHEAD ***
diff --git a/bsps/m68k/csb360/README b/bsps/m68k/csb360/README
new file mode 100644
index 0000000000..6400067a42
--- /dev/null
+++ b/bsps/m68k/csb360/README
@@ -0,0 +1,48 @@
+#
+# README for CSB360
+#
+# Copyright (C) 2004 by Cogent Computer Systems
+# Author: Jay Monkman <jtm@lopingdog.com>
+
+BSP NAME:	    csb360
+BOARD:              Cogent CSB360 
+BUS:                none
+CPU FAMILY:         Motorola ColdFire MCF5272
+COPROCESSORS:       none
+MODE:               not applicable
+DEBUG MONITOR:      none (Hardware provides BDM)
+
+PERIPHERALS
+===========
+TIMERS:             
+  RESOLUTION:       
+SERIAL PORTS:       
+REAL-TIME CLOCK:    
+NVRAM:              
+DMA:                
+VIDEO:              
+SCSI:               
+NETWORKING:         
+I2C BUS:            
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       
+IOSUPP DRIVER:      
+SHMSUPP:            
+TIMER DRIVER:       
+I2C DRIVER:         
+
+STDIO
+=====
+PORT:               
+ELECTRICAL:         
+BAUD:               
+BITS PER CHARACTER: 
+PARITY:             
+STOP BITS:          
+
+NOTES
+=====
+
+
diff --git a/bsps/m68k/gen68340/README b/bsps/m68k/gen68340/README
new file mode 100644
index 0000000000..549ec71e35
--- /dev/null
+++ b/bsps/m68k/gen68340/README
@@ -0,0 +1,82 @@
+#
+# This package requires a version of GCC that supports the `-mcpu32' option.
+#
+
+#
+# Please send any comments, improvements, or bug reports to:
+#	Geoffroy Montel
+#	g_montel@yahoo.com
+#
+
+#
+# This board support package works both MC68340 and MC68349 systems.
+#
+# Special console features:
+# - support of polled and interrupts mode (both MC68340 and MC68349)
+# - support of FIFO FULL mode (only for MC68340, the MC68349 doesn't have any timer, so
+#   you may write your own timer driver if you have an external one)
+# 
+# The type of the board is automatically recognised in the initialization sequence.
+#
+# WARNING: there's still no network driver!
+#   I hope it will come in the next RTEMS version!
+#
+
+BSP NAME:	    gen68340
+BOARD:              Generic 68360 as described in Motorola MC68340 User's Manual
+BOARD:              Home made MC68340 board
+BOARD:		    Home made MC68349 board
+BUS:                none
+CPU FAMILY:         Motorola CPU32
+COPROCESSORS:       none
+MODE:               not applicable
+
+DEBUG MONITOR:      none (Hardware provides BDM)
+DEBUG SETUP:	    EST Vision Ice
+
+PERIPHERALS
+===========
+TIMERS:             two timers
+  RESOLUTION:       one microsecond
+SERIAL PORTS:       2 channel on the UART
+REAL-TIME CLOCK:    yes
+DMA:                yes
+VIDEO:              none
+SCSI:               none
+NETWORKING:         Ethernet on SCC1.
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       
+IOSUPP DRIVER:      
+SHMSUPP:            none
+TIMER DRIVER:       Timer 1 for timing test suites
+		    Timer 2 for console's FIFO FULL mode
+STDIO
+=====
+PORT:               1
+ELECTRICAL:         
+BAUD:               9600
+BITS PER CHARACTER: 8
+PARITY:             None
+STOP BITS:          1
+
+NOTES
+=====
+
+Board description
+-----------------
+clock rate:	25 MHz
+bus width:	16-bit PROM, 32-bit DRAM
+ROM:		To 1 MByte, 60 nsec (0 wait states), chip select 0
+RAM:		1 to 16 MByte DRAM SIMM, 60 nsec (0 wait states), parity or nonparity
+
+Host System
+-----------
+Cygwin 32
+
+Verification (Standalone 68360)
+-------------------------------
+Single processor tests:  Passed
+Multi-processor tests:  not applicable
+
diff --git a/bsps/m68k/gen68360/README b/bsps/m68k/gen68360/README
new file mode 100644
index 0000000000..0c595deb77
--- /dev/null
+++ b/bsps/m68k/gen68360/README
@@ -0,0 +1,299 @@
+#
+# This package requires a version of GCC that supports the `-mcpu32' option.
+#
+
+#
+# Please send any comments, improvements, or bug reports to:
+#	W. Eric Norum
+#	Deparment of Electrical Engineering
+#	53 Campus Driver
+#	University of Saskatchewan
+#	Saskatoon, Saskatchewan, CANADA
+#	S7N 5A9
+# eric.norum@usask.ca
+#
+
+#
+# This board support package works with several different versions of
+# MC68360 systems.  See the conditional-compile tests in startup/init68360.c
+# for examples.
+#
+# Decisions made at compile time include:
+#	- If the CPU is a member of the 68040 family, the BSP is
+#	  compiled for a generic 68040/68360 system as described
+#	  in Chapter 9 of the MC68360 User's Manual.  This version
+#	  can be used with the Arnewsh SBC360 card.
+#	- If the preprocessor symbol M68360_ATLAS_HSB is defined,
+#	  the BSP is compiled for an Atlas HSB card.
+#	- If the preprocessor symbol M68360_IMD_PGH is defined,
+#	  the BSP is compiled for an IMD PGH360 card.
+#	- Otherwise, the BSP is compiled for a generic 68360 system
+#	  as described in Chapter 9 of the MC68360 User's Manual.  This
+#	  version works with the Atlas ACE360 card.
+#
+
+BSP NAME:	    gen68360 or gen68360_040
+BOARD:              Generic 68360 as described in Motorola MC68360 User's Manual
+BOARD:              Atlas Computer Equipment Inc. High Speed Bridge (HSB)
+BOARD:              Atlas Computer Equipment Inc. Advanced Communication Engine (ACE)
+BOARD:              Arnewsh SBC360 68040/68360 card
+BOARD:              IMD PGH Board (custom)
+BUS:                none
+CPU FAMILY:         Motorola CPU32+, Motorola 68040
+COPROCESSORS:       none
+MODE:               not applicable
+
+DEBUG MONITOR:      none (Hardware provides BDM)
+
+PERIPHERALS
+===========
+TIMERS:             PIT, Watchdog, 4 general purpose, 16 RISC
+  RESOLUTION:       one microsecond
+SERIAL PORTS:       4 SCC, 2 SMC, 1 SPI
+REAL-TIME CLOCK:
+DMA:                Each serial port, 2 general purpose
+VIDEO:              none
+SCSI:               none
+NETWORKING:         Ethernet on SCC1.
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       Programmable Interval Timer
+IOSUPP DRIVER:      Serial Management Controller 1
+SHMSUPP:            none
+TIMER DRIVER:       Timer 1
+
+STDIO
+=====
+PORT:               SMC1
+ELECTRICAL:         EIA-232 (if board supplies level shifter)
+BAUD:               9600
+BITS PER CHARACTER: 8
+PARITY:             None
+STOP BITS:          1
+
+NOTES
+=====
+
+Board description
+-----------------
+clock rate:	25 MHz
+bus width:	8-bit PROM/FLASH, 32-bit DRAM
+ROM:		To 1 MByte, 180 nsec (3 wait states), chip select 0
+RAM:		4 or 16 MBytes of 60 nsec parity DRAM (1Mx36) to RAS1*/CAS1*
+
+Board description (IMD PGH)
+---------------------------
+clock rate:	25 MHz
+bus width:	8-bit PROM/FLASH, 32-bit DRAM
+ROM:		512KByte, 180 nsec (3 wait states), chip select 0
+RAM:		16 MBytes of 60 nsec no-parity DRAM (1Mx32) to RAS1*/CAS1*
+
+Host System
+-----------
+OPENSTEP 4.2 (Intel and Motorola), Solaris 2.5, Linux 2.0.29
+
+Verification (Standalone 68360)
+-------------------------------
+Single processor tests:  Passed
+Multi-processort tests:  not applicable
+Timing tests:
+	Context Switch
+	
+	context switch: self 10
+	context switch: to another task 11
+	context switch: no floating point contexts 38
+	fp context switch: restore 1st FP task 39
+	fp context switch: save initialized, restore initialized 14
+	fp context switch: save idle, restore initialized 15
+	fp context switch: save idle, restore idle 41
+	
+	Task Manager
+	
+	rtems_task_create 202
+	rtems_task_ident 390
+	rtems_task_start 71
+	rtems_task_restart: calling task 99
+	rtems_task_restart: suspended task -- returns to caller 86
+	rtems_task_restart: blocked task -- returns to caller 116
+	rtems_task_restart: ready task -- returns to caller 88
+	rtems_task_restart: suspended task -- preempts caller 132
+	rtems_task_restart: blocked task -- preempts caller 153
+	rtems_task_restart: ready task -- preempts caller 149
+	rtems_task_delete: calling task 236
+	rtems_task_delete: suspended task 191
+	rtems_task_delete: blocked task 195
+	rtems_task_delete: ready task 198
+	rtems_task_suspend: calling task 78
+	rtems_task_suspend: returns to caller 36
+	rtems_task_resume: task readied -- returns to caller 39
+	rtems_task_resume: task readied -- preempts caller 67
+	rtems_task_set_priority: obtain current priority 26
+	rtems_task_set_priority: returns to caller 59
+	rtems_task_set_priority: preempts caller 110
+	rtems_task_mode: obtain current mode 13
+	rtems_task_mode: no reschedule 15
+	rtems_task_mode: reschedule -- returns to caller 20
+	rtems_task_mode: reschedule -- preempts caller 67
+	rtems_task_wake_after: yield -- returns to caller 16
+	rtems_task_wake_after: yields -- preempts caller 65
+	rtems_task_wake_when 116
+	
+	Interrupt Manager
+	
+	interrupt entry overhead: returns to nested interrupt 10
+	interrupt entry overhead: returns to interrupted task 10
+	interrupt entry overhead: returns to preempting task 10
+	interrupt exit overhead: returns to nested interrupt 8
+	interrupt exit overhead: returns to interrupted task 10
+	interrupt exit overhead: returns to preempting task 59
+	
+	Clock Manager
+	
+	rtems_clock_set 73
+	rtems_clock_get 1
+	rtems_clock_tick 16
+	
+	Timer Manager
+	
+	rtems_timer_create 31
+	rtems_timer_ident 380
+	rtems_timer_delete: inactive 43
+	rtems_timer_delete: active 46
+	rtems_timer_fire_after: inactive 53
+	rtems_timer_fire_after: active 56
+	rtems_timer_fire_when: inactive 72
+	rtems_timer_fire_when: active 72
+	rtems_timer_reset: inactive 47
+	rtems_timer_reset: active 51
+	rtems_timer_cancel: inactive 25
+	rtems_timer_cancel: active 28
+	
+	Semaphore Manager
+	
+	rtems_semaphore_create 59
+	rtems_semaphore_ident 438
+	rtems_semaphore_delete 57
+	rtems_semaphore_obtain: available 31
+	rtems_semaphore_obtain: not available -- NO_WAIT 31
+	rtems_semaphore_obtain: not available -- caller blocks 108
+	rtems_semaphore_release: no waiting tasks 40
+	rtems_semaphore_release: task readied -- returns to caller 56
+	rtems_semaphore_release: task readied -- preempts caller 83
+	
+	Message Queue Manager
+	
+	rtems_message_queue_create 241
+	rtems_message_queue_ident 379
+	rtems_message_queue_delete 75
+	rtems_message_queue_send: no waiting tasks 72
+	rtems_message_queue_send: task readied -- returns to caller 72
+	rtems_message_queue_send: task readied -- preempts caller 99
+	rtems_message_queue_urgent: no waiting tasks 72
+	rtems_message_queue_urgent: task readied -- returns to caller 72
+	rtems_message_queue_urgent: task readied -- preempts caller 99
+	rtems_message_queue_broadcast: no waiting tasks 43
+	rtems_message_queue_broadcast: task readied -- returns to caller 82
+	rtems_message_queue_broadcast: task readied -- preempts caller 109
+	rtems_message_queue_receive: available 52
+	rtems_message_queue_receive: not available -- NO_WAIT 34
+	rtems_message_queue_receive: not available -- caller blocks 111
+	rtems_message_queue_flush: no messages flushed 25
+	rtems_message_queue_flush: messages flushed 34
+	
+	Event Manager
+	
+	rtems_event_send: no task readied 22
+	rtems_event_send: task readied -- returns to caller 50
+	rtems_event_send: task readied -- preempts caller 80
+	rtems_event_receive: obtain current events -1
+	rtems_event_receive: available 26
+	rtems_event_receive: not available -- NO_WAIT 22
+	rtems_event_receive: not available -- caller blocks 89
+	
+	Signal Manager
+	
+	rtems_signal_catch 16
+	rtems_signal_send: returns to caller 32
+	rtems_signal_send: signal to self 51
+	exit ASR overhead: returns to calling task 42
+	exit ASR overhead: returns to preempting task 58
+	
+	Partition Manager
+	
+	rtems_partition_create 74
+	rtems_partition_ident 379
+	rtems_partition_delete 40
+	rtems_partition_get_buffer: available 29
+	rtems_partition_get_buffer: not available 27
+	rtems_partition_return_buffer 34
+	
+	Region Manager
+	
+	rtems_region_create 63
+	rtems_region_ident 388
+	rtems_region_delete 40
+	rtems_region_get_segment: available 43
+	rtems_region_get_segment: not available -- NO_WAIT 40
+	rtems_region_get_segment: not available -- caller blocks 120
+	rtems_region_return_segment: no waiting tasks 48
+	rtems_region_return_segment: task readied -- returns to caller 98
+	rtems_region_return_segment: task readied -- preempts caller 125
+	
+	Dual-Ported Memory Manager
+	
+	rtems_port_create 38
+	rtems_port_ident 380
+	rtems_port_delete 40
+	rtems_port_internal_to_external 22
+	rtems_port_external_to_internal 22
+	
+	IO Manager
+	
+	rtems_io_initialize 4
+	rtems_io_open 1
+	rtems_io_close 1
+	rtems_io_read 1
+	rtems_io_write 1
+	rtems_io_control 1
+	
+	Rate Monotonic Manager
+	
+	rtems_rate_monotonic_create 36
+	rtems_rate_monotonic_ident 380
+	rtems_rate_monotonic_cancel 34
+	rtems_rate_monotonic_delete: active 51
+	rtems_rate_monotonic_delete: inactive 47
+	rtems_rate_monotonic_period: obtain status 27
+	rtems_rate_monotonic_period: initiate period -- returns to caller 50
+	rtems_rate_monotonic_period: conclude periods -- caller blocks 72
+
+Network tests:
+       TCP throughput (as measured by ttcp):
+               Receive: 1081 kbytes/sec
+               Transmit: 953 kbytes/sec
+
+Porting
+-------
+This board support package is written for a 68360 system similar to that
+described in chapter 9 of the Motorola MC68360 Quad Integrated Communication
+Processor Users' Manual.  The salient features of this hardware are:
+
+	25 MHz external clock
+	DRAM address multiplexing provided by 68360
+	8-bit 180nsec PROM to CS0*
+	4 MBytes of 60 nsec parity DRAM (1Mx36) to RAS1*/CAS1*
+	Console serial port on SMC1
+	Ethernet interface on SCC1
+
+The board support package has been tested with:
+	A home-built 68360 board
+	An ACE360A and an HSB board produced by:
+		Atlas Computer Equipment
+		703 Colina Lane
+		Santa Barbara, CA 93103
+	A 68040/68360 board (SBC360) produced by:
+		Arnewsh Inc.
+		P.O. Box 270352
+		Fort Collins, CO 80527-0352
+	A custom 68360 board (PGH360) produced by IMD
diff --git a/bsps/m68k/genmcf548x/README b/bsps/m68k/genmcf548x/README
new file mode 100644
index 0000000000..13994eb167
--- /dev/null
+++ b/bsps/m68k/genmcf548x/README
@@ -0,0 +1,229 @@
+/*===============================================================*\
+| Project: RTEMS generic mcf548x BSP                              |
++-----------------------------------------------------------------+
+| File: README                                                    |
++-----------------------------------------------------------------+
+| This is the README for the  generic MCF548x BSP.                |
++-----------------------------------------------------------------+
+|                    Copyright (c) 2007                           |
+|                    Embedded Brains GmbH                         |
+|                    Obere Lagerstr. 30                           |
+|                    D-82178 Puchheim                             |
+|                    Germany                                      |
+|                    rtems@embedded-brains.de                     |
++-----------------------------------------------------------------+
+|                                                                 |
+| Parts of the code has been derived from the "dBUG source code"  |
+| package Freescale is providing for M548X EVBs. The usage of     |
+| the modified or unmodified code and it's integration into the   |
+| generic mcf548x BSP has been done according to the Freescale    |
+| license terms.                                                  |
+|                                                                 |
+| The Freescale license terms can be reviewed in the file         |
+|                                                                 |
+|    Freescale_license.txt                                        |
+|                                                                 |
++-----------------------------------------------------------------+
+|                                                                 |
+| The generic mcf548x BSP has been developed on the basic         |
+| structures and modules of the av5282 BSP.                       |
+|                                                                 |
++-----------------------------------------------------------------+
+|                                                                 |
+| The license and distribution terms for this file may be         |
+| found in the file LICENSE in this distribution or at            |
+|                                                                 |
+| http://www.rtems.org/license/LICENSE.                           |
+|                                                                 |
++-----------------------------------------------------------------+
+|                                                                 |
+|   date                      history                        ID   |
+| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
+| 12.11.07                    1.0                            ras  |
+|                                                                 |
+\*===============================================================*/
+
+
+Description: Generic mcf548x BSP
+
+The genmcf548x supports several boards based on the Freescale MCF547x/8x
+ColdFire microcontrollers
+
+Supported Hardware: mcf5484FireEngine
+=============================
+CPU:         MCF548x, 200MHz
+XLB:         100 MHz, which is the main clock for all onchip peripherals
+RAM:         64M (m5484FireEngine)
+Boot-Flash:  2M (m5484FireEngine)
+Code-Flash:  16M (m5484FireEngine)
+Core-SRAM:   8K
+Core-SysRAM: 32K
+Boot-Monitor:None
+
+Supported Hardware: COBRA5475
+=============================
+CPU:         MCF5475, 266MHz
+XLB:         132 MHz, which is the main clock for all onchip peripherals
+RAM:         128M 
+Boot-Flash:  32M 
+Core-SRAM:   8K
+Core-SysRAM: 32K
+Boot-Monitor:DBug
+
+
+ACKNOWLEDGEMENTS:
+=================
+This BSP is based on the 
+
+  av5282 BSP
+
+and the work of
+
+  D. Peter Siddons
+  Brett Swimley
+  Jay Monkman
+  Eric Norum
+  Mike Bertosh
+
+BSP INFO:
+=========
+BSP NAME:           genmcf548x
+BOARD:              various MCF547x/8x based boards
+CPU FAMILY:         ColdFire 548x
+CPU:                MCF5475/MCF5484
+FPU:                MCF548x FPU, context switch supported by RTEMS multitasking
+EMAC:               MCF548x EMAC context switch supported by RTEMS multitasking (handeld together with FPU context)
+
+PERIPHERALS
+===========
+TIMERS:             2 slice timers, 4 general purpose timers  (SLT0 is used for RTEMS clock, SLT1 is used for diagnostic pupose)
+RESOLUTION:         System tick 10 millieconds (via SLT0) 
+SERIAL PORTS:       Internal PSC 0-3
+NETWORKING:         Internal 10/100MHz FEC on two channels
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       SLT0
+TIMER DRIVER:       SLT1 (diagnostics)
+TTY DRIVER:         PSC0-3
+
+STDIO
+=====
+PORT:               PSC0 (UART mode) terminal
+ELECTRICAL:         RS-232
+BAUD:               9600
+BITS PER CHARACTER: 8
+PARITY:             None
+STOP BITS:          1
+MODES:              Interrupt driven (polled mode alternatively)
+
+
+----------------------------------------------------------------------
+
+      Memory map of m5484FireEngine as set up by BSP initialization:
+
+          +--------------------------------------------------+
+0000 0000 |    64 MByte SDRAM (external)                     | 03FF FFFF
+          .                                                  .
+          .                                                  .
+          .                                                  .
+ 
+          
+m5484FireEngine:
+          
+          
+          |                                                  | 0FFF FFFF
+          +--------------------------------------------------+
+1000 0000 |    internal per. registers via MBAR              | 1003 FFFF
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 
+          +--------------------------------------------------+
+2000 0000 |    8K core SRAM (internal)                       | 2000 1FFF
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          
+m5484FireEngine:
+
+          |                                                  | 
+          +--------------------------------------------------+
+E000 0000 |    16M code flash (external)                     | E0FF FFFF
+          .                                                  .
+	  .                                                  .
+          .                                                  .
+          |                                                  | 
+          +--------------------------------------------------+          
+FF80 0000 | External 8 MByte Flash memory                    | FF9F FFFF
+          .                                                  .
+	  .                                                  .
+          .                                                  .          
+          |                                                  | FFFF FFFF
+          +--------------------------------------------------+
+
+
+----------------------------------------------------------------------
+
+      Memory map for COBRA5475 as set up by DBug:
+
+          +--------------------------------------------------+
+F000 0000 |   128 MByte SDRAM (external)                     |
+          .                                                  .
+          .   (first 256KByte reserved for DBug)             .
+          .                                                  . F03F FFFF
+F040 0000 |                                                  |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | F7FF FFFF
+          +--------------------------------------------------+
+FC00 0000 |    32M code flash (external)                     |
+          .                                                  .
+	  .                                                  .
+          .                                                  .
+          |                                                  | FDFF FFFF 
+          +--------------------------------------------------+          
+FE00 0000 |    internal per. registers via MBAR              |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | FE03 FFFF 
+          +--------------------------------------------------+
+FF00 0000 |    8K core SRAM (internal)                       |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | FF00 1FFF 
+          +--------------------------------------------------+
+
+============================================================================
+
+      Interrupt map
+
++-----+-----------------------------------------------------------------------+
+|     |                                PRIORITY                               |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|LEVEL|    7   |    6   |    5   |    4   |    3   |    2   |    1   |    0   |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  7  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  6  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  5  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  4  |        |        |        |        |        |        |        |  SLT0  |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  3  | PSC 0  | PSC 1  | PSC 2  | PSC 3  |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  2  |        |        |        |        | FEC0/1 | MCDMA  |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  1  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+
+============================================================================
+
+TIMING TESTS
+**************************
+
+tbd.
diff --git a/bsps/m68k/mcf5206elite/README b/bsps/m68k/mcf5206elite/README
new file mode 100644
index 0000000000..7a28b6d2a0
--- /dev/null
+++ b/bsps/m68k/mcf5206elite/README
@@ -0,0 +1,101 @@
+#
+# README for MCF5206eLITE Board Support Package
+#
+# Copyright (C) 2000,2001 OKTET Ltd., St.-Petersburg, Russia
+# Author: Victor V. Vengerov <vvv@oktet.ru>
+#
+# The license and distribution terms for this file may be
+# found in the file LICENSE in this distribution or at
+# http://www.rtems.org/license/LICENSE.
+
+#
+# This board support package works with MCF5206eLITE evaluation board with
+# Motorola Coldfire MCF5206e CPU.
+#
+# Many thanks to Balanced Audio Technology (http://www.balanced.com),
+# company which donates MCF5206eLITE evaluation board, P&E Coldfire BDM 
+# interface and provides support for development of this BSP and generic
+# MCF5206 CPU code.
+#
+# Decisions made at compile time include:
+#
+# Decisions to be made a link-edit time are:
+#     - The size of memory allocator heap. By default, all available
+#       memory allocated for the heap. To specify amount of memory
+#       available for heap:
+#       LDFLAGS += -Wl,--defsym -Wl,HeapSize=xxx
+#
+#     - The frequency of system clock oscillator. By default, this frequency
+#       is 54MHz. To select other clock frequency for your application, put
+#       line like this in application Makefile: 
+#       LDFLAGS += -qclock=40000000
+#
+#     - Select between RAM or ROM images. By default, RAM image generated
+#       which may be loaded starting from address 0x30000000 to the RAM.
+#       To prepare image intended to be stored in ROM, put the following
+#       line to the application Makefile:
+#       LDFLAGS += -qflash
+#
+#       You may select other memory configuration providing your own
+#       linker script.
+#
+
+BSP NAME:	    mcf5206elite
+BOARD:              MCF5206eLITE Evaluation Board
+BUS:                none
+CPU FAMILY:         Motorola ColdFire
+COPROCESSORS:       none
+MODE:               not applicable
+DEBUG MONITOR:      none (Hardware provides BDM)
+
+PERIPHERALS
+===========
+TIMERS:             PIT, Watchdog(disabled)
+  RESOLUTION:       one microsecond
+SERIAL PORTS:       2 UART
+REAL-TIME CLOCK:    DS1307
+NVRAM:              DS1307
+DMA:                2 general purpose
+VIDEO:              none
+SCSI:               none
+NETWORKING:         none
+I2C BUS:            MCF5206e MBUS module
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       Programmable Interval Timer
+IOSUPP DRIVER:      UART 1
+SHMSUPP:            none
+TIMER DRIVER:       yes
+I2C DRIVER:         yes
+
+STDIO
+=====
+PORT:               UART 1
+ELECTRICAL:         EIA-232
+BAUD:               19200
+BITS PER CHARACTER: 8
+PARITY:             None
+STOP BITS:          1
+
+NOTES
+=====
+
+Board description
+-----------------
+clock rate:	54 MHz default (other oscillator can be installed)
+bus width:	16-bit PROM, 32-bit external SRAM
+ROM:		Flash memory device AM29LV800BB, 1 MByte, 3 wait states, 
+                chip select 0
+RAM:            Static RAM 2xMCM69F737TQ, 1 MByte, 1 wait state, chip select 2
+
+Host System
+-----------
+RedHat 6.2 (Linux 2.2.14), RedHat 7.0 (Linux 2.2.17)
+
+Verification
+------------
+Single processor tests:  passed
+Multi-processort tests:  not applicable
+Timing tests: passed
+
diff --git a/bsps/m68k/mcf52235/README b/bsps/m68k/mcf52235/README
new file mode 100644
index 0000000000..a5da02f8c6
--- /dev/null
+++ b/bsps/m68k/mcf52235/README
@@ -0,0 +1,153 @@
+Description: Motorola MCF52235EVB
+============================================================================
+CPU: MCF52235, 60MHz
+SRAM: 32K
+FLASH: 256K
+
+This is a Motorola evaluation board that uses the MCF52235 Coldfire CPU. 
+This board is running at 60MHz scaled from a 25MHz oscillator.
+
+============================================================================
+NOTES:
+
+Currently this BSP must be configured with most RTEMS features turned
+off as RAM usage is too high.
+
+Configure as follows:
+configure --target=m68k-rtems4.XXX --enable-rtemsbsp=mcf52235 \
+
+To get the tests to compile (but not run) change the linkcmds to specify
+a larger sram memory region (256K works).  This of course will let you 
+compile all tests, but many or most of them wont run.
+
+See testsuites/samples/minumum for an example of what type of config flags
+you need for this BSP!
+
+In you project before you include confdefs.h, define some or all of the
+following:
+
+#define CONFIGURE_INIT_TASK_STACK_SIZE x
+#define CONFIGURE_MINIMUM_TASK_STACK_SIZE x
+#define CONFIGURE_INTERRUPT_STACK_SIZE x
+
+Note that the default stack size is 1K
+Note that the default number of priorities is 15
+
+============================================================================
+TODO:
+
+*) Add drivers for I2C, ADC, FEC
+*) Support for LWIP
+*) Update the coverhd.h (calling overheads) page 21 of the BSP guide
+*) Recover the 1K stack space reserved in linkcmds used for board startup.
+
+============================================================================
+
+      Interrupt map
+
++-----+-----------------------------------------------------------------------+
+|     |                                PRIORITY                               |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|LEVEL|    7   |    6   |    5   |    4   |    3   |    2   |    1   |    0   |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  7  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  6  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  5  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  4  |        |        |        |        |        |        |        |   PIT  |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  3  | UART 0 | UART 1 | UART 2 |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  2  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  1  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+ 
+
+============================================================================
+
+*** TIME TEST 1 ***
+rtems_semaphore_create 8
+rtems_semaphore_delete 10
+rtems_semaphore_obtain: available 3
+rtems_semaphore_obtain: not available -- NO_WAIT 3
+rtems_semaphore_release: no waiting tasks 7
+*** END OF TEST 1 ***
+
+
+*** TIME TEST OVERHEAD ***
+rtems_shutdown_executive 0
+rtems_task_create 0
+rtems_task_ident 0
+rtems_task_start 0
+rtems_task_restart 0
+rtems_task_delete 0
+rtems_task_suspend 0
+rtems_task_resume 0
+rtems_task_set_priority 0
+rtems_task_mode 0
+rtems_task_wake_when 0
+rtems_task_wake_after 0
+rtems_interrupt_catch 0
+rtems_clock_get 0
+rtems_clock_set 0
+rtems_clock_tick 0
+<pause>
+rtems_timer_create 0
+rtems_timer_delete 0
+rtems_timer_ident 0
+rtems_timer_fire_after 0
+rtems_timer_fire_when 1
+rtems_timer_reset 0
+rtems_timer_cancel 0
+rtems_semaphore_create 0
+rtems_semaphore_delete 0
+rtems_semaphore_ident 0
+rtems_semaphore_obtain 0
+rtems_semaphore_release 0
+rtems_message_queue_create 0
+rtems_message_queue_ident 0
+rtems_message_queue_delete 0
+rtems_message_queue_send 0
+rtems_message_queue_urgent 0
+rtems_message_queue_broadcast 0
+rtems_message_queue_receive 0
+rtems_message_queue_flush 0
+<pause>
+rtems_event_send 0
+rtems_event_receive 0
+rtems_signal_catch 0
+rtems_signal_send 0
+rtems_partition_create 0
+rtems_partition_ident 0
+rtems_partition_delete 0
+rtems_partition_get_buffer 0
+rtems_partition_return_buffer 0
+rtems_region_create 0
+rtems_region_ident 0
+rtems_region_delete 0
+rtems_region_get_segment 0
+rtems_region_return_segment 0
+rtems_port_create 0
+rtems_port_ident 0
+rtems_port_delete 0
+rtems_port_external_to_internal 0
+rtems_port_internal_to_external 0
+<pause>
+rtems_io_initialize 0
+rtems_io_open 0
+rtems_io_close 0
+rtems_io_read 0
+rtems_io_write 0
+rtems_io_control 0
+rtems_fatal_error_occurred 0
+rtems_rate_monotonic_create 0
+rtems_rate_monotonic_ident 0
+rtems_rate_monotonic_delete 0
+rtems_rate_monotonic_cancel 0
+rtems_rate_monotonic_period 0
+rtems_multiprocessing_announce 0
+*** END OF TIME OVERHEAD ***
+
+
diff --git a/bsps/m68k/mcf52235/gdb-init b/bsps/m68k/mcf52235/gdb-init
new file mode 100644
index 0000000000..cb94382b4d
--- /dev/null
+++ b/bsps/m68k/mcf52235/gdb-init
@@ -0,0 +1,48 @@
+#
+# Show the exception stack frame.
+#
+define show-exception-sframe
+ set $frsr = *(unsigned short *)((unsigned long)$sp + 2)
+ set $frpc = *(unsigned long *)((unsigned long)$sp + 4)
+ set $frfvo = *(unsigned short *)((unsigned long)$sp + 0)
+ set $frcode = $frfvo >> 12
+ set $frvect = ($frfvo & 0xFFF) >> 2
+ set $frstatus = ((($frfvo >> 10) & 3) << 2) | ($frfvo & 3)
+ printf "EXCEPTION -- SR:0x%X  PC:0x%X  FRAME:0x%x  VECTOR:%d  STATUS:%d\n", $frsr, $frpc, $frcode, $frvect, $frstatus
+ if $frstatus == 4
+  printf " Fault Type: Error on instruction fetch"
+ end
+ if $frstatus == 8
+  printf " Fault Type: Error on operand write"
+ end
+ if $frstatus == 12
+  printf " Fault Type: Error on operand read"
+ end
+ if $frstatus == 9
+  printf " Fault Type: Attempted write to write-protected space"
+ end
+end
+
+# Add -v and -d flags for bdm info
+# Add -B flags to utilize hardware breakpoints when they are availiable
+
+#target remote | m68k-bdm-gdbserver pipe /dev/bdmcf0
+target remote | m68k-bdm-gdbserver pipe /dev/tblcf2 -B
+#monitor set remote-debug 1
+
+monitor bdm-reset
+
+# Set VBR to the beginning of what will be SRAM
+monitor bdm-ctl-set 0x0801 0x20000000
+
+# Set RAMBAR1
+monitor bdm-ctl-set 0x0C05 0x20000021
+
+# Set FLASHBAR
+monitor bdm-ctl-set 0x0C04 0x00000061
+
+# Enable PST[3:0] signals
+set *((char*) 0x40100074) = 0x0F
+
+# Add the load when debugging from ram which won't happen with rtems!
+#load
diff --git a/bsps/m68k/mcf5225x/README b/bsps/m68k/mcf5225x/README
new file mode 100644
index 0000000000..883ff74974
--- /dev/null
+++ b/bsps/m68k/mcf5225x/README
@@ -0,0 +1,156 @@
+Description: embed-it dpu
+============================================================================
+CPU: MCF52259, ??MHz
+SRAM: 64K
+FLASH: 512K
+
+This is a embed-it board that uses the MCF52258 Coldfire CPU. 
+This board is running at ??MHz scaled from the internal relocation 8MHz oscillator.
+
+
+
+OLD-STUFF from MCF52235 EVB ... we have to change it ...
+============================================================================
+NOTES:
+
+Currently this BSP must be configured with most RTEMS features turned
+off as RAM usage is too high.
+
+Configure as follows:
+configure --target=m68k-rtems4.XXX --enable-rtemsbsp=mcf52235 ...
+
+To get the tests to compile (but not run) change the linkcmds to specify
+a larger sram memory region (256K works).  This of course will let you 
+compile all tests, but many or most of them wont run.
+
+See testsuites/samples/minumum for an example of what type of config flags
+you need for this BSP!
+
+In you project before you include confdefs.h, define some or all of the
+following:
+
+#define CONFIGURE_INIT_TASK_STACK_SIZE x
+#define CONFIGURE_MINIMUM_TASK_STACK_SIZE x
+#define CONFIGURE_INTERRUPT_STACK_SIZE x
+
+Note that the default stack size is 1K
+Note that the default number of priorities is 15
+
+============================================================================
+TODO:
+
+*) Add drivers for I2C, ADC, FEC
+*) Support for LWIP
+*) Update the coverhd.h (calling overheads) page 21 of the BSP guide
+*) Recover the 1K stack space reserved in linkcmds used for board startup.
+
+============================================================================
+
+      Interrupt map
+
++-----+-----------------------------------------------------------------------+
+|     |                                PRIORITY                               |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|LEVEL|    7   |    6   |    5   |    4   |    3   |    2   |    1   |    0   |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  7  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  6  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  5  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  4  |        |        |        |        |        |        |        |   PIT  |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  3  | UART 0 | UART 1 | UART 2 |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  2  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  1  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+ 
+
+============================================================================
+
+*** TIME TEST 1 ***
+rtems_semaphore_create 8
+rtems_semaphore_delete 10
+rtems_semaphore_obtain: available 3
+rtems_semaphore_obtain: not available -- NO_WAIT 3
+rtems_semaphore_release: no waiting tasks 7
+*** END OF TEST 1 ***
+
+
+*** TIME TEST OVERHEAD ***
+rtems_shutdown_executive 0
+rtems_task_create 0
+rtems_task_ident 0
+rtems_task_start 0
+rtems_task_restart 0
+rtems_task_delete 0
+rtems_task_suspend 0
+rtems_task_resume 0
+rtems_task_set_priority 0
+rtems_task_mode 0
+rtems_task_wake_when 0
+rtems_task_wake_after 0
+rtems_interrupt_catch 0
+rtems_clock_get 0
+rtems_clock_set 0
+rtems_clock_tick 0
+<pause>
+rtems_timer_create 0
+rtems_timer_delete 0
+rtems_timer_ident 0
+rtems_timer_fire_after 0
+rtems_timer_fire_when 1
+rtems_timer_reset 0
+rtems_timer_cancel 0
+rtems_semaphore_create 0
+rtems_semaphore_delete 0
+rtems_semaphore_ident 0
+rtems_semaphore_obtain 0
+rtems_semaphore_release 0
+rtems_message_queue_create 0
+rtems_message_queue_ident 0
+rtems_message_queue_delete 0
+rtems_message_queue_send 0
+rtems_message_queue_urgent 0
+rtems_message_queue_broadcast 0
+rtems_message_queue_receive 0
+rtems_message_queue_flush 0
+<pause>
+rtems_event_send 0
+rtems_event_receive 0
+rtems_signal_catch 0
+rtems_signal_send 0
+rtems_partition_create 0
+rtems_partition_ident 0
+rtems_partition_delete 0
+rtems_partition_get_buffer 0
+rtems_partition_return_buffer 0
+rtems_region_create 0
+rtems_region_ident 0
+rtems_region_delete 0
+rtems_region_get_segment 0
+rtems_region_return_segment 0
+rtems_port_create 0
+rtems_port_ident 0
+rtems_port_delete 0
+rtems_port_external_to_internal 0
+rtems_port_internal_to_external 0
+<pause>
+rtems_io_initialize 0
+rtems_io_open 0
+rtems_io_close 0
+rtems_io_read 0
+rtems_io_write 0
+rtems_io_control 0
+rtems_fatal_error_occurred 0
+rtems_rate_monotonic_create 0
+rtems_rate_monotonic_ident 0
+rtems_rate_monotonic_delete 0
+rtems_rate_monotonic_cancel 0
+rtems_rate_monotonic_period 0
+rtems_multiprocessing_announce 0
+*** END OF TIME OVERHEAD ***
+
+
diff --git a/bsps/m68k/mcf5225x/gdb-init b/bsps/m68k/mcf5225x/gdb-init
new file mode 100644
index 0000000000..cb94382b4d
--- /dev/null
+++ b/bsps/m68k/mcf5225x/gdb-init
@@ -0,0 +1,48 @@
+#
+# Show the exception stack frame.
+#
+define show-exception-sframe
+ set $frsr = *(unsigned short *)((unsigned long)$sp + 2)
+ set $frpc = *(unsigned long *)((unsigned long)$sp + 4)
+ set $frfvo = *(unsigned short *)((unsigned long)$sp + 0)
+ set $frcode = $frfvo >> 12
+ set $frvect = ($frfvo & 0xFFF) >> 2
+ set $frstatus = ((($frfvo >> 10) & 3) << 2) | ($frfvo & 3)
+ printf "EXCEPTION -- SR:0x%X  PC:0x%X  FRAME:0x%x  VECTOR:%d  STATUS:%d\n", $frsr, $frpc, $frcode, $frvect, $frstatus
+ if $frstatus == 4
+  printf " Fault Type: Error on instruction fetch"
+ end
+ if $frstatus == 8
+  printf " Fault Type: Error on operand write"
+ end
+ if $frstatus == 12
+  printf " Fault Type: Error on operand read"
+ end
+ if $frstatus == 9
+  printf " Fault Type: Attempted write to write-protected space"
+ end
+end
+
+# Add -v and -d flags for bdm info
+# Add -B flags to utilize hardware breakpoints when they are availiable
+
+#target remote | m68k-bdm-gdbserver pipe /dev/bdmcf0
+target remote | m68k-bdm-gdbserver pipe /dev/tblcf2 -B
+#monitor set remote-debug 1
+
+monitor bdm-reset
+
+# Set VBR to the beginning of what will be SRAM
+monitor bdm-ctl-set 0x0801 0x20000000
+
+# Set RAMBAR1
+monitor bdm-ctl-set 0x0C05 0x20000021
+
+# Set FLASHBAR
+monitor bdm-ctl-set 0x0C04 0x00000061
+
+# Enable PST[3:0] signals
+set *((char*) 0x40100074) = 0x0F
+
+# Add the load when debugging from ram which won't happen with rtems!
+#load
diff --git a/bsps/m68k/mcf5235/README b/bsps/m68k/mcf5235/README
new file mode 100644
index 0000000000..04fa19574a
--- /dev/null
+++ b/bsps/m68k/mcf5235/README
@@ -0,0 +1,443 @@
+Description: Motorola MCF5235EVB
+============
+CPU: MCF5235, 150MHz
+RAM: 16M
+ROM: 2M
+
+This is a Motorola evaluation board that uses the MCF5235 Coldfire CPU. 
+This board is running at 150MHz scaled from a 25MHz oscillator.
+
+By default the BSP creates an image file for use when loaded into the
+RAM of the evaluation board.  To create an image file to boot from flash
+add the following command to the applications Makefile:
+LDFLAGS += -qnolinkcmds -T linkcmdsflash
+
+Note: This BSP has also been tested with the Freescale / Axiom Manufacturing
+(M5235BCC Business Card Controller) evaluation board.
+
+ACKNOWLEDGEMENTS:
+=================
+This BSP is heavily based on the work of:
+    D. Peter Siddons
+    Brett Swimley
+    Jay Monkman
+    Eric Norum
+    Mike Bertosh
+     
+BSP NAME:           mcf5235
+BOARD:              Motorola MCF5235EVB
+CPU FAMILY:         ColdFire 5235
+CPU:                MCF5235
+COPROCESSORS:       N/A
+
+DEBUG MONITOR:      dBUG
+
+PERIPHERALS
+===========
+TIMERS:             Four PIT (RTEMS clock is PIT3), Four Timers
+RESOLUTION:         10 microsecond 
+SERIAL PORTS:       Internal UART 1, 2 and 3
+REAL-TIME CLOCK:    none
+DMA:                none
+VIDEO:              none
+SCSI:               none
+NETWORKING:         Internal 10/100MHz FEC
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       PIT3
+IOSUPP DRIVER:      none
+SHMSUPP:            none
+TIMER DRIVER:       TIMER3
+TTY DRIVER:         UART1, 2 and 3
+
+STDIO
+=====
+PORT:               UART0 Terminal
+ELECTRICAL:         RS-232
+BAUD:               19200
+BITS PER CHARACTER: 8
+PARITY:             None
+STOP BITS:          1
+
+
+
+      Memory map as set up by dBUG bootstrap and BSP initialization
+
+          +--------------------------------------------------+
+0000 0000 |       16 MByte SDRAM                             | 00FF FFFF
+0100 0000 |  ---------------------------------------------   |
+          |    Address space for future SDRAM expansion      |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 0FFF FFFF
+          +--------------------------------------------------+
+1000 0000 |                                                  |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 1FFF FFFF
+          +--------------------------------------------------+
+2000 0000 | 64 kByte on-chip SRAM (RAMBAR)                   |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 2FFF FFFF
+          +--------------------------------------------------+
+3000 0000 |                                                  | 30FF FFFF
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 3FFF FFFF
+          +--------------------------------------------------+
+4000 0000 | Internal peripheral system (IPSBAR)              |
+          .                                                  .
+          |                                                  |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 4FFF FFFF
+          +--------------------------------------------------+
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          +--------------------------------------------------+
+FFE0 0000 | External 4 MByte Flash                           |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | FFFF FFFF
+          +--------------------------------------------------+
+
+============================================================================
+      Interrupt map
+
++-----+-----------------------------------------------------------------------+
+|     |                                PRIORITY                               |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|LEVEL|    7   |    6   |    5   |    4   |    3   |    2   |    1   |    0   |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  7  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  6  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  5  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  4  | FEC RX | FEC TX |        |        |        |        |        |   PIT  |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  3  | UART 0 | UART 1 | UART 2 |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  2  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  1  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+
+============================================================================
+TIMING TESTS
+************************************
+*** TIME TEST 1 ***
+rtems_semaphore_create 12
+rtems_semaphore_delete 11
+rtems_semaphore_obtain: available 2
+rtems_semaphore_obtain: not available -- NO_WAIT 3
+rtems_semaphore_release: no waiting tasks 6
+*** END OF TEST 1 ***
+
+*** TIME TEST 2 ***
+rtems_semaphore_obtain: not available -- caller blocks 18
+*** END OF TEST 2 ***
+
+*** TIME TEST 3 ***
+rtems_semaphore_release: task readied -- preempts caller 12
+*** END OF TEST 3 ***
+
+*** TIME TEST 4 ***
+rtems_task_restart: blocked task -- preempts caller 31
+rtems_task_restart: ready task -- preempts caller 30
+rtems_semaphore_release: task readied -- returns to caller 8
+rtems_task_create 45
+rtems_task_start 9
+rtems_task_restart: suspended task -- returns to caller 14
+rtems_task_delete: suspended task 32
+rtems_task_restart: ready task -- returns to caller 14
+rtems_task_restart: blocked task -- returns to caller 21
+rtems_task_delete: blocked task 32
+*** END OF TEST 4 ***
+
+*** TIME TEST 5 ***
+rtems_task_suspend: calling task 15
+rtems_task_resume: task readied -- preempts caller 9
+*** END OF TEST 5 ***
+
+*** TIME TEST 6 ***
+rtems_task_restart: calling task 12
+rtems_task_suspend: returns to caller 5
+rtems_task_resume: task readied -- returns to caller 6
+rtems_task_delete: ready task 34
+*** END OF TEST 6 ***
+
+*** TIME TEST 7 ***
+rtems_task_restart: suspended task -- preempts caller 22
+*** END OF TEST 7 ***
+
+*** TIME TEST 9 ***
+rtems_message_queue_create 37
+rtems_message_queue_send: no waiting tasks 11
+rtems_message_queue_urgent: no waiting tasks 10
+rtems_message_queue_receive: available 10
+rtems_message_queue_flush: no messages flushed 3
+rtems_message_queue_flush: messages flushed 5
+rtems_message_queue_delete 17
+*** END OF TEST 9 ***
+
+*** TIME TEST 10 ***
+rtems_message_queue_receive: not available -- NO_WAIT 6
+rtems_message_queue_receive: not available -- caller blocks 20
+*** END OF TEST 10 ***
+
+*** TIME TEST 11 ***
+rtems_message_queue_send: task readied -- preempts caller 17
+*** END OF TEST 11 ***
+
+*** TIME TEST 12 ***
+rtems_message_queue_send: task readied -- returns to caller 12
+*** END OF TEST 12 ***
+
+*** TIME TEST 13 ***
+rtems_message_queue_urgent: task readied -- preempts caller 20
+*** END OF TEST 13 ***
+
+*** TIME TEST 14 ***
+rtems_message_queue_urgent: task readied -- returns to caller 14
+*** END OF TEST 14 ***
+
+*** TIME TEST 15 ***
+rtems_event_receive: obtain current events 0
+rtems_event_receive: not available -- NO_WAIT 3
+rtems_event_receive: not available -- caller blocks 18
+rtems_event_send: no task readied 3
+rtems_event_receive: available 5
+rtems_event_send: task readied -- returns to caller 7
+*** END OF TEST 15 ***
+
+*** TIME TEST 16 ***
+rtems_event_send: task readied -- preempts caller 12
+*** END OF TEST 16 ***
+
+*** TIME TEST 17 ***
+rtems_task_set_priority: preempts caller 21
+*** END OF TEST 17 ***
+
+*** TIME TEST 18 ***
+rtems_task_delete: calling task 40
+*** END OF TEST 18 ***
+
+*** TIME TEST 19 ***
+rtems_signal_catch 3
+rtems_signal_send: returns to caller 6
+rtems_signal_send: signal to self 11
+exit ASR overhead: returns to calling task 8
+exit ASR overhead: returns to preempting task 10
+*** END OF TEST 19 ***
+
+*** TIME TEST 20 ***
+rtems_partition_create 13
+rtems_region_create 24
+rtems_partition_get_buffer: available 6
+rtems_partition_get_buffer: not available 4
+rtems_partition_return_buffer 6
+rtems_partition_delete 6
+rtems_region_get_segment: available 12
+rtems_region_get_segment: not available -- NO_WAIT 13
+rtems_region_return_segment: no waiting tasks 12
+rtems_region_get_segment: not available -- caller blocks 30
+rtems_region_return_segment: task readied -- preempts caller 40
+rtems_region_return_segment: task readied -- returns to caller 25
+rtems_region_delete 12
+rtems_io_initialize 0
+rtems_io_open 0
+rtems_io_close 0
+rtems_io_read 0
+rtems_io_write 0
+rtems_io_control 0
+*** END OF TEST 20 ***
+
+*** TIME TEST 21 ***
+rtems_task_ident 31
+rtems_message_queue_ident 30
+rtems_semaphore_ident 34
+rtems_partition_ident 30
+rtems_region_ident 30
+rtems_port_ident 29
+rtems_timer_ident 30
+rtems_rate_monotonic_ident 30
+*** END OF TEST 21 ***
+
+*** TIME TEST 22 ***
+rtems_message_queue_broadcast: task readied -- returns to caller 19
+rtems_message_queue_broadcast: no waiting tasks 6
+rtems_message_queue_broadcast: task readied -- preempts caller 20
+*** END OF TEST 22 ***
+
+*** TIME TEST 23 ***
+rtems_timer_create 4
+rtems_timer_fire_after: inactive 6
+rtems_timer_fire_after: active 6
+rtems_timer_cancel: active 4
+rtems_timer_cancel: inactive 3
+rtems_timer_reset: inactive 6
+rtems_timer_reset: active 6
+rtems_timer_fire_when: inactive 8
+rtems_timer_fire_when: active 8
+rtems_timer_delete: active 5
+rtems_timer_delete: inactive 5
+rtems_task_wake_when 16
+*** END OF TEST 23 ***
+
+*** TIME TEST 24 ***
+rtems_task_wake_after: yield -- returns to caller 2
+rtems_task_wake_after: yields -- preempts caller 12
+*** END OF TEST 24 ***
+
+*** TIME TEST 25 ***
+rtems_clock_tick 4
+*** END OF TEST 25 ***
+
+*** TIME TEST 26 ***
+_ISR_Disable 0
+_ISR_Flash 0
+_ISR_Enable 0
+_Thread_Disable_dispatch 0
+_Thread_Enable_dispatch 1
+_Thread_Set_state 4
+_Thread_Disptach (NO FP) 9
+context switch: no floating point contexts 7
+context switch: self 1
+context switch: to another task 1
+fp context switch: restore 1st FP task 6
+fp context switch: save idle, restore initialized 2
+fp context switch: save idle, restore idle 6
+fp context switch: save initialized, restore initialized 1
+_Thread_Resume 4
+_Thread_Unblock 3
+_Thread_Ready 2
+_Thread_Get 0
+_Semaphore_Get 0
+_Thread_Get: invalid id 0
+*** END OF TEST 26 ***
+
+*** TIME TEST 27 ***
+interrupt entry overhead: returns to interrupted task 2
+interrupt exit overhead: returns to interrupted task 1
+interrupt entry overhead: returns to nested interrupt 1
+interrupt exit overhead: returns to nested interrupt 1
+interrupt entry overhead: returns to preempting task 2
+interrupt exit overhead: returns to preempting task 12
+*** END OF TEST 27 ***
+
+*** TIME TEST 28 ***
+rtems_port_create 8
+rtems_port_external_to_internal 2
+rtems_port_internal_to_external 3
+rtems_port_delete 7
+*** END OF TEST 28 ***
+
+*** TIME TEST 29 ***
+rtems_rate_monotonic_create 8
+rtems_rate_monotonic_period: initiate period -- returns to caller 12
+rtems_rate_monotonic_period: obtain status 5
+rtems_rate_monotonic_cancel 7
+rtems_rate_monotonic_delete: inactive 8
+rtems_rate_monotonic_delete: active 7
+rtems_rate_monotonic_period: conclude periods -- caller blocks 11
+*** END OF TEST 29 ***
+
+*** TIME CHECKER ***
+Units may not be in microseconds for this test!!!
+0 100000
+Total time = 0
+Average time = 0
+<pause>
+NULL timer stopped at 0
+LOOP (1000) timer stopped at 94
+LOOP (10000) timer stopped at 941
+LOOP (50000) timer stopped at 4704
+LOOP (100000) timer stopped at 9408
+*** END OF TIME CHECKER ***
+
+*** TIME TEST OVERHEAD ***
+rtems_initialize_executive 0
+rtems_shutdown_executive 0
+rtems_task_create 0
+rtems_task_ident 0
+rtems_task_start 0
+rtems_task_restart 0
+rtems_task_delete 0
+rtems_task_suspend 0
+rtems_task_resume 0
+rtems_task_set_priority 0
+rtems_task_mode 0
+rtems_task_wake_when 0
+rtems_task_wake_after 0
+rtems_interrupt_catch 0
+rtems_clock_get 0
+rtems_clock_set 0
+rtems_clock_tick 0
+<pause>
+rtems_timer_create 0
+rtems_timer_delete 0
+rtems_timer_ident 0
+rtems_timer_fire_after 0
+rtems_timer_fire_when 0
+rtems_timer_reset 0
+rtems_timer_cancel 0
+rtems_semaphore_create 0
+rtems_semaphore_delete 0
+rtems_semaphore_ident 0
+rtems_semaphore_obtain 0
+rtems_semaphore_release 0
+rtems_message_queue_create 0
+rtems_message_queue_ident 0
+rtems_message_queue_delete 0
+rtems_message_queue_send 0
+rtems_message_queue_urgent 0
+rtems_message_queue_broadcast 0
+rtems_message_queue_receive 0
+rtems_message_queue_flush 0
+<pause>
+rtems_event_send 0
+rtems_event_receive 0
+rtems_signal_catch 0
+rtems_signal_send 0
+rtems_partition_create 0
+rtems_partition_ident 0
+rtems_partition_delete 0
+rtems_partition_get_buffer 0
+rtems_partition_return_buffer 0
+rtems_region_create 0
+rtems_region_ident 0
+rtems_region_delete 0
+rtems_region_get_segment 0
+rtems_region_return_segment 0
+rtems_port_create 0
+rtems_port_ident 0
+rtems_port_delete 0
+rtems_port_external_to_internal 0
+rtems_port_internal_to_external 0
+<pause>
+rtems_io_initialize 0
+rtems_io_open 0
+rtems_io_close 0
+rtems_io_read 0
+rtems_io_write 0
+rtems_io_control 0
+rtems_fatal_error_occurred 0
+rtems_rate_monotonic_create 0
+rtems_rate_monotonic_ident 0
+rtems_rate_monotonic_delete 0
+rtems_rate_monotonic_cancel 0
+rtems_rate_monotonic_period 0
+rtems_multiprocessing_announce 0
+*** END OF TIME OVERHEAD ***
diff --git a/bsps/m68k/mcf5235/gdb-init b/bsps/m68k/mcf5235/gdb-init
new file mode 100644
index 0000000000..ec0628ad46
--- /dev/null
+++ b/bsps/m68k/mcf5235/gdb-init
@@ -0,0 +1,54 @@
+#
+# Connect to the target.
+# 
+target remote | m68k-bdm-gdbserver pipe /dev/bdmcf0
+
+#
+# The console loop in the Axman dbug monitor. Found by trial and error
+# with the debugger.
+#
+thb *0xffe254c0
+
+#
+# Show the exception stack frame.
+#
+define show-exception-sframe
+ set $frsr = *(unsigned short *)((unsigned long)$sp + 2)
+ set $frpc = *(unsigned long *)((unsigned long)$sp + 4)
+ set $frfvo = *(unsigned short *)((unsigned long)$sp + 0)
+ set $frcode = $frfvo >> 12
+ set $frvect = ($frfvo & 0xFFF) >> 2
+ set $frstatus = ((($frfvo >> 10) & 3) << 2) | ($frfvo & 3)
+ printf "EXCEPTION -- SR:0x%X  PC:0x%X  FRAME:0x%x  VECTOR:%d  STATUS:%d\n", $frsr, $frpc, $frcode, $frvect, $frstatus
+ if $frstatus == 4
+  printf " Fault Type: Error on instruction fetch"
+ end
+ if $frstatus == 8
+  printf " Fault Type: Error on operand write"
+ end
+ if $frstatus == 12
+  printf " Fault Type: Error on operand read"
+ end
+ if $frstatus == 9
+  printf " Fault Type: Attempted write to write-protected space"
+ end
+end
+
+#
+# Run to initialise the RAM. The target will stop when the
+# breakpoint is hit. Load the program.
+#
+c
+load
+
+#
+# Break on an exception.
+#
+b _uhoh
+
+#
+# Travel to main then stop.
+#
+tb main
+c
+
diff --git a/bsps/m68k/mcf5329/README b/bsps/m68k/mcf5329/README
new file mode 100644
index 0000000000..5b4a942af8
--- /dev/null
+++ b/bsps/m68k/mcf5329/README
@@ -0,0 +1,342 @@
+Description: Motorola MCF5329EVB Zoom + (LogicPD)
+============
+CPU: MCF5329, 240MHz
+CORESRAM: 32K
+FLASH: 2M
+DRAM: 32M
+
+This is a Motorola Zoom evaluation board that uses the MCF5329 Coldfire CPU on
+a logicPD card.  This board is running at 240MHz with DRAM clocking at 80MHz.
+
+The bsp is configured for the MT46V16M16TG-75:F DRAM.
+
+NOTES:
+======
+
+This BSP is based heavily off the 5235 BSP.
+
+TODO:
+======
+
+Add other drivers for can, i2c, lcd (fb), qspi etc.
+
+============================================================================
+
+      Interrupt map
+
++-----+
+|     |
++-----+
+|LEVEL|
++-----+
+|  7  |
++-----+
+|  6  |
++-----+
+|  5  |
++-----+
+|  4  | FEC RX, FEC TX, PIT
++-----+
+|  3  | UART 0, UART 1, UART 2
++-----+
+|  2  |
++-----+
+|  1  |
++-----+
+
+============================================================================
+      Timings
+
+*** TIME TEST 1 ***
+rtems_semaphore_create 11
+rtems_semaphore_delete 9
+rtems_semaphore_obtain: available 0
+rtems_semaphore_obtain: not available -- NO_WAIT 0
+rtems_semaphore_release: no waiting tasks 2
+*** END OF TEST 1 ***
+
+*** TIME TEST 2 ***
+rtems_semaphore_obtain: not available -- caller blocks 14
+*** END OF TEST 2 ***
+
+*** TIME TEST 3 ***
+rtems_semaphore_release: task readied -- preempts caller 11
+*** END OF TEST 3 ***
+
+*** TIME TEST 4 ***
+rtems_task_restart: blocked task -- preempts caller 24
+rtems_task_restart: ready task -- preempts caller 15
+rtems_semaphore_release: task readied -- returns to caller 3
+rtems_task_create 40
+rtems_task_start 7
+rtems_task_restart: suspended task -- returns to caller 8
+rtems_task_delete: suspended task 18
+rtems_task_restart: ready task -- returns to caller 9
+rtems_task_restart: blocked task -- returns to caller 10
+rtems_task_delete: blocked task 19
+*** END OF TEST 4 ***
+
+*** TIME TEST 5 ***
+rtems_task_suspend: calling task 11
+rtems_task_resume: task readied -- preempts caller 9
+*** END OF TEST 5 ***
+
+*** TIME TEST 6 ***
+rtems_task_restart: calling task 4
+rtems_task_suspend: returns to caller 2
+rtems_task_resume: task readied -- returns to caller 2
+rtems_task_delete: ready task 19
+*** END OF TEST 6 ***
+
+*** TIME TEST 7 ***
+rtems_task_restart: suspended task -- preempts caller 15
+*** END OF TEST 7 ***
+
+*** TIME TEST 9 ***
+rtems_message_queue_create 45
+rtems_message_queue_send: no waiting tasks 2
+rtems_message_queue_urgent: no waiting tasks 2
+rtems_message_queue_receive: available 3
+rtems_message_queue_flush: no messages flushed 1
+rtems_message_queue_flush: messages flushed 1
+rtems_message_queue_delete 12
+*** END OF TEST 9 ***
+
+*** TIME TEST 10 ***
+rtems_message_queue_receive: not available -- NO_WAIT 1
+rtems_message_queue_receive: not available -- caller blocks 14
+*** END OF TEST 10 ***
+
+*** TIME TEST 11 ***
+rtems_message_queue_send: task readied -- preempts caller 13
+*** END OF TEST 11 ***
+
+*** TIME TEST 12 ***
+rtems_message_queue_send: task readied -- returns to caller 5
+*** END OF TEST 12 ***
+
+*** TIME TEST 13 ***
+rtems_message_queue_urgent: task readied -- preempts caller 13
+*** END OF TEST 13 ***
+
+*** TIME TEST 14 ***
+rtems_message_queue_urgent: task readied -- returns to caller 5
+*** END OF TEST 14 ***
+
+*** TIME TEST 15 ***
+rtems_event_receive: obtain current events 0
+rtems_event_receive: not available -- NO_WAIT 1
+rtems_event_receive: not available -- caller blocks 12
+rtems_event_send: no task readied 1
+rtems_event_receive: available 3
+rtems_event_send: task readied -- returns to caller 4
+*** END OF TEST 15 ***
+
+*** TIME TEST 16 ***
+rtems_event_send: task readied -- preempts caller 13
+*** END OF TEST 16 ***
+
+*** TIME TEST 17 ***
+rtems_task_set_priority: preempts caller 13
+*** END OF TEST 17 ***
+
+*** TIME TEST 18 ***
+rtems_task_delete: calling task 30
+*** END OF TEST 18 ***
+
+*** TIME TEST 19 ***
+rtems_signal_catch 2
+rtems_signal_send: returns to caller 5
+rtems_signal_send: signal to self 11
+exit ASR overhead: returns to calling task 6
+exit ASR overhead: returns to preempting task 11
+*** END OF TEST 19 ***
+
+*** TIME TEST 20 ***
+rtems_partition_create 15
+rtems_region_create 20
+rtems_partition_get_buffer: available 4
+rtems_partition_get_buffer: not available 1
+rtems_partition_return_buffer 4
+rtems_partition_delete 6
+rtems_region_get_segment: available 6
+rtems_region_get_segment: not available -- NO_WAIT 5
+rtems_region_return_segment: no waiting tasks 5
+rtems_region_get_segment: not available -- caller blocks 29
+rtems_region_return_segment: task readied -- preempts caller 29
+rtems_region_return_segment: task readied -- returns to caller 11
+rtems_region_delete 6
+rtems_io_initialize 0
+rtems_io_open 0
+rtems_io_close 0
+rtems_io_read 0
+rtems_io_write 0
+rtems_io_control 0
+*** END OF TEST 20 ***
+
+*** TIME TEST 21 ***
+rtems_task_ident 4
+rtems_message_queue_ident 3
+rtems_semaphore_ident 4
+rtems_partition_ident 3
+rtems_region_ident 3
+rtems_port_ident 3
+rtems_timer_ident 3
+rtems_rate_monotonic_ident 3
+*** END OF TEST 21 ***
+
+*** TIME TEST 22 ***
+rtems_message_queue_broadcast: task readied -- returns to caller 16
+rtems_message_queue_broadcast: no waiting tasks 2
+rtems_message_queue_broadcast: task readied -- preempts caller 12
+*** END OF TEST 22 ***
+
+*** TIME TEST 23 ***
+rtems_timer_create 2
+rtems_timer_fire_after: inactive 2
+rtems_timer_fire_after: active 1
+rtems_timer_cancel: active 1
+rtems_timer_cancel: inactive 1
+rtems_timer_reset: inactive 2
+rtems_timer_reset: active 2
+rtems_timer_fire_when: inactive 2
+rtems_timer_fire_when: active 2
+rtems_timer_delete: active 2
+rtems_timer_delete: inactive 2
+rtems_task_wake_when 13
+*** END OF TEST 23 ***
+
+*** TIME TEST 24 ***
+rtems_task_wake_after: yield -- returns to caller 0
+rtems_task_wake_after: yields -- preempts caller 9
+*** END OF TEST 24 ***
+
+*** TIME TEST 25 ***
+rtems_clock_tick 10
+*** END OF TEST 25 ***
+
+*** TIME TEST 26 ***
+_ISR_Disable 1
+_ISR_Flash 0
+_ISR_Enable 0
+_Thread_Disable_dispatch 0
+_Thread_Enable_dispatch 1
+_Thread_Set_state 4
+_Thread_Disptach (NO FP) 11
+context switch: no floating point contexts 5
+context switch: self 0
+context switch: to another task 1
+fp context switch: restore 1st FP task 5
+fp context switch: save idle, restore initialized 1
+fp context switch: save idle, restore idle 6
+fp context switch: save initialized, restore initialized 1
+_Thread_Resume 5
+_Thread_Unblock 3
+_Thread_Ready 2
+_Thread_Get 0
+_Semaphore_Get 0
+_Thread_Get: invalid id 0
+*** END OF TEST 26 ***
+
+*** TIME TEST 27 ***
+interrupt entry overhead: returns to interrupted task 1
+interrupt exit overhead: returns to interrupted task 1
+interrupt entry overhead: returns to nested interrupt 0
+interrupt exit overhead: returns to nested interrupt 0
+interrupt entry overhead: returns to preempting task 1
+interrupt exit overhead: returns to preempting task 9
+*** END OF TEST 27 ***
+
+*** TIME TEST 28 ***
+rtems_port_create 5
+rtems_port_external_to_internal 1
+rtems_port_internal_to_external 1
+rtems_port_delete 4
+*** END OF TEST 28 ***
+
+*** TIME TEST 29 ***
+rtems_rate_monotonic_create 8
+rtems_rate_monotonic_period: initiate period -- returns to caller 14
+rtems_rate_monotonic_period: obtain status 3
+rtems_rate_monotonic_cancel 6
+rtems_rate_monotonic_delete: inactive 7
+rtems_rate_monotonic_delete: active 3
+rtems_rate_monotonic_period: conclude periods -- caller blocks 15
+*** END OF TEST 29 ***
+
+
+*** TIME TEST OVERHEAD ***
+rtems_shutdown_executive 0
+rtems_task_create 0
+rtems_task_ident 0
+rtems_task_start 0
+rtems_task_restart 0
+rtems_task_delete 0
+rtems_task_suspend 0
+rtems_task_resume 0
+rtems_task_set_priority 0
+rtems_task_mode 0
+rtems_task_wake_when 0
+rtems_task_wake_after 0
+rtems_interrupt_catch 0
+rtems_clock_get 0
+rtems_clock_set 0
+rtems_clock_tick 0
+<pause>
+rtems_timer_create 0
+rtems_timer_delete 0
+rtems_timer_ident 0
+rtems_timer_fire_after 0
+rtems_timer_fire_when 0
+rtems_timer_reset 0
+rtems_timer_cancel 0
+rtems_semaphore_create 0
+rtems_semaphore_delete 0
+rtems_semaphore_ident 0
+rtems_semaphore_obtain 0
+rtems_semaphore_release 0
+rtems_message_queue_create 0
+rtems_message_queue_ident 0
+rtems_message_queue_delete 0
+rtems_message_queue_send 0
+rtems_message_queue_urgent 0
+rtems_message_queue_broadcast 0
+rtems_message_queue_receive 0
+rtems_message_queue_flush 0
+<pause>
+rtems_event_send 0
+rtems_event_receive 0
+rtems_signal_catch 0
+rtems_signal_send 0
+rtems_partition_create 0
+rtems_partition_ident 0
+rtems_partition_delete 0
+rtems_partition_get_buffer 0
+rtems_partition_return_buffer 0
+rtems_region_create 0
+rtems_region_ident 0
+rtems_region_delete 0
+rtems_region_get_segment 0
+rtems_region_return_segment 0
+rtems_port_create 0
+rtems_port_ident 0
+rtems_port_delete 0
+rtems_port_external_to_internal 0
+rtems_port_internal_to_external 0
+<pause>
+rtems_io_initialize 0
+rtems_io_open 0
+rtems_io_close 0
+rtems_io_read 0
+rtems_io_write 0
+rtems_io_control 0
+rtems_fatal_error_occurred 0
+rtems_rate_monotonic_create 0
+rtems_rate_monotonic_ident 0
+rtems_rate_monotonic_delete 0
+rtems_rate_monotonic_cancel 0
+rtems_rate_monotonic_period 0
+rtems_multiprocessing_announce 0
+*** END OF TIME OVERHEAD ***
+
+
diff --git a/bsps/m68k/mcf5329/gdb-init b/bsps/m68k/mcf5329/gdb-init
new file mode 100644
index 0000000000..fbcf796ce1
--- /dev/null
+++ b/bsps/m68k/mcf5329/gdb-init
@@ -0,0 +1,104 @@
+#target remote | m68k-bdm-gdbserver pipe /dev/bdmcf0 -v -d
+target remote | m68k-bdm-gdbserver pipe /dev/bdmcf0
+
+#monitor set remote-debug 1
+#monitor set debug 1
+monitor bdm-reset
+
+#
+# Show the exception stack frame.
+#
+define show-exception-sframe
+ set $frsr = *(unsigned short *)((unsigned long)$sp + 2)
+ set $frpc = *(unsigned long *)((unsigned long)$sp + 4)
+ set $frfvo = *(unsigned short *)((unsigned long)$sp + 0)
+ set $frcode = $frfvo >> 12
+ set $frvect = ($frfvo & 0xFFF) >> 2
+ set $frstatus = ((($frfvo >> 10) & 3) << 2) | ($frfvo & 3)
+ printf "EXCEPTION -- SR:0x%X  PC:0x%X  FRAME:0x%x  VECTOR:%d  STATUS:%d\n", $frsr, $frpc, $frcode, $frvect, $frstatus
+ if $frstatus == 4
+  printf " Fault Type: Error on instruction fetch"
+ end
+ if $frstatus == 8
+  printf " Fault Type: Error on operand write"
+ end
+ if $frstatus == 12
+  printf " Fault Type: Error on operand read"
+ end
+ if $frstatus == 9
+  printf " Fault Type: Attempted write to write-protected space"
+ end
+end
+
+# I have to do this as there seems to be a problem with me setting up the 
+# chip selects.  As far as I can tell, gdb is probing whats at the program
+# counter.  It issues a 2 byte read (smallest instruction) followed by a
+# 4 byte read (depending on the result of the 2 byte read).  gdb issues these
+# reads after each and every write that the .gdbinit script issues.  This means
+# that as I'm initializing the chip selects the gdb reads can happen in an 
+# invalid memory address and this causes a target bus error.  For now I'm just
+# setting pc to 0, which seems to stop gdb from probing around to read 
+# assembler.  This lets me setup chip selects without error.
+
+set $pc = 0x00000000
+
+# Turn on RAMBAR1 at address 80000000 
+monitor bdm-ctl-set 0x0C05 0x80000221
+
+# Set VBR to the beginning of what will be SDRAM
+# VBR is an absolute CPU register
+monitor bdm-ctl-set 0x0801 0x40000000
+
+# Disable watchdog timer
+set *((short*) 0xFC098000) = 0x0000
+
+#Init CS0
+set *((long*) 0xFC008000) = 0x00000000
+set *((long*) 0xFC008008) = 0x00001FA0
+set *((long*) 0xFC008004) = 0x001F0001
+
+# SDRAM Initialization
+
+monitor delay-ms 100
+
+# SDCS0 
+set *((long*) 0xFC0B8110) = 0x40000018
+# SDCFG1
+set *((long*) 0xFC0B8008) = 0x53722730
+# SDCFG2
+set *((long*) 0xFC0B800C) = 0x56670000
+
+# Issue PALL
+# SDCR
+set *((long*) 0xFC0B8004) = 0xE1092002
+
+# Issue LEMR
+# SDMR
+set *((long*) 0xFC0B8000) = 0x40010000
+
+# Write mode register
+# SDMR
+set *((long*) 0xFC0B8000) = 0x058D0000
+
+# Wait a bit
+monitor delay-ms 600
+
+# Issue PALL
+# SDCR
+set *((long*) 0xFC0B8004) = 0xE1092002
+
+# Perform two refresh cycles
+# SDCR
+set *((long*) 0xFC0B8004) = 0xE1092004
+# SDCR
+set *((long*) 0xFC0B8004) = 0xE1092004
+
+# SDMR
+set *((long*) 0xFC0B8000) = 0x018D0000
+# SDCR
+set *((long*) 0xFC0B8004) = 0x71092C00
+
+# Wait a bit
+monitor delay-ms 100
+
+load
diff --git a/bsps/m68k/mrm332/README b/bsps/m68k/mrm332/README
new file mode 100644
index 0000000000..a1d93e42b5
--- /dev/null
+++ b/bsps/m68k/mrm332/README
@@ -0,0 +1,20 @@
+Description: mrm332
+============
+CPU: MC68332 @16 or 25MHz
+RAM: 32k or 512k
+ROM: 512k flash
+
+   The Mini RoboMind is a small board based on the 68332 microcontroller
+designed and build by Mark Castelluccio.  For details, see:
+
+        http://www.robominds.com
+
+   This BSP was ported from the efi332 BSP by Matt Cross (profesor@gweep.net),
+the efi332 BSP was written by John S Gwynne.
+
+TODO:
+=====
+- integrate the interrupt driven stdin/stdout into RTEMS to (a) reduce
+  the interrupt priority and (2) to prevent it from blocking.
+- add a timer driver for the tmtest set.
+
diff --git a/bsps/m68k/mrm332/misc/dotests b/bsps/m68k/mrm332/misc/dotests
new file mode 100644
index 0000000000..7d5e099392
--- /dev/null
+++ b/bsps/m68k/mrm332/misc/dotests
@@ -0,0 +1,12 @@
+#! /bin/bash
+
+mkdir MyTests
+find -name MyTests -prune -or -name "*.nxe" -exec cp {} MyTests \;
+
+stty 1:0:80001cb2:0:3:1c:7f:15:4:5:1:0:11:13:1a:0:12:f:17:16:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0 </dev/ttyS1
+/bin/cp /dev/ttyS1 screen &
+cpJob=$!
+
+( cd MyTests; for f in *nxe; do m68k-elf-gdb ${f} </dev/null; done )
+
+kill -9 $cpJob
diff --git a/bsps/m68k/mrm332/misc/gdbinit68 b/bsps/m68k/mrm332/misc/gdbinit68
new file mode 100644
index 0000000000..dbfe2a586e
--- /dev/null
+++ b/bsps/m68k/mrm332/misc/gdbinit68
@@ -0,0 +1,13 @@
+echo Setting up the environment for mrm debuging.\n
+
+target bdm /dev/bdmcpu320
+bdm_setdelay 1000
+bdm_autoreset on
+set remotecache off
+bdm_timetocomeup 0
+bdm_init
+bdm_reset
+set $sfc=5
+set $dfc=5
+r
+q
diff --git a/bsps/m68k/mvme147/README b/bsps/m68k/mvme147/README
new file mode 100644
index 0000000000..91f78e2be3
--- /dev/null
+++ b/bsps/m68k/mvme147/README
@@ -0,0 +1,82 @@
+Notes about the MVME147 bsp
+
+MVME147 port for TNI - Telecom Bretagne
+by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+May 1996
+
+
+This bsp is essentially based on the mvme136 bsp.
+
+Summary of the modifications that were made:
+
+ * include
+ 
+   - bsp.h 
+      Peripheral Channel Controller memory mapping
+      Z8530 memory mapping
+ 
+ * startup
+ 
+   - bspstart.c
+      main () setup for VME roundrobin mode
+	      setup for the PCC interrupt vector base 
+   - bspclean.c
+      bsp_cleanup () disable timer 1 & 2 interruptions
+   - linkcmds set the RAM start (0x5000) and size (4Meg - 0x5000)
+   - setvec.c unchanged
+   - sbrk.c unchanged
+ 
+ * console
+ 
+   - console.c taken from the dmv152 bsp (Zilog Z8530)
+               with no modification
+ 
+ * clock
+ 
+   - ckinit.c entirely rewritten for the PCC tick timer 2
+ 
+ * timer
+ 
+   - timerisr.s and timer.c 
+     entirely rewritten for the PCC tick timer 1
+     now gives results un 6.25 us units (mininum timer delay,
+     suprising big grain)
+ 
+ * times
+ 
+   - updated results for the mvme147 (beware of the 6.25 us grain)
+
+ * Makefiles
+   
+   - compilation of shmsupp simply removed
+
+
+To be done:
+
+ * add VMEchip memory mapping to include/bsp.h
+
+ * update the overheads in coverhead.h 
+
+ * add support for serila ports 2,3 and 4.
+
+Other notes:
+
+ * There is no MP support (no more shmsupp) because I have no
+   experience of the VME bus. The mvme136 shared memory support
+   does not seem applicable on the VMEchip of the mvme147, so
+   I don't know where to start. Suggestions are welcome.
+
+ * All the timing tests and sp tests have been run except tmoverhd.
+   The test hangs during the pause (where the task should be suspended
+   until a return). Maybe the rtems_initialize_executive is no more
+   reentrant with this bsp. 
+
+Future work:
+
+ * Add gdb serial remote support.
+
+ * Shared memory support (I don't really need it, but I can do
+   it if it's simple).
+
+ * Message passing on VME bus, with Ada 95 annex E (distributed
+   systems) in mind.
diff --git a/bsps/m68k/mvme147s/README b/bsps/m68k/mvme147s/README
new file mode 100644
index 0000000000..c191872f42
--- /dev/null
+++ b/bsps/m68k/mvme147s/README
@@ -0,0 +1,88 @@
+Notes about the MVME147S bsp
+
+MVME147 port for TNI - Telecom Bretagne
+by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+May 1996
+
+
+This bsp is essentially based on the mvme136 bsp,
+and is only an extention of the MVME147 bsp. There
+are slight differences in the VMEchips used in the MVME147S and
+the MVME147 that should prevent the shmsupport and the startup
+code from running on a MVME147.
+
+Summary of the modifications that were made:
+
+ * include
+ 
+   - bsp.h 
+      Peripheral Channel Controller memory mapping
+      Z8530 memory mapping
+      VMEchip memory mapping
+ 
+ * startup
+ 
+   - bspstart.c
+      main () setup for VME roundrobin mode
+	      setup for the PCC interrupt vector base 
+              setup of the VME shared memory
+   - bspclean.c
+      bsp_cleanup () disable timer 1 & 2 interruptions
+   - linkcmds set the RAM start (0x7000) and size (4Meg - 0x7000)
+   - setvec.c unchanged
+   - sbrk.c unchanged
+ 
+ * console
+ 
+   - console.c taken from the dmv152 bsp (Zilog Z8530)
+               with no modification
+ 
+ * clock
+ 
+   - ckinit.c entirely rewritten for the PCC tick timer 2
+ 
+ * timer
+ 
+   - timerisr.s and timer.c 
+     entirely rewritten for the PCC tick timer 1
+     now gives results un 6.25 us units (mininum timer delay,
+     suprising big grain)
+ 
+ * times
+ 
+   - updated results for the mvme147 (beware of the 6.25 us grain)
+
+ * shmsupp :
+   Specific to the S version of the MVME147
+   Only tested with 2 boards, in interrupt mode.
+   Uses the top 128k of the VME system controller board RAM
+   as the shared space.
+
+   - mpisr.c : uses the SIGLP interruption
+
+   - Makefile : unchanged
+
+   - getcfg.c : rewritten 
+
+   - lock.c unchanged
+
+   - addrconv.c unchanged
+
+ * Makefiles
+   
+   - unchanged
+
+
+To be done:
+
+ * update the overheads in coverhead.h 
+
+ * add support for serial ports 2,3 and 4.
+
+Other notes:
+
+ * All the timing tests and sp tests have been run except tmoverhd.
+   The test hangs during the pause (where the task should be suspended
+   until a return). Maybe the rtems_initialize_executive is no more
+   reentrant with this bsp. 
+
diff --git a/bsps/m68k/mvme162/README b/bsps/m68k/mvme162/README
new file mode 100644
index 0000000000..4a73283010
--- /dev/null
+++ b/bsps/m68k/mvme162/README
@@ -0,0 +1,173 @@
+--
+--  EISCAT Scientific Association. M.Savitski
+--
+--  This material is a part of the MVME162 Board Support Package
+--  for the RTEMS executive. Its licensing policies are those of the
+--  RTEMS distribution.
+--
+--  Updated by Joel Sherrill (jsherril@redstone.army.mil) after
+--  inclusion in the standard release.
+--
+
+
+MVME162 Models
+--------------
+
+There are three different models of the MVME162 board.  There are many
+variations within each model.
+
+  Model        Variants
+  ---------    --------------------------------------------------
+  MVME162      MVME162-0xx
+  MVME162FX    MVME162-4xx, MVME162-5xx
+  MVME162LX    MVME162-2xx, MVME162-3xx, MVME162-7xx, MVME162-8xx
+
+All models use either an MC68040 or MC68LC040 (no FPU) processors.  The
+processor used varies by variant as does the speed, the amount and type
+of memory and the I/O devices (serial, ethernet, SCSI and VME).  See the
+README.models file for details.
+
+
+Configuring the BSP
+-------------------
+The BSP needs to be configured for your specific board.  The following
+files need to be modified.
+
+include/bsp.h
+Change the MOT_162BUG_VEC_ADDRESS define to start of memory for your
+board
+
+make/custom/mvme162.cfg
+If your board has an MC68040 processor
+- change the value of RTEMS_CPU_MODEL
+- remove the -msoft-float flag from CPU_CFLAGS
+
+
+
+MVME162FX and DMA on the IP bus
+-------------------------------
+
+From Eric Vaitl <eric@viasat.com>:
+
+If you have any customers that will be using the 162FX, tell them to 
+be careful. The main difference between the 162 and the 162FX is DMA 
+on the IP bus. I spent over a month trying to write a DMA HDLC driver 
+for GreenSprings IP-MP and couldn't get it to work. I talked to some 
+people at GreenSprings, and they agreed that there really is no way to 
+get DMA to work unless you know the size of the packets in advance. 
+Once the IP2 chip DMA controller is given the character count and 
+enabled, it doesn't accept further commands until all of the 
+characters have arrived. The only way to terminate a DMA transfer 
+prematurely is by raising DMAEND* during the last read. None of the IP 
+modules that I know of are currently able to do that. GreenSprings is 
+working on the problem, but nothing is going to available for a few 
+months. 
+
+Installation
+------------
+Nothing unique to the MVME162.  It has been incorporated into the
+standard release.
+
+Port Description
+----------------
+This section describes the initial port effort.  There have been 
+additions and modifications to the bsp since this was done.
+Interestingly, this was the first bsp submitted to the RTEMS project
+and the submission offer came out of the blue with no prior
+communication with the author. :)
+
+The port was done using already existing ports to the M68020 boards,
+DMV152 and MVME136. 
+
+The initial host development system was SUN/Solaris 2.3, and
+the cross-development environment consisted of Free Software
+Foundation (FSF)'s GNU C compiler (version 2.6), GNU Assembler
+(version 2.3) and GNU binary utilities binutils version 2.5.2,
+built with m68k as a target. The recent/latest versions of other
+GNU programs (flex, make, etc) were also used at the build stage.
+
+In all subdirectories of the RTEMS distribution tree, the directories
+mvme136 were duplicated as mvme162.
+
+Essential modifications are detailed below:
+
+- the MVME162-specific hardware registers were described in bsp.h
+
+- timer and clock routines were made to use the MVME162's Tick Timers 1
+and 2, respectively
+
+- shared memory support was replaced by stubs for the time being
+
+- console IO was lifted entirely from the DMV152 support code, thanks
+to the fact that Z8530 SCC used in DMV152 is upwards compatible with
+the Z85230 SCC of the MVME162. (Only the memory mapping of the SCC
+registers had to be changed.)
+
+- symbols in several *.s files were prepended with underscores to
+comply with the xgcc configuration used (it prepends underscores to all
+symbols defined in c code)
+
+- linkcmds file was modified to place the linked code into the memory
+configured for the board in use
+
+- bspstart.c was modified as follows:
+
+         monitors_vector_table = (rtems_isr *)0xFFE00000;
+
+was made to point to the power-up location of MVME162 interrupt vector
+table.  
+     
+- The shutdown is a temporary solution. To exit cleanly, it has to disable
+all enabled interrupts and restore the board to its power-up status.
+Presently this is not done satisfactorily, as a result, the board needs
+a hardware reset from the external VMEbus master or from the front
+panel to ensure correct operation for subsequent downloads.
+
+Host System
+-----------
+The VMEbus master used to externally control and download the MVME162
+is a FORCE CPU-2CE board running Solaris 2.3. A simple program to load
+s-records and start/reset the MVME162 was written. The code is in the
+file tools/sload.c
+
+This code depends on the external VMEbus master's vme driver and is
+provided as an example, without the Makefile. The bulk of the program
+which parses the s-records is courtesy of Kym Newbery,
+(8918927y@lux.levels.unisa.edu.au).
+
+In general, apart from x-gcc, the tools most often used while building
+RTEMS for MVME162 were: find, grep, diff, and, of course
+
+MVME162 Embedded Controller Programmer's Reference Guide,
+Motorola, MVME162PG/D1.
+
+Thanks
+------
+- to On-Line Applications Research Corporation (OAR) for developing
+RTEMS and making it available on a Technology Transfer basis;
+- to Joel Sherril, the leader of the RTEMS development group for
+stimulating and helpful discussions;
+- to Kym Newbery (8918927y@lux.levels.unisa.edu.au) for his s-record
+parser;
+- to Gerd Truschinski (gt@first.gmd.de) for creating and running the
+crossgcc mailing list
+- to FSF and Cygnus Support for great free software;
+
+What's new
+----------
+  - 28.07.95 BSP adjusted to rtems-3.2.0. 
+  - Now console driver uses interrupts on receive (ring buffer
+    code lifted with thanks from the IDP BSP next door (../idp))
+  - both front-panel serial interfaces are supported
+  - serious bug in timer interrupts fixed
+  - interrupt test tm27 now supported
+  
++----------------------------------+-------------------------------+
+|  Dr. Mikhail (Misha) Savitski    |  Voice : +46-980-79162        |
+|  Software Systems Engineer       |  Fax   : +46-980-79161        |
+|  EISCAT Svalbard Radar Project   |  E-mail: mms@eiscathq.irf.se  |
+|  EISCAT Scientific Association   |-----------  /\_/\  -----------|
+|  Box 812 S-98128 Kiruna, Sweden  |  EIS       { o o }       CAT  |
++----------------------------------+-------oQQQ--(>I<)--QQQo-------+
+
+
diff --git a/bsps/m68k/mvme162/README.models b/bsps/m68k/mvme162/README.models
new file mode 100644
index 0000000000..1803b570d1
--- /dev/null
+++ b/bsps/m68k/mvme162/README.models
@@ -0,0 +1,233 @@
+MVME162 Models
+==============
+
+There are three different models of the MVME162 board with many variations
+within each model.
+
+  Model        Variants
+  ---------    --------------------------------------------------
+  MVME162      MVME162-0xx
+  MVME162FX    MVME162-4xx, MVME162-5xx
+  MVME162LX    MVME162-2xx, MVME162-3xx, MVME162-7xx, MVME162-8xx
+
+All models use either an MC68040 or MC68LC040 (no FPU) processors.  The
+processor used varies by variant as does the speed, the amount and type
+of memory and the I/O devices (serial, ethernet, SCSI and VME).  See the
+following tables for details.
+
+
+
+MVME162 Variants
+================
+
+Source
+------
+o  MVME162 Embedded Controller User's Manual (MVME162/D2)
+
+
+Common Configuration
+--------------------
+o  One EPROM socket
+o  8Kx8 NVRAM/TOD clock
+o  Two serial ports
+o  1MB Flash memory
+o  Four MVIP Industry Pack interfaces
+o  One or two DRAM/SRAM mezzanine memory boards
+
+
+Model  Processor  Speed  DRAM  SRAM   Other
+-----  ---------  -----  ----  -----  ------------------
+ 001   MC68LC040  25MHz   1MB  512KB
+ 002   MC68040    25MHz   1MB  512KB
+ 003   MC68LC040  25MHz   1MB  512KB  No VMEbus
+ 010   MC68LC040  25MHz   4MB  512KB
+ 011   MC68LC040  25MHz   4MB  512KB  SCSI
+ 012   MC68LC040  25MHz   4MB  512KB  Ethernet
+ 013   MC68LC040  25MHz   4MB  512KB  Ethernet, SCSI
+ 014   MC68LC040  25MHz   4MB    -    Ethernet, No VMEbus
+ 020   MC68040    25MHz   4MB  512KB
+ 021   MC68040    25MHz   4MB  512KB  SCSI
+ 022   MC68040    25MHz   4MB  512KB  Ethernet
+ 023   MC68040    25MHz   4MB  512KB  Ethernet, SCSI
+ 026   MC68040    25MHz   4MB    -    Ethernet, No VMEbus
+ 030   MC68LC040  25MHz   8MB  512KB
+ 031   MC68LC040  25MHz   8MB  512KB  SCSI
+ 032   MC68LC040  25MHz   8MB  512KB  Ethernet
+ 033   MC68LC040  25MHz   8MB  512KB  Ethernet, SCSI
+ 040   MC68040    25MHz   8MB  512KB
+ 041   MC68040    25MHz   8MB  512KB  SCSI
+ 042   MC68040    25MHz   8MB  512KB  Ethernet
+ 043   MC68040    25MHz   8MB  512KB  Ethernet, SCSI
+
+
+Serial Interface Modules
+------------------------
+SIM05  01-W3846B  EIA-232-D  DTE
+SIM06  01-W3865B  EIA-232-D  DCE
+SIM07  01-W3868B  EIA-530    DTE
+SIM08  01-W3867B  EIA-530    DCE
+
+
+DRAM/SRAM Expansion Memory Boards
+---------------------------------
+?
+
+
+
+MVME162FX Variants
+==================
+
+Source
+------
+o  MVME162FX Data Sheet
+o  MVME162FX Embedded Controller Installation and Use (V162FXA/IH3)
+o  MVME162FX Embedded Controller Programmer's Reference Guide (V162FXA/PG1)
+o  MVME162FX 400/500-Series VME Embedded Controller Installation and Use
+     (V162FXA/IH4) Edition of March 2000\Uffffffff
+o  V162FXA/LT2, November 1995
+
+
+Common Configuration
+--------------------
+o  One EPROM socket
+o  8Kx8 NVRAM/TOD clock
+o  Two serial ports
+o  1MB Flash memory with 162Bug installed
+o  512KB SRAM with battery backup
+o  Four IndustryPack interfaces
+o  One or two DRAM/SRAM mezzanine memory boards
+
+
+Uses MC2 Chip, IP2 Chip, 4MB or 12MB mezzanine DRAM board
+
+Model  Processor  Speed  DRAM  Other
+-----  ---------  -----  ----  ------------------
+ 403
+ 410   MC68LC040  25Mhz   4MB
+ 411   MC68LC040  25Mhz   4MB  SCSI
+ 412   MC68LC040  25Mhz   4MB  Ethernet
+ 413   MC68LC040  25Mhz   4MB  Ethernet, SCSI
+ 420   ?
+ 421   ?
+ 422   ?
+ 423   ?
+ 430   MC68LC040  25Mhz   8MB
+ 431   MC68LC040  25Mhz   8MB  SCSI
+ 432   MC68LC040  25Mhz   8MB  Ethernet
+ 433   MC68LC040  25Mhz   8MB  Ethernet, SCSI
+ 440   ?
+ 441   ?
+ 442   ?
+ 443   ?
+ 450   ?
+ 451   ?
+ 452   ?
+ 453   MC68LC040  25Mhz  16MB  Ethernet, SCSI
+ 460   ?
+ 461   ?
+ 462   ?
+ 463   ?
+ 510   MC68040    32MHz   4MB
+ 511   MC68040    32MHz   4MB  SCSI
+ 512   MC68040    32MHz   4MB  Ethernet
+ 513   MC68040    32MHz   4MB  Ethernet, SCSI
+ 520   MC68040    32MHz   8MB
+ 521   MC68040    32MHz   8MB  SCSI
+ 522   MC68040    32MHz   8MB  Ethernet
+ 523   MC68040    32MHz   8MB  Ethernet, SCSI
+ 530   MC68040    32MHz  16MB
+ 531   MC68040    32MHz  16MB  SCSI
+ 532   MC68040    32MHz  16MB  Ethernet
+ 533   MC68040    32MHz  16MB  Ethernet, SCSI
+
+
+Serial Interface Modules
+------------------------
+SIM05  01-W3846B  EIA-232-D    DTE
+SIM06  01-W3865B  EIA-232-D    DCE
+SIM07  01-W3868B  EIA-530      DTE
+SIM08  01-W3867B  EIA-530      DCE
+SIM09  01-W3002F  EIA-485/422  DTE/DCE
+
+
+DRAM/SRAM Expansion Memory Boards
+---------------------------------
+MVME162-502   4MB DRAM
+MVME162-503  12MB DRAM
+?             2MB SRAM
+
+
+
+MVME162LX Variants
+==================
+
+Source
+------
+o  Supplement to MVME162LX Embedded Controller Installation Guide
+    (MVME162LXIG/D1A1) February 1995
+o  MVME162LX Embedded Controller Data Sheet
+o  MVME162LX 200/300 Series Embedded Controller Programmer's Reference
+     Guide (V162LX2-3A/PG2)
+o  MVME162LX 200/300 Series Embedded Controller Installation and Use
+     (V162LX2-3A/IH3)
+o  MVME162LX 700/800 Series Embedded Controller Installation and Use
+     (V162-7A/IH1)
+o  MVME162LX 700/800 Series Embedded Controller Installation and Use
+     (V162-7A/IH2)
+
+
+Common Configuration
+--------------------
+o  One EPROM socket
+o  8Kx8 NVRAM/TOD clock
+o  4 serial ports EIA-232-D DTE (unless otherwise noted)
+o  1MB Flash
+o  2 IP sites (unless otherwise noted)
+
+
+Model  Processor  Speed  DRAM      Other
+-----  ---------  -----  --------  ------------------
+ 200   MC68LC040  25MHz   1MB      No serial(?)
+ 201   MC68LC040  25MHz   1MB
+ 202   MC68LC040  25MHz   1MB
+ 210   MC68LC040  25MHz   4MB
+ 211   MC68LC040  25MHz   4MB      SCSI
+ 212   MC68LC040  25MHz   4MB      Ethernet
+ 213   MC68LC040  25MHz   4MB      Ethernet, SCSI
+ 216   MC68LC040  25MHz   4MB      Ethernet, No VMEbus, No serial(?)
+ 220   MC68040    25MHz   4MB
+ 222   MC68040    25MHz   4MB      Ethernet
+ 223   MC68040    25MHz   4MB      Ethernet, SCSI
+ 233   MC68LC040  25MHz   4MB ECC
+ 233   MC68LC040  25MHz   4MB ECC  Ethernet, SCSI
+ 243   MC68040    25MHz   4MB ECC  Ethernet, SCSI
+ 253   MC68LC040  25MHz  16MB ECC  Ethernet, SCSI
+ 253   MC68LC040  25MHz  16MB ECC  Ethernet, SCSI
+ 262   MC68040    25MHz  16MB ECC  Ethernet
+ 263   MC68040    25MHz  16MB ECC  Ethernet, SCSI
+ 322   MC68LC040  25MHz   8MB ECC  Ethernet
+ 323   MC68LC040  25MHz   8MB ECC  Ethernet, SCSI
+ 333   MC68040    25MHz   8MB ECC  Ethernet, SCSI, No IP sites(?)
+ 353   MC68040    25MHz  32MB ECC  Ethernet, SCSI, 4 IP sites
+ 723   MC68040    32MHz   4MB      Ethernet, SCSI
+ 743   MC68040    32MHz   4MB ECC  Ethernet, SCSI
+ 763   MC68040    32MHz  16MB ECC  Ethernet, SCSI
+ 813   MC68040    32MHz   8MB      Ethernet, SCSI
+ 833   MC68040    32MHz   8MB ECC  Ethernet, SCSI
+ 853   MC68040    32MHz  32MB ECC  Ethernet, SCSI
+ 863   MC68040    32MHz  16MB ECC  Ethernet, SCSI
+
+
+DRAM Expansion Memory Boards
+------------------------------------
+MVME162-202   4MB     (non-stacking)
+MVME162-203  16MB ECC (non-stacking)
+MVME162-204  16MB ECC (stacking)
+MVME162-207   4MB ECC (non-stakcing)
+MVME162-208   4MB ECC (stacking)
+MVME162-209   8MB ECC (non-stacking)
+MVME162-210   8MB ECC (stacking)
+MVME162-211  32MB ECC (non-stacking)
+MVME162-212  32MB ECC (stacking)
+
+
diff --git a/bsps/m68k/mvme167/README b/bsps/m68k/mvme167/README
new file mode 100644
index 0000000000..886ee7cc2c
--- /dev/null
+++ b/bsps/m68k/mvme167/README
@@ -0,0 +1,435 @@
+This is a README file for the MVME167 port of RTEMS 4.5.0.
+
+Please send any comments, improvements, or bug reports to:
+
+Charles-Antoine Gauthier
+charles.gauthier@nrc.ca
+
+or
+
+Darlene Stewart
+Darlene.Stewart@nrc.ca
+  
+Software Engineering Group
+Institute for Information Technology
+National Research Council of Canada
+Ottawa, ON, K1A 0R6
+Canada
+
+
+Disclaimer
+----------
+
+The National Research Council of Canada is distributing this RTEMS
+board support package for the Motorola MVME167 as free software; you
+can redistribute it and/or modify it under terms of the GNU General
+Public License as published by the Free Software Foundation; either
+version 2, or (at your option) any later version.  This software is
+distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details. You should have received a copy of the GNU General
+Public License along with RTEMS; see file COPYING. If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
+
+Under no circumstances will the National Research Council of Canada
+nor Her Majesty the Queen in right of Canada assume any liablility
+for the use this software, nor any responsibility for its quality or
+its support.
+
+
+Installation
+------------
+
+Nothing unique to the MVME167. It uses the standard build process for
+m68k targets. You will need to edit linkcmds to put in the start address
+of your board. We do TFTP transfers to our target. The mvme167.cfg file
+builds only the ELF images, which we download to the target, skipping
+over the first 0x54 bytes; Motorola S-records are not generated. Edit
+this file if you want S-records.
+
+
+Port Description
+
+Console driver
+---------------
+
+This BSP includes an termios-capable interrupt-driven I/O console driver
+that supports all four serial ports on the MVME167 model. The port labelled
+Serial Port 1/Console on the MVME712 is normally used by 167Bug; do not open
+/dev/tty00 if you are debugging using 167Bug.
+
+Limited support is provided for polled terminal I/O. This is used when
+running the timing tests, and by the printk() debug output function.
+Polled I/O may use termios, or it may bypass those services. The printk()
+function does not use termios. When polled I/O is used, the terminal settings
+must be set through 167-Bug; trying to change the line settings through RTEMS
+has no effect.
+
+Three is no support for using interrupt-driven I/O without termios support.
+
+The default configuration is to use polled I/O and to bypass termios. This
+is done so the test can be built at the same time as the rest of the system.
+It is highly recommended that the defaults be changed in the mvme167.cfg file
+to reflect the desired defaults, or that the appropriate parameters be set up
+in NVRAM to select the appropriate I/O modes at boot time.
+
+When configured for interrupt-driven I/O, the console is initialized with
+whatever parameters are set up in termios before it calls the firtOpen driver
+callback, EXCEPT THAT HARDWARE HANDSHAKING IS TURNED OFF, i.e. CLOCAL is set
+in the struct termios c_cflag field. We use 3-wire cables for I/O, and find
+hardware handshaking a pain. If you enable hardware handshaking, you must drive
+CTS* low on the CD2401 for output to occur. If the port is in the DTE
+configuration, you must drive the RS-232 CTS line to space; if the port is
+in the DCE configuration, you must drive the RS-232 RTS line to space.
+
+To use interrupt-driven I/O, set the CD2401_IO_MODE manifest constant to 1 in
+rtems/make/custom/mvme167.cfg, or configure the appropriate parameter in
+User Area Non-volatile RAM. See the Configuration Parameters section below
+for instructions on setting up NVRAM.
+
+To use termios, set the CD2401_USE_TERMIOS manifest constant to 1 in
+rtems/make/custom/mvme167.cfg, or configure the appropriate parameter in
+User Area Non-volatile RAM. See the Configuration Parameters section
+below for instructions on setting up NVRAM.
+
+The RTEMS console, i.e. the port used by stdin, stdout and stderr (do not
+confuse it with the port labelled Console on the MVME712), must be
+specified in the rtems/make/custom/mvme167.cfg file, or in the NVRAM
+parameters. Set the value of CONSOLE_MINOR appropriately. See below for a
+list of choices. See the Configuration Parameters section below for
+instructions on setting up NVRAM.
+
+The RTEMS printk port, i.e. the port where printk sends it debugging output
+text, must be specified in the rtems/make/custom/mvme167.cfg file, or in the
+NVRAM parameters. Set the value of PRINTK_MINOR appropriately. See below for a
+list of choices. See the Configuration Parameters section below for
+instructions on setting up NVRAM.
+
+Interrupt-driven and polled I/O cannot be mixed in the MVME167, except that
+printk always used polled I/O without termios. If interrupt-driven I/O is
+used and printk is used, do not open the device that printk uses from an
+RTEMS application.
+
+Console and printk port choices:
+
+  0 - /dev/tty0, Serial Port 1/Console on the MVME712M.
+  1 - /dev/tty1, Serial Port 2/TTY01 on the MVME712M.
+  2 - /dev/tty2, Serial Port 3 on the MVME712M.
+  3 - /dev/tty3, Serial Port 4 on the MVME712M.
+
+Setting the RTEMS console to port 0 when interrupt-driven I/O is specified
+will prevent 167-Bug from using that port.
+
+To use polled I/O on port 2 or 3, the port must be configured in 167-Bug. See
+the "PF" command in the "Debugging Package for Motorola 68K CISC CPUs User's
+Manual", part number 68KBUG.
+
+
+Floating-point
+--------------
+
+The MC68040 has a built-in FPU. This FPU does not implement all the
+instruction of the MC68881/MC68882 floating-point coprocessors in
+hardware. The -m68040 compilation options instructs gcc to not generate
+the missing instructions. All of the RTEMS code is built this way. Some
+of the missing functionality must be supplied by external libraries. The
+required functions are part of libgcc.a.
+
+The issue gets complicated because libc, libm and libgcc do not come as
+m68040-specific variants. The default variants of these libraries are for the
+MC68020 and MC68030. There are specific variants for the MC68000 (which has
+limited addressing modes with respect to later family members), and specific
+variants for systems without a floating-point unit, either a built-in FPU or
+a coprocessor. These latter variants will be referred to as the msoft-float
+variants. There is a msoft-float variant for the MC68000, and one for the
+other family members.
+
+The default variants of libc, libm and libgcc appear to work just fine for the
+MC68040, AS LONG AS NO FLOATING POINT FUNCTIONS ARE CALLED. In particular,
+printf() and scanf() raise unimplemented floating-point instruction exceptions
+at run time. Expect almost every function that must compute a floating-point
+result to also raise unimplemented floating-point instruction exceptions. Do
+not use these variants if your application does any floating-point operations,
+unless you use the Motorola FPSP package (described further down).
+
+The msoft-float variants do print out floating-point numbers properly, but we
+have not tested them extensively, so use them with caution. In particular,
+the Paranoia test fails when linked with the msoft-float variants of the
+libraries; it goes into an infinite loop after milestone 40.
+
+MSOFT_FLOAT VARIANTS MUST BE USED TOGETHER. If you use the msoft-float variant
+of libc and libm, you must also linked with the msoft-float variant of libgcc,
+otherwise calls such as printf() print out floating-point values incorrectly.
+
+RTEMS comes with the Motorola FPSP (Floating-Point Support Package) for the
+MC68040 (rtems/c/src/lib/libcp/m68k/m68040/fpsp). This package emulates the
+missing floating-point instructions. It is built automatically for the
+MVME167 and installed in bsp_start().
+
+The FPSP allows the use of the default variants of libc, libm and libgcc.
+It also runs the paranoia test properly, and prints out the correct results.
+It should probably be used in preference to the msoft-float libraries, as it
+appears to work better. The disadvantage of the FPSP is that it increases the
+size of the executable by about 60KB and that it relies on run time
+exceptions.
+
+If your application does not do any floating-point operations at all, you
+should consider disabling the FPSP. In bsp_start(), emove the call to
+M68KFPSPInstallExceptionHandlers(), and uncomment the three lines in
+mvme167.cfg that redefine which variants of libc, libm and libgcc to link
+against.
+
+
+Configuration Parameters
+------------------------
+
+If Jumper J1-4 is installed, certain configuration parameters may be read from
+the first 31 bytes of User Area NVRAM starting at 0xFFFC0000. In this case, the
+remaining J1-[5-7] jumpers are ignored, and the user is responsible for writing
+the appropriate values in NVRAM (via 167-Bug) in order to alter the default
+behaviour. A zero value in NVRAM results in the default behaviour. The paramaters
+that are configurable and their default settings are described below. 
+		
+	Cache Mode (0xFFFC0000 - 1 byte)
+	  Set the following bits in the byte to set the desired cache mode:
+	    bit 0
+	      0 - data cache disable
+	      1 - data cache enable
+	    bit 1
+	      0 - instruction cache disable
+	      1 - instruction cache enable
+	    bits 2 & 3:
+		    00 = cachable, write-through
+		    01 = cachable, copyback
+		    10 = noncachable, serialized
+		    11 = noncachable
+
+	Console driver I/O mode (0xFFFC0001 - 1 byte)
+	  Set the following bits in the byte to set the desired I/O mode:
+	    bit 0
+	      0 - do not use termios
+	      1 - use termios
+	    bit 1
+	      0 - polled I/O
+	      1 - interrupt-driven I/O
+
+	Console driver ports (0xFFFC0002 - 1 byte)
+	  Set the following bits in the byte to select the console and printk ports:
+	    bit 0 & 1 select the RTEMS console port
+        00 - /dev/tty0, Serial Port 1/Console on the MVME712M.
+        01 - /dev/tty1, Serial Port 2/TTY01 on the MVME712M.
+        10 - /dev/tty2, Serial Port 3 on the MVME712M.
+        11 - /dev/tty3, Serial Port 4 on the MVME712M.
+	    bit 4 & 5 select the RTEMS printk port
+        00 - /dev/tty0, Serial Port 1/Console on the MVME712M.
+        01 - /dev/tty1, Serial Port 2/TTY01 on the MVME712M.
+        10 - /dev/tty2, Serial Port 3 on the MVME712M.
+        11 - /dev/tty3, Serial Port 4 on the MVME712M.
+    If the printk port is the same as some other port that will be opened by an
+    RTEMS application, then the driver must use polled I/O, or the printk port
+    must not be used.
+    
+	IP Address (0xFFFC0004 - 4 bytes)
+		write the hexadecimal representation of the IP address of the board in this
+		locatio, e.g. 192.168.1.2 = 0xC0A80102
+		default: obtain the IP address from an rtems_bsdnet_ifconfig structure
+
+	Netmask (0xFFFC0008 - 4 bytes)
+		write the hexadecimal representation of the netmask in this location
+		for example, 255.255.255.0 = 0xFFFFFF00
+		default: obtain the netmask from an rtems_bsdnet_ifconfig structure
+		
+	Ethernet Address (0xFFFC000C - 6 bytes)
+		write the Ethernet address of the board in this location
+		default: obtain the hardware address from an rtems_bsdnet_ifconfig
+		         structure
+
+	Processor ID (0xFFFC0012 - 2 bytes)
+		reserved for future use
+		
+	RMA start (0xFFFC0014 - 4 bytes)
+		reserved for future use
+		
+	VMA start (0xFFFC0018 - 4 bytes)
+		reserved for future use
+		
+	RamSize (0xFFFC001C - 4 bytes)
+		reserved for future use
+
+
+Cache Control and Memory Mapping
+--------------------------------
+
+If configuration is not obtained from non-volatile RAM (ie. J1-4 is off),
+cache control is done through the remaining J1 jumpers as follows:
+
+If Jumper J1-7 is installed, the data cache will be turned on. If Jumper
+J1-6 is installed, the instruction cache will be turned on. (If a jumper
+is off, its corresponding cache will remain disabled).
+
+If Jumper J1-5 is installed, the data cache will be placed in copyback
+mode. If it is removed, it will be placed in writethrough mode.
+
+Currently, block address translation is set up to map the virtual
+0x00000000--0x7FFFFFFF to the physical range 0x00000000--0x7FFFFFFF. The
+port relies on the hardware to raise exceptions when addressing
+non-existent memory. Caching is not controllable on a finer grain.
+
+
+Networking
+----------
+
+If configuration is not obtained from non-volatile RAM (ie. J1-4 is off),
+the networking parameters shown above must be specified in an initialized
+rtems_bsdnet_ifconfig struct. This structure is declared and initialized to
+specify any network devices and includes entries for ip_address, ip_netmask
+and hardware_address. See the Network Device Configuration section of the
+RTEMS Networking Supplement.
+
+When non-default (non-zero) networking paramaters are provided in NVRAM (ie.
+j1-4 is on), the user MUST ensure that the corresponding entries in the
+ifconfig struct are NULL. Failing to do so is an error, because it causes
+the memory allocated for the initialized struct values to be lost.
+
+
+Miscellaneous
+-------------
+
+The timer and clock drivers were patterned after the MVME162 and MVME152
+ports.
+
+At this time, we do not have an MPCI layer for the MVME167. We are planning
+to write one.
+
+This port supplies its own fatal_error_handler, which attempts to print some
+error message through 167Bug (on the Serial Port 1/Console on the MVME712M).
+
+
+Host System
+-----------
+
+The port was initially developed on an RS-6000 running AIX 4.2. The following
+tools were used:
+
+    - GNU gcc 2.8.1 configured for a powerpc-ibm-aix4.2.0.0 host and
+      m68k-rtems target;
+    - GNU binutils 2.9.1 configured for a powerpc-ibm-aix4.2.0.0 host and
+      m68k-rtems target;
+
+It was also tested on a Pentium II-based PC running Windows NT Workstation 4.0
+and the Cygnus Cygwin32 release b20.1 environment, with the following tools:
+
+    - EGCS 1.1.1 configured for a i586-cygwin32 host and m68k-rtems target;
+    - GNU binutils 2.9.4 configured for a i586-cygwin32 host and m68k-rtems
+      target;
+
+With the latter environment, be patient; builds take a very looong time...
+
+Current development is done on a Pentium III PC running RedHat Linux 6.1.
+At the time this README was composed, the latest working compiler that was
+used successfully was gcc version 2.96 20000213 (experimental). Both the C
+and C++ compilers were working. Binutils 2.10 are used.
+
+
+Known Problems
+--------------
+
+Polled I/O without termios may not work very well on input. The problem
+is that input processing is not done: applications may get characters too
+early, and may get characters that they normally would not get, such as
+backspace or delete. Furthermore, input is not buffered at all. The latest
+versions of rtems seem to set the count field in the rtems_libio_rw_args_t
+argument to the buffer size, not to the number of characters expected on
+input. Rather than wait for 1024 characters on each call, the driver
+returns each character when it is received.
+
+The cdtest will not run with interrupt-driven I/O. The reason is that the
+constructors for the static objects are called at boot time when the
+interrupts are still disabled. The output buffer fills up, but never empties,
+and the application goes into an infinite loop waiting for buffer space. This
+should have been documented in the rtems/c/src/tests/PROBLEMS file. The moral
+of this story is: do not do I/O from the constructors or destructors of static
+objects.
+
+Output stops prematurely in the termios test when the console is operating in
+interrupt-driven mode because the serial port is re-initialized before all
+characters in the last raw output buffer are sent. Adding calls to tcdrain()
+in the test task helps, but it does not solve the problem. What happens is
+that the CD2401 raises a transmit interrupt when the last character in the
+DMA buffer is written into the transmit FIFO, not when the last character
+has been transmitted. When tcdrain() returns, there might be up to 16
+characters in the output FIFO. The call to tcsetattr() causes the serial port
+to re-initialize, at which point the output FIFO is cleared. We could not find
+a way to detect whether characters are still in the FIFO and to wait for them
+to be transmitted.
+
+The first raw buffer to be transmitted after the console is re-initialized
+with tcsetattr() is garbled. At this time, it does not seem worth while to
+track this problem down.
+
+In the stackchk test, an access fault exception is raised after the stack is
+blown. This is one case were overwritting the first or last 16 bytes of the
+stack does cause problems (but hey, an exception occurred, which is better
+than propagating the error).
+
+In the stackchk test, an access fault exception is raised after the stack is
+blown. This is one case were overwritting the first or last 16 bytes of the
+stack does cause problems (but hey, an exception occurred, which is better
+than propagating the error).
+
+When using interrupt-driven I/O, psx08 produces all the expected output, but
+it does not return control to 167Bug. Is this test supposed to work with
+interrupt-driven console I/O?
+
+
+What is new
+-----------
+
+Support for Java is being actively worked on.
+
+
+Thanks
+------
+
+- to On-Line Applications Research Corporation (OAR) for developing
+RTEMS and making it available on a Technology Transfer basis;
+
+- to FSF and Cygnus Support for great free software;
+
+
+Test Configuration
+------------------
+
+Board:                Motorola MVME167
+CPU:                  Motorola MC68040
+Clock Speed:          25 MHz
+RAM:                  4 MBytes of 32-bit DRAM with parity
+Cache Configuration:  Instruction cache on; data cache on, copyback mode.
+Times Reported in:    microseconds
+Timer Source:         VMEchip2 Tick Timer 1
+GCC Flags:            -m68040 -g -O4 -fomit-frame-pointer
+Console:              Operate in polled mode. Set CD2401_POLLED_IO to 1 in
+                      rtems/c/src/lib/libbsp/m68k/mvme167/console/console.c.     
+
+
+Test Results
+------------
+
+Single processor tests:  All tests passed, except the following ones:
+
+  - paranoia required the FPSP and the default variants of libm (and libc and
+    libgcc) for us. It may work with the msoft-float variants for you, but it
+    does require the FPSP.
+  
+  - cpuuse and malloctest did not work.
+  
+  - The stackchk test got an access fault exception before the RTEMS stack
+    checker had had a chance to detect the corrupted stack.
+                         
+                         
+Multi-processort tests:  not applicable -- No MPCI layer yet.
+
+
+Timing tests: See rtems/c/src/lib/libbsp/m68k/mvme167/times
+  
diff --git a/bsps/m68k/uC5282/README b/bsps/m68k/uC5282/README
new file mode 100644
index 0000000000..e237c695bc
--- /dev/null
+++ b/bsps/m68k/uC5282/README
@@ -0,0 +1,236 @@
+Description: Arcturus Networks uC DIMM ColdFire 5282 
+============
+ CPU: MCF5282, 64MHz
+ RAM: 16M
+SRAM: 64k (BSP places FEC buffer descriptors here)
+ ROM: 4M
+
+This is a credit-card sized board in a DIMM format. It is part of a family
+which includes Dragonball and Coldfire CPUs, with a standardized DIMM-based bus. 
+
+ACKNOWLEDGEMENTS:
+=================
+This BSP is based on the work of:
+    D. Peter Siddons
+    Till Straumann
+    Brett Swimley
+    Jay Monkman
+
+TODO:
+=====
+The bsp relies on the Arcturus monitor to set up DRAM and all chip selects. 
+This seems OK to me, but others may find it lame.....
+
+I/O pin restrictions make simultaneous operation of I2C, CAN and UART2
+impossible.  The BSP configures UART2 to use the CAN pins and leaves
+the I2C pins available for use.
+ 
+BSP NAME:           uC5282
+BOARD:              Arcturus Netrworks uCdimm 5282
+BUS:                Arcturus DIMM bus, A24/D16, plus peripherals.
+CPU FAMILY:         ColdFire 5282
+CPU:                MCF5282
+COPROCESSORS:       N/A
+
+DEBUG MONITOR:      Arcturus bootloader
+
+PERIPHERALS
+===========
+TIMERS:             Four PIT (RTEMS clock is PIT3), Four Timers
+  RESOLUTION:       1 microsecond 
+SERIAL PORTS:       Internal UART 0, 1 and 2
+REAL-TIME CLOCK:    none
+DMA:                none
+VIDEO:              none
+SCSI:               none
+NETWORKING:         Internal 10/100Mbs FEC, 100 Mb/s, full/half-duplex
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       PIT3
+IOSUPP DRIVER:      none
+SHMSUPP:            none
+TIMER DRIVER:       TIMER3
+TTY DRIVER:         UART0, 1 and 2
+
+STDIO
+=====
+PORT:               UART0 Terminal
+ELECTRICAL:         RS-232
+BAUD:               9600
+BITS PER CHARACTER: 8
+PARITY:             None
+STOP BITS:          1
+
+Downloading the image to the board.
+===================================
+The bootable image is generated by the make-exe target in the bsp makefile. It
+generates a simple stripped binary file which is downloaded over the ethernet
+port into RAM then executed or programmed into flash memory.
+
+1) Power up the uC5282 board. A dump of some memory maps is produced
+   followed by a prompt.
+
+2) (first time only)
+   Set the uC5282 board Internet configuration:
+        setenv IPADDR0 www.xxx.yyy.zzz  (Your board's address)
+        setenv NETMASK ppp.qqq.rrr.sss  (Your local network address mask)
+        setenv HOSTNAME somename        (Your board's name)
+
+3) Type 'tftp<CR>'
+   This forces the network link to half-duplex.  If your network link is
+   locked at full duplex you'll have to find another port!
+   The RTEMS network driver can be forced to 100 Mbs/full-duplex by setting
+   the bootstrap environment variable IPADDR0_100FULL to Y.  The driver can
+   be forced to 10 Mbs/half-duplex by setting the bootstrap environment
+   variable IPADDR0_10HALF to Y.
+
+4) Run 'tftp' on your host machine:
+        tftp> binary
+        tftp> connect www.xxx.yyy.zzz   (Your ucDIMM's address)
+        tftp> put someFile.exe          (someFile.boot for the EPICS build system)
+
+5) When the file has downloaded press the <ESC> key to terminate
+   the uCDIMM tftp command.
+
+6) Type 'goram<CR>' to start the downloaded program, or type 'program<CR>'
+to burn the code onto the uCDIMM flash.
+
+Clock Speed Determination Algorithm
+===================================
+Till Straumann submitted a patch to provide more dynamic clock speed
+selection. 
+
+Currently, the uC5282 BSP requires relinking the application with a
+special linker flag in order to make it work with 80MHz boards (breaking
+run-time compatibility with 64MHz variants).
+
+The change aims adds support for run-time guessing/setting of
+the system-clock frequency:
+
+1) If uCbootloader environment variable SYS_CLOCK_SPEED is set to a
+non-zero number then the BSP assumes this number to specify the clock
+frequency in Hz.
+
+2) If 1) yields no non-zero frequency then the linker-provided symbol
+_CPUClockSpeed is assumed to specify the clock frequency (in Hz). This
+is the traditional behavior but the default value of _CPUClockSpeed
+was changed from 64000000 to 0 (in order to let step 3) do it's work
+by default).
+
+3) If neither 1) nor 2) yield a non-zero frequency then assume a PLL
+reference frequency (in Hz) as defined by the linker-provided symbol
+'_PLLRefClockSpeed' (which defaults to 8000000) and compute the system
+clock frequency from the divisor/multiplier settings in the SYNCR
+register.
+
+We have both, 64MHz and 80MHz variants and both use a PLL reference of
+8MHz so that run-time heuristics + detection 3) work fine.
+
+EPICS Bootstrap Information
+===========================
+The EPICS startup code uses the following environment variables.  If an
+optional environment variable is missing the value in parentheses will be used.
+All Internet addresses must be given in 'dotted-decimal' format.
+HWADDR0    - Ethernet hardware address.
+IPADDR0    - Internet address (192.168.0.2).
+NETMASK    - Local network address mask (255.255.252.0).
+HOSTNAME   - Internet host name (iocNobody).
+GATEWAY    - Internet address of gateway machine (NULL).
+SERVER     - Internet address of NFS server (192.168.0.1).
+NAMESERVER - Internet address of DNS server (SERVER).
+DOMAIN     - DNS domain name (precompiled value from CONFIG_SITE).
+NTPSERVER  - Internet address of NTP server (SERVER).
+BOOTFILE   - Path to executable (epics/iocNobody/bin/RTEMS-uC5282/myApp.boot).
+CMDLINE    - Path to startup script (epics/iocBoot/iocNobody/st.cmd).
+NFSMOUNT   - NFS information: www.xxx.yyy.zzz:/remote/path /localpath
+             A : can also be used to separate the remote and local paths.
+             If NFSMOUNT is not set, SERVER will be used as the NFS server,
+             and the remote and local paths will be taken from the first
+             component of CMDLINE.  If CMDLINE does not begin with a /
+             then '/tftpboot' is prepended to the remote path.  This allows
+             a remote TFTP and NFS server to be handled transaparently.
+
+
+============================================================================
+
+      Memory map as set up by dBUG bootstrap and BSP initialization
+
+          +--------------------------------------------------+
+0000 0000 |       16 MByte SDRAM                             | 00FF FFFF
+0100 0000 |  ---------------------------------------------   |
+          |    Address space for future SDRAM expansion      |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 0FFF FFFF
+          +--------------------------------------------------+
+1000 0000 | External 4 MByte flash memory                    |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 1FFF FFFF
+          +--------------------------------------------------+
+2000 0000 | 64 kByte on-chip SRAM (RAMBAR)                   |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 2FFF FFFF
+          +--------------------------------------------------+
+3000 0000 |  CS1* (devLib 'VME' A24 space)                   | 30FF FFFF
+3100 0000 |  CS2* (devLib 'VME' A32 and A16 space)          x| 31FF FFFF
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 3FFF FFFF
+          +--------------------------------------------------+
+4000 0000 | Internal peripheral system (IPSBAR)              |
+          .                                                  .
+4400 0000 | Backdoor access to on-chip flash                 |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | 4FFF FFFF
+          +--------------------------------------------------+
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          +--------------------------------------------------+
+f000 0000 | 512 kByte on-chip flash (FLASHBAR)               |
+          .                                                  .
+          .                                                  .
+          .                                                  .
+          |                                                  | fFFF FFFF
+          +--------------------------------------------------+
+
+x - Final 16-bit location of CS2* space is reserved for FPGA interrupt status.
+
+============================================================================
+
+      Interrupt map
+
+External interrupt lines (priority is fixed between 3 and 4):
+    IRQ7* - Ethernet Transceiver interrupts
+    IRQ1* - FPGA ('VME') interrupts.
++-----+-----------------------------------------------------------------------+
+|     |                                PRIORITY                               |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|LEVEL|    7   |    6   |    5   |    4   |    3   |    2   |    1   |    0   |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  7  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  6  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  5  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  4  | FEC RX | FEC TX |        |        |        |        |        |   PIT  |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  3  | UART 0 | UART 1 | UART 2 |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  2  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+|  1  |        |        |        |        |        |        |        |        |
++-----+--------+--------+--------+--------+--------+--------+--------+--------+
+
+============================================================================
+
diff --git a/bsps/m68k/uC5282/TIMES b/bsps/m68k/uC5282/TIMES
new file mode 100644
index 0000000000..b2cdecd28a
--- /dev/null
+++ b/bsps/m68k/uC5282/TIMES
@@ -0,0 +1,305 @@
+TIMING TESTS  2005-01-28
+========================
+
+*** TIME TEST 1 ***
+rtems_semaphore_create 19
+rtems_semaphore_delete 21
+rtems_semaphore_obtain: available 4
+rtems_semaphore_obtain: not available -- NO_WAIT 5
+rtems_semaphore_release: no waiting tasks 12
+*** END OF TEST 1 ***
+
+*** TIME TEST 2 ***
+rtems_semaphore_obtain: not available -- caller blocks 34
+*** END OF TEST 2 ***
+
+*** TIME TEST 3 ***
+rtems_semaphore_release: task readied -- preempts caller 27
+*** END OF TEST 3 ***
+
+*** TIME TEST 4 ***
+rtems_task_restart: blocked task -- preempts caller 54
+rtems_task_restart: ready task -- preempts caller 52
+rtems_semaphore_release: task readied -- returns to caller 18
+rtems_task_create 87
+rtems_task_start 24
+rtems_task_restart: suspended task -- returns to caller 27
+rtems_task_delete: suspended task 66
+rtems_task_restart: ready task -- returns to caller 28
+rtems_task_restart: blocked task -- returns to caller 38
+rtems_task_delete: blocked task 69
+*** END OF TEST 4 ***
+
+*** TIME TEST 5 ***
+rtems_task_suspend: calling task 23
+rtems_task_resume: task readied -- preempts caller 22
+*** END OF TEST 5 ***
+
+*** TIME TEST 6 ***
+rtems_task_restart: calling task 30
+rtems_task_suspend: returns to caller 9
+rtems_task_resume: task readied -- returns to caller 12
+rtems_task_delete: ready task 69
+*** END OF TEST 6 ***
+
+*** TIME TEST 7 ***
+rtems_task_restart: suspended task -- preempts caller 44
+*** END OF TEST 7 ***
+
+*** TIME TEST 9 ***
+rtems_message_queue_create 55
+rtems_message_queue_send: no waiting tasks 20
+rtems_message_queue_urgent: no waiting tasks 21
+rtems_message_queue_receive: available 20
+rtems_message_queue_flush: no messages flushed 8
+rtems_message_queue_flush: messages flushed 12
+rtems_message_queue_delete 29
+*** END OF TEST 9 ***
+
+*** TIME TEST 10 ***
+rtems_message_queue_receive: not available -- NO_WAIT 10
+rtems_message_queue_receive: not available -- caller blocks 38
+*** END OF TEST 10 ***
+
+*** TIME TEST 11 ***
+rtems_message_queue_send: task readied -- preempts caller 37
+*** END OF TEST 11 ***
+
+*** TIME TEST 12 ***
+rtems_message_queue_send: task readied -- returns to caller 23
+*** END OF TEST 12 ***
+
+*** TIME TEST 13 ***
+rtems_message_queue_urgent: task readied -- preempts caller 35
+*** END OF TEST 13 ***
+
+*** TIME TEST 14 ***
+rtems_message_queue_urgent: task readied -- returns to caller 24
+*** END OF TEST 14 ***
+
+*** TIME TEST 15 ***
+rtems_event_receive: obtain current events 0
+rtems_event_receive: not available -- NO_WAIT 5
+rtems_event_receive: not available -- caller blocks 28
+rtems_event_send: no task readied 5
+rtems_event_receive: available 9
+rtems_event_send: task readied -- returns to caller 16
+*** END OF TEST 15 ***
+
+*** TIME TEST 16 ***
+rtems_event_send: task readied -- preempts caller 27
+*** END OF TEST 16 ***
+
+*** TIME TEST 17 ***
+rtems_task_set_priority: preempts caller 39
+*** END OF TEST 17 ***
+
+*** TIME TEST 18 ***
+rtems_task_delete: calling task 83
+*** END OF TEST 18 ***
+
+*** TIME TEST 19 ***
+rtems_signal_catch 5
+rtems_signal_send: returns to caller 12
+rtems_signal_send: signal to self 20
+exit ASR overhead: returns to calling task 15
+exit ASR overhead: returns to preempting task 18
+*** END OF TEST 19 ***
+
+*** TIME TEST 20 ***
+rtems_partition_create 20
+rtems_region_create 40
+rtems_partition_get_buffer: available 11
+rtems_partition_get_buffer: not available 7
+rtems_partition_return_buffer 12
+rtems_partition_delete 11
+rtems_region_get_segment: available 28
+rtems_region_get_segment: not available -- NO_WAIT 29
+rtems_region_return_segment: no waiting tasks 29
+rtems_region_get_segment: not available -- caller blocks 55
+rtems_region_return_segment: task readied -- preempts caller 72
+rtems_region_return_segment: task readied -- returns to caller 58
+rtems_region_delete 25
+rtems_io_initialize 1
+rtems_io_open 1
+rtems_io_close 1
+rtems_io_read 1
+rtems_io_write 1
+rtems_io_control 1
+*** END OF TEST 20 ***
+
+*** TIME TEST 21 ***
+rtems_task_ident 60
+rtems_message_queue_ident 60
+rtems_semaphore_ident 69
+rtems_partition_ident 59
+rtems_region_ident 60
+rtems_port_ident 59
+rtems_timer_ident 61
+rtems_rate_monotonic_ident 60
+*** END OF TEST 21 ***
+
+*** TIME TEST 22 ***
+rtems_message_queue_broadcast: task readied -- returns to caller 32
+rtems_message_queue_broadcast: no waiting tasks 14
+rtems_message_queue_broadcast: task readied -- preempts caller 39
+*** END OF TEST 22 ***
+
+*** TIME TEST 23 ***
+rtems_timer_create 8
+rtems_timer_fire_after: inactive 12
+rtems_timer_fire_after: active 12
+rtems_timer_cancel: active 9
+rtems_timer_cancel: inactive 8
+rtems_timer_reset: inactive 14
+rtems_timer_reset: active 15
+rtems_timer_fire_when: inactive 21
+rtems_timer_fire_when: active 21
+rtems_timer_delete: active 12
+rtems_timer_delete: inactive 11
+rtems_task_wake_when 35
+*** END OF TEST 23 ***
+
+*** TIME TEST 24 ***
+rtems_task_wake_after: yield -- returns to caller 3
+rtems_task_wake_after: yields -- preempts caller 18
+*** END OF TEST 24 ***
+
+*** TIME TEST 25 ***
+rtems_clock_tick 7
+*** END OF TEST 25 ***
+
+*** TIME TEST 26 ***
+_ISR_Disable 1
+_ISR_Flash 0
+_ISR_Enable 0
+_Thread_Disable_dispatch 1
+_Thread_Enable_dispatch 3
+_Thread_Set_state 7
+_Thread_Disptach (NO FP) 16
+context switch: no floating point contexts 12
+context switch: self 2
+context switch: to another task 1
+fp context switch: restore 1st FP task 14
+fp context switch: save idle, restore initialized 3
+fp context switch: save idle, restore idle 13
+fp context switch: save initialized, restore initialized 2
+_Thread_Resume 7
+_Thread_Unblock 6
+_Thread_Ready 5
+_Thread_Get 1
+_Semaphore_Get 1
+_Thread_Get: invalid id 0
+*** END OF TEST 26 ***
+
+*** TIME TEST 27 ***
+interrupt entry overhead: returns to interrupted task 3
+interrupt exit overhead: returns to interrupted task 3
+interrupt entry overhead: returns to nested interrupt 2
+interrupt exit overhead: returns to nested interrupt 2
+interrupt entry overhead: returns to preempting task 4
+interrupt exit overhead: returns to preempting task 20
+*** END OF TEST 27 ***
+
+*** TIME TEST 28 ***
+rtems_port_create 12
+rtems_port_external_to_internal 5
+rtems_port_internal_to_external 6
+rtems_port_delete 12
+*** END OF TEST 28 ***
+
+*** TIME TEST 29 ***
+rtems_rate_monotonic_create 13
+rtems_rate_monotonic_period: initiate period -- returns to caller 20
+rtems_rate_monotonic_period: obtain status 10
+rtems_rate_monotonic_cancel 13
+rtems_rate_monotonic_delete: inactive 17
+rtems_rate_monotonic_delete: active 16
+rtems_rate_monotonic_period: conclude periods -- caller blocks 24
+*** END OF TEST 29 ***
+
+*** TIME CHECKER ***
+Units may not be in microseconds for this test!!!
+0 100000
+Total time = 0
+Average time = 0
+NULL timer stopped at 0
+LOOP (1000) timer stopped at 188
+LOOP (10000) timer stopped at 1875
+LOOP (50000) timer stopped at 9375
+LOOP (100000) timer stopped at 18750
+*** END OF TIME CHECKER ***
+
+*** TIME TEST OVERHEAD ***
+rtems_initialize_executive 0
+rtems_shutdown_executive 0
+rtems_task_create 0
+rtems_task_ident 0
+rtems_task_start 0
+rtems_task_restart 0
+rtems_task_delete 0
+rtems_task_suspend 0
+rtems_task_resume 0
+rtems_task_set_priority 0
+rtems_task_mode 0
+rtems_task_get_note 0
+rtems_task_set_note 0
+rtems_task_wake_when 1
+rtems_task_wake_after 0
+rtems_interrupt_catch 0
+rtems_clock_get 1
+rtems_clock_set 1
+rtems_clock_tick 0
+rtems_timer_create 0
+rtems_timer_delete 0
+rtems_timer_ident 0
+rtems_timer_fire_after 1
+rtems_timer_fire_when 1
+rtems_timer_reset 0
+rtems_timer_cancel 0
+rtems_semaphore_create 0
+rtems_semaphore_delete 0
+rtems_semaphore_ident 0
+rtems_semaphore_obtain 0
+rtems_semaphore_release 0
+rtems_message_queue_create 0
+rtems_message_queue_ident 0
+rtems_message_queue_delete 0
+rtems_message_queue_send 0
+rtems_message_queue_urgent 0
+rtems_message_queue_broadcast 0
+rtems_message_queue_receive 0
+rtems_message_queue_flush 0
+rtems_event_send 0
+rtems_event_receive 0
+rtems_signal_catch 0
+rtems_signal_send 0
+rtems_partition_create 0
+rtems_partition_ident 0
+rtems_partition_delete 0
+rtems_partition_get_buffer 0
+rtems_partition_return_buffer 0
+rtems_region_create 0
+rtems_region_ident 0
+rtems_region_delete 0
+rtems_region_get_segment 0
+rtems_region_return_segment 0
+rtems_port_create 0
+rtems_port_ident 0
+rtems_port_delete 0
+rtems_port_external_to_internal 0
+rtems_port_internal_to_external 0
+rtems_io_initialize 0
+rtems_io_open 0
+rtems_io_close 0
+rtems_io_read 0
+rtems_io_write 0
+rtems_io_control 0
+rtems_fatal_error_occurred 0
+rtems_rate_monotonic_create 0
+rtems_rate_monotonic_ident 0
+rtems_rate_monotonic_delete 0
+rtems_rate_monotonic_cancel 0
+rtems_rate_monotonic_period 0
+rtems_multiprocessing_announce 0
+*** END OF TIME OVERHEAD ***