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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-19 06:35:52 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-20 09:57:01 +0200 |
commit | 7632906fc290b652416ab59eb5fb49356c064ed6 (patch) | |
tree | ac036b1f95637e044e10138ceea8d2b56d80ec97 /bsps/m68k/mcf5235 | |
parent | bsps: Move bspsmpgetcurrentprocessor.c to bsps (diff) | |
download | rtems-7632906fc290b652416ab59eb5fb49356c064ed6.tar.bz2 |
bsps: Move clock drivers to bsps
This patch is a part of the BSP source reorganization.
Update #3285.
Diffstat (limited to 'bsps/m68k/mcf5235')
-rw-r--r-- | bsps/m68k/mcf5235/clock/clock.c | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/bsps/m68k/mcf5235/clock/clock.c b/bsps/m68k/mcf5235/clock/clock.c new file mode 100644 index 0000000000..db3a5850fb --- /dev/null +++ b/bsps/m68k/mcf5235/clock/clock.c @@ -0,0 +1,61 @@ +/* + * Use the last periodic interval timer (PIT3) as the system clock. + */ + +#include <rtems.h> +#include <bsp.h> +#include <mcf5235/mcf5235.h> + +/* + * Use INTC0 base + */ +#define CLOCK_VECTOR (64+39) + +/* + * Periodic interval timer interrupt handler + */ +#define Clock_driver_support_at_tick() \ + do { \ + MCF5235_PIT_PCSR3 |= MCF5235_PIT_PCSR_PIF; \ + } while (0) \ + +/* + * Attach clock interrupt handler + */ +#define Clock_driver_support_install_isr( _new ) \ + set_vector(_new, CLOCK_VECTOR, 1) + +/* + * Turn off the clock + */ +#define Clock_driver_support_shutdown_hardware() \ + do { \ + MCF5235_PIT_PCSR3 &= ~MCF5235_PIT_PCSR_EN; \ + } while(0) + +/* + * Set up the clock hardware + * + * We need to have 1 interrupt every 10,000 microseconds + * so we need to set prescaler to 64 and the PMR register to 0x2DC6 + */ +#define Clock_driver_support_initialize_hardware() \ + do { \ + int level; \ + int preScaleCode = 6; \ + MCF5235_INTC0_ICR39 = MCF5235_INTC_ICR_IL(PIT3_IRQ_LEVEL) | \ + MCF5235_INTC_ICR_IP(PIT3_IRQ_PRIORITY); \ + rtems_interrupt_disable( level ); \ + MCF5235_INTC0_IMRH &= ~MCF5235_INTC0_IMRH_INT39; \ + MCF5235_PIT_PCSR3 &= ~MCF5235_PIT_PCSR_EN; \ + rtems_interrupt_enable( level ); \ + MCF5235_PIT_PMR3 = 0x2DC6; \ + MCF5235_PIT_PCSR3 = MCF5235_PIT_PCSR_PRE(preScaleCode) | \ + MCF5235_PIT_PCSR_PIE | \ + MCF5235_PIT_PCSR_RLD | \ + MCF5235_PIT_PCSR_EN; \ + } while (0) + +#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER + +#include "../../../shared/dev/clock/clockimpl.h" |