bsps: Move console drivers to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

3 files changed, 353 insertions, 0 deletions

diff --git a/bsps/lm32/shared/console/console.c b/bsps/lm32/shared/console/console.c
new file mode 100644
index 0000000000..d49ca346b6
--- /dev/null
+++ b/bsps/lm32/shared/console/console.c
@@ -0,0 +1,178 @@
+/*
+ *  Console driver for Lattice Mico32 (lm32).
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ *  Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
+ *  Micro-Research Finland Oy
+ */
+
+#define NO_BSP_INIT
+
+#include <bsp.h>
+#include <rtems/bspIo.h>
+#include <rtems/libio.h>
+#include <rtems/console.h>
+
+/*  console_initialize
+ *
+ *  This routine initializes the console IO driver.
+ */
+rtems_device_driver console_initialize(
+  rtems_device_major_number  major,
+  rtems_device_minor_number  minor,
+  void                      *arg
+)
+{
+  rtems_status_code status;
+
+  printk("console_initialize\n");
+
+  status = rtems_io_register_name(
+    "/dev/console",
+    major,
+    (rtems_device_minor_number) 0
+  );
+
+  if (status != RTEMS_SUCCESSFUL)
+    rtems_fatal_error_occurred(status);
+
+  return RTEMS_SUCCESSFUL;
+}
+
+/*  inbyte
+ *
+ *  This routine reads a character from the SOURCE.
+ */
+static int inbyte( void )
+{
+  /*
+   *  If polling, wait until a character is available.
+   */
+  return BSP_uart_polled_read();
+}
+
+/*  outbyte
+ *
+ *  This routine transmits a character out the SOURCE.  It may support
+ *  XON/XOFF flow control.
+ */
+static void outbyte(
+  char ch
+)
+{
+  /*
+   *  If polling, wait for the transmitter to be ready.
+   *  Check for flow control requests and process.
+   *  Then output the character.
+   */
+
+  BSP_uart_polled_write(ch);
+}
+
+/*
+ *  Open entry point
+ */
+rtems_device_driver console_open(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void                    * arg
+)
+{
+  return RTEMS_SUCCESSFUL;
+}
+
+/*
+ *  Close entry point
+ */
+rtems_device_driver console_close(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void                    * arg
+)
+{
+  return RTEMS_SUCCESSFUL;
+}
+
+/*
+ * read bytes from the serial port. We only have stdin.
+ */
+rtems_device_driver console_read(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void                    * arg
+)
+{
+  rtems_libio_rw_args_t *rw_args;
+  char *buffer;
+  int maximum;
+  int count = 0;
+
+  rw_args = (rtems_libio_rw_args_t *) arg;
+
+  buffer = rw_args->buffer;
+  maximum = rw_args->count;
+
+  for (count = 0; count < maximum; count++) {
+    buffer[ count ] = inbyte();
+    if (buffer[ count ] == '\n' || buffer[ count ] == '\r') {
+      buffer[ count++ ]  = '\n';
+      break;
+    }
+  }
+
+  rw_args->bytes_moved = count;
+  return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED;
+}
+
+/*
+ * write bytes to the serial port. Stdout and stderr are the same.
+ */
+rtems_device_driver console_write(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void                    * arg
+)
+{
+  int count;
+  int maximum;
+  rtems_libio_rw_args_t *rw_args;
+  char *buffer;
+
+  rw_args = (rtems_libio_rw_args_t *) arg;
+
+  buffer = rw_args->buffer;
+  maximum = rw_args->count;
+
+  for (count = 0; count < maximum; count++) {
+    if ( buffer[ count ] == '\n') {
+      outbyte('\r');
+    }
+    outbyte( buffer[ count ] );
+  }
+
+  rw_args->bytes_moved = maximum;
+  return 0;
+}
+
+/*
+ *  IO Control entry point
+ */
+rtems_device_driver console_control(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void                    * arg
+)
+{
+  return RTEMS_SUCCESSFUL;
+}
+
+BSP_output_char_function_type BSP_output_char = BSP_uart_polled_write;
+BSP_polling_getchar_function_type BSP_poll_char = BSP_uart_polled_read;
diff --git a/bsps/lm32/shared/console/uart.c b/bsps/lm32/shared/console/uart.c
new file mode 100644
index 0000000000..9adbd4063d
--- /dev/null
+++ b/bsps/lm32/shared/console/uart.c
@@ -0,0 +1,73 @@
+/*
+ *  Uart driver for Lattice Mico32 (lm32) UART
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ *  Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
+ *  Micro-Research Finland Oy
+ */
+
+#include "../include/system_conf.h"
+#include "uart.h"
+#include <bsp.h>
+#include <rtems/libio.h>
+
+static inline int uartread(unsigned int reg)
+{
+  return *((int*)(UART_BASE_ADDRESS + reg));
+}
+
+static inline void uartwrite(unsigned int reg, int value)
+{
+  *((int*)(UART_BASE_ADDRESS + reg)) = value;
+}
+
+void BSP_uart_init(int baud)
+{
+  /* Disable UART interrupts */
+  uartwrite(LM32_UART_IER, 0);
+
+  /* Line control 8 bit, 1 stop, no parity */
+  uartwrite(LM32_UART_LCR, LM32_UART_LCR_8BIT);
+
+  /* Modem control, DTR = 1, RTS = 1 */
+  uartwrite(LM32_UART_MCR, LM32_UART_MCR_DTR | LM32_UART_MCR_RTS);
+
+  /* Set baud rate */
+  uartwrite(LM32_UART_DIV, CPU_FREQUENCY/baud);
+}
+
+void BSP_uart_polled_write(char ch)
+{
+  /* Insert CR before LF */
+  if (ch == '\n')
+    BSP_uart_polled_write('\r');
+  /* Wait until THR is empty. */
+  while (!(uartread(LM32_UART_LSR) & LM32_UART_LSR_THRE));
+  uartwrite(LM32_UART_RBR, ch);
+}
+
+int BSP_uart_polled_read( void )
+{
+  /* Wait until there is a byte in RBR */
+  while (!(uartread(LM32_UART_LSR) & LM32_UART_LSR_DR));
+  return (int) uartread(LM32_UART_RBR);
+}
+
+char BSP_uart_is_character_ready(char *ch)
+{
+  if (uartread(LM32_UART_LSR) & LM32_UART_LSR_DR)
+    {
+      *ch = (char) uartread(LM32_UART_RBR);
+      return true;
+    }
+  *ch = '0';
+  return false;
+}
diff --git a/bsps/lm32/shared/console/uart.h b/bsps/lm32/shared/console/uart.h
new file mode 100644
index 0000000000..baafde13e2
--- /dev/null
+++ b/bsps/lm32/shared/console/uart.h
@@ -0,0 +1,102 @@
+/**
+ * @file
+ * @ingroup lm32_shared lm32_uart
+ * @brief LatticeMico32 UART definitions
+ */
+
+/*
+ *  This file contains definitions for LatticeMico32 UART
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ *  Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
+ *  Micro-Research Finland Oy
+ */
+
+/**
+ * @defgroup lm32_uart LM32 UART
+ * @ingroup lm32_shared
+ * @brief LatticeMico32 UART definitions
+ * @{
+ */
+
+#ifndef _BSPUART_H
+#define _BSPUART_H
+
+void BSP_uart_init(int baud);
+
+/* Receive buffer register / transmit holding register */
+
+#define LM32_UART_RBR      (0x0000)
+
+/* Interrupt enable register */
+
+#define LM32_UART_IER      (0x0004)
+#define LM32_UART_IER_RBRI (0x0001)
+#define LM32_UART_IER_THRI (0x0002)
+#define LM32_UART_IER_RLSI (0x0004)
+#define LM32_UART_IER_MSI  (0x0008)
+
+/* Interrupt identification register */
+
+#define LM32_UART_IIR      (0x0008)
+#define LM32_UART_IIR_STAT (0x0001)
+#define LM32_UART_IIR_ID0  (0x0002)
+#define LM32_UART_IIR_ID1  (0x0004)
+
+/* Line control register */
+
+#define LM32_UART_LCR      (0x000C)
+#define LM32_UART_LCR_WLS0 (0x0001)
+#define LM32_UART_LCR_WLS1 (0x0002)
+#define LM32_UART_LCR_STB  (0x0004)
+#define LM32_UART_LCR_PEN  (0x0008)
+#define LM32_UART_LCR_EPS  (0x0010)
+#define LM32_UART_LCR_SP   (0x0020)
+#define LM32_UART_LCR_SB   (0x0040)
+#define LM32_UART_LCR_5BIT (0)
+#define LM32_UART_LCR_6BIT (LM32_UART_LCR_WLS0)
+#define LM32_UART_LCR_7BIT (LM32_UART_LCR_WLS1)
+#define LM32_UART_LCR_8BIT (LM32_UART_LCR_WLS1 | LM32_UART_LCR_WLS0)
+
+/* Modem control register */
+
+#define LM32_UART_MCR      (0x0010)
+#define LM32_UART_MCR_DTR  (0x0001)
+#define LM32_UART_MCR_RTS  (0x0002)
+
+/* Line status register */
+
+#define LM32_UART_LSR      (0x0014)
+#define LM32_UART_LSR_DR   (0x0001)
+#define LM32_UART_LSR_OE   (0x0002)
+#define LM32_UART_LSR_PE   (0x0004)
+#define LM32_UART_LSR_FE   (0x0008)
+#define LM32_UART_LSR_BI   (0x0010)
+#define LM32_UART_LSR_THRE (0x0020)
+#define LM32_UART_LSR_TEMT (0x0040)
+
+/* Modem status register */
+
+#define LM32_UART_MSR      (0x0018)
+#define LM32_UART_MSR_DCTS (0x0001)
+#define LM32_UART_MSR_DDSR (0x0002)
+#define LM32_UART_MSR_TERI (0x0004)
+#define LM32_UART_MSR_DDCD (0x0008)
+#define LM32_UART_MSR_CTS  (0x0010)
+#define LM32_UART_MSR_DSR  (0x0020)
+#define LM32_UART_MSR_RI   (0x0040)
+#define LM32_UART_MSR_DCD  (0x0000)
+
+/* Baud-rate divisor register */
+
+#define LM32_UART_DIV      (0x001C)
+
+#endif /* _BSPUART_H */
+
+/** @} */