diff options
author | Jan Sommer <jan.sommer@dlr.de> | 2021-03-19 12:12:09 +0100 |
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committer | Jan Sommer <jan.sommer@dlr.de> | 2021-03-23 09:17:38 +0100 |
commit | 1343fb5f01effe2ba18decd32516b4c08c2d7472 (patch) | |
tree | 7385052701586fdc7a4ddcad4a37782620b99cc5 /bsps/include | |
parent | validation: Use support functions (diff) | |
download | rtems-1343fb5f01effe2ba18decd32516b4c08c2d7472.tar.bz2 |
bsps/riscv: Add per cpu clock interrupt
- Fixes failure of test smpclock01
Diffstat (limited to 'bsps/include')
-rw-r--r-- | bsps/include/bsp/fatal.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/bsps/include/bsp/fatal.h b/bsps/include/bsp/fatal.h index ec5902755e..54ed4b2027 100644 --- a/bsps/include/bsp/fatal.h +++ b/bsps/include/bsp/fatal.h @@ -155,6 +155,7 @@ typedef enum { RISCV_FATAL_INVALID_INTERRUPT_AFFINITY, RISCV_FATAL_NO_NS16550_INTERRUPTS_IN_DEVICE_TREE, RISCV_FATAL_NO_TLCLOCK_FREQUENCY_IN_DEVICE_TREE, + RISCV_FATAL_CLOCK_SMP_INIT, /* GRLIB fatal codes */ GRLIB_FATAL_CLOCK_NO_IRQMP_TIMESTAMP_SUPPORT = BSP_FATAL_CODE_BLOCK(14), |