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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2024-04-10 14:47:51 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2024-04-16 07:26:35 +0200 |
| commit | 26eb5816df304c56e684dbb312412885a5f39d49 (patch) | |
| tree | f25ba9e925eed8aa1f387c0401c6344af8fd5c95 /bsps/include/dev/irq/arm-gic-regs.h | |
| parent | bsps/arm: Improve GICv2 support (diff) | |
| download | rtems-26eb5816df304c56e684dbb312412885a5f39d49.tar.bz2 | |
dev/irq: Improve Doxgyen group assignments
Make the GIC interrupt controller support a subgroup of the generic interrupt
controller support.
Diffstat (limited to 'bsps/include/dev/irq/arm-gic-regs.h')
| -rw-r--r-- | bsps/include/dev/irq/arm-gic-regs.h | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/bsps/include/dev/irq/arm-gic-regs.h b/bsps/include/dev/irq/arm-gic-regs.h index 097ff67c13..c03a7a7a07 100644 --- a/bsps/include/dev/irq/arm-gic-regs.h +++ b/bsps/include/dev/irq/arm-gic-regs.h @@ -1,11 +1,12 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /** - * @file + * @file * - * @ingroup arm_gic + * @ingroup DevIRQGIC * - * @brief ARM GIC Register definitions + * @brief This header file provides interfaces of the ARM Generic Interrupt + * Controller (GIC) memory-mapped registers. */ /* @@ -38,6 +39,12 @@ #include <bsp/utility.h> +/** + * @addtogroup DevIRQGIC + * + * @{ + */ + typedef struct { uint32_t iccicr; #define GIC_CPUIF_ICCICR_CBPR BSP_BIT32(4) @@ -225,4 +232,6 @@ typedef struct { uint32_t icspigrpmodr[64]; } gic_sgi_ppi; +/** @} */ + #endif /* LIBBSP_ARM_SHARED_ARM_GIC_REGS_H */ |