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| author | Pragnesh Patel <pragnesh.patel@sifive.com> | 2019-10-22 10:20:05 +0000 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-10-23 08:11:50 +0200 |
| commit | a7f5e42cc5234f239a01b8f69847ebb018710948 (patch) | |
| tree | 75d1abe5128bc54b678580c7d2d03b6823568e70 /bsps/include/bsp/fatal.h | |
| parent | libdebugger/arm: Clean up the building on arm variants. (diff) | |
| download | rtems-a7f5e42cc5234f239a01b8f69847ebb018710948.tar.bz2 | |
riscv: add freedom E310 Arty A7 bsp
Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board.
Update #3785.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Diffstat (limited to 'bsps/include/bsp/fatal.h')
| -rw-r--r-- | bsps/include/bsp/fatal.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/bsps/include/bsp/fatal.h b/bsps/include/bsp/fatal.h index fae5461699..3f8e1eb591 100644 --- a/bsps/include/bsp/fatal.h +++ b/bsps/include/bsp/fatal.h @@ -152,7 +152,8 @@ typedef enum { RISCV_FATAL_INVALID_PLIC_NDEV_IN_DEVICE_TREE, RISCV_FATAL_TOO_LARGE_PLIC_NDEV_IN_DEVICE_TREE, RISCV_FATAL_INVALID_INTERRUPT_AFFINITY, - RISCV_FATAL_NO_NS16550_INTERRUPTS_IN_DEVICE_TREE + RISCV_FATAL_NO_NS16550_INTERRUPTS_IN_DEVICE_TREE, + RISCV_FATAL_NO_TLCLOCK_FREQUENCY_IN_DEVICE_TREE } bsp_fatal_code; RTEMS_NO_RETURN static inline void |