diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-07-19 12:11:19 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-07-25 10:07:43 +0200 |
| commit | 8db3f0e878b7f008ad05716f501220509662e2c4 (patch) | |
| tree | d55db59defa95096a3ef156427822a9f8744ab58 /bsps/include/bsp/fatal.h | |
| parent | riscv: New CPU_Exception_frame (diff) | |
| download | rtems-8db3f0e878b7f008ad05716f501220509662e2c4.tar.bz2 | |
riscv: Rework exception handling
Remove _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector()
functions. Applications can install an exception handler via the fatal
error handler to handle synchronous exceptions.
Handle interrupt exceptions via _RISCV_Interrupt_dispatch() which must
be provided by the BSP.
Update #3433.
Diffstat (limited to 'bsps/include/bsp/fatal.h')
| -rw-r--r-- | bsps/include/bsp/fatal.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/bsps/include/bsp/fatal.h b/bsps/include/bsp/fatal.h index 77c056601c..92ab55fbb4 100644 --- a/bsps/include/bsp/fatal.h +++ b/bsps/include/bsp/fatal.h @@ -142,7 +142,9 @@ typedef enum { /* RISC-V fatal codes */ RISCV_FATAL_NO_TIMEBASE_FREQUENCY_IN_DEVICE_TREE = BSP_FATAL_CODE_BLOCK(13), RISCV_FATAL_NO_NS16550_REG_IN_DEVICE_TREE, - RISCV_FATAL_NO_NS16550_CLOCK_FREQUENCY_IN_DEVICE_TREE + RISCV_FATAL_NO_NS16550_CLOCK_FREQUENCY_IN_DEVICE_TREE, + RISCV_FATAL_UNEXPECTED_INTERRUPT_EXCEPTION, + RISCV_FATAL_CLOCK_IRQ_INSTALL } bsp_fatal_code; RTEMS_NO_RETURN static inline void |