diff options
| author | Chris Johns <chrisj@rtems.org> | 2017-12-23 18:18:56 +1100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-01-25 08:45:26 +0100 |
| commit | 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9 (patch) | |
| tree | 44759efe9374f13200a97e96d91bd9a2b7e5ce2a /bsps/i386 | |
| parent | MAINTAINERS: Add myself to Write After Approval. (diff) | |
| download | rtems-2afb22b7e1ebcbe40373ff7e0efae7d207c655a9.tar.bz2 | |
Remove make preinstall
A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.
This has at least seven problems:
* The make preinstall step itself needs time and disk space.
* Errors in header files show up in the build tree copy. This makes it
hard for editors to open the right file to fix the error.
* There is no clear relationship between source and build tree header
files. This makes an audit of the build process difficult.
* The visibility of all header files in the build tree makes it
difficult to enforce API barriers. For example it is discouraged to
use BSP-specifics in the cpukit.
* An introduction of a new build system is difficult.
* Include paths specified by the -B option are system headers. This
may suppress warnings.
* The parallel build had sporadic failures on some hosts.
This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.
The new cpukit include directories are:
* cpukit/include
* cpukit/score/cpu/@RTEMS_CPU@/include
* cpukit/libnetworking
The new BSP include directories are:
* bsps/include
* bsps/@RTEMS_CPU@/include
* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include
There are build tree include directories for generated files.
The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.
The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.
Update #3254.
Diffstat (limited to 'bsps/i386')
28 files changed, 3880 insertions, 0 deletions
diff --git a/bsps/i386/headers.am b/bsps/i386/headers.am new file mode 100644 index 0000000000..8a3d39cfbb --- /dev/null +++ b/bsps/i386/headers.am @@ -0,0 +1,20 @@ +## This file was generated by "./boostrap -H". + +include_HEADERS = +include_HEADERS += ../../../../../bsps/i386/include/i386_io.h +include_HEADERS += ../../../../../bsps/i386/include/uart.h + +include_bspdir = $(includedir)/bsp +include_bsp_HEADERS = +include_bsp_HEADERS += ../../../../../bsps/i386/include/bsp/apic.h +include_bsp_HEADERS += ../../../../../bsps/i386/include/bsp/irq.h +include_bsp_HEADERS += ../../../../../bsps/i386/include/bsp/irq_asm.h +include_bsp_HEADERS += ../../../../../bsps/i386/include/bsp/realmode_int.h +include_bsp_HEADERS += ../../../../../bsps/i386/include/bsp/smp-imps.h +include_bsp_HEADERS += ../../../../../bsps/i386/include/bsp/tty_drv.h + +include_libcpudir = $(includedir)/libcpu +include_libcpu_HEADERS = +include_libcpu_HEADERS += ../../../../../bsps/i386/include/libcpu/byteorder.h +include_libcpu_HEADERS += ../../../../../bsps/i386/include/libcpu/cpuModel.h +include_libcpu_HEADERS += ../../../../../bsps/i386/include/libcpu/page.h diff --git a/bsps/i386/include/bsp/apic.h b/bsps/i386/include/bsp/apic.h new file mode 100644 index 0000000000..9ae103b963 --- /dev/null +++ b/bsps/i386/include/bsp/apic.h @@ -0,0 +1,125 @@ +/** + * @file + * @ingroup i386_apic + * @brief Local and I/O APIC definitions + */ + +/* + * Author: Erich Boleyn <erich@uruk.org> + * http://www.uruk.org/~erich/ + * + * Copyright (c) 1997-2011 Erich Boleyn. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @defgroup i386_apci + * @ingroup i386_pci + * @brief Intel Architecture local and I/O APIC definitions + * @{ + */ + +/* + * Header file for Intel Architecture local and I/O APIC definitions. + * + * This file was created from information in the Intel Pentium Pro + * Family Developer's Manual, Volume 3: Operating System Writer's + * Manual, order number 242692-001, which can be ordered from the + * Intel literature center. + */ + +#ifndef _APIC_H +#define _APIC_H + +/* + * APIC Defines. + */ + +/* + * Recommendation: Don't use this except for MSI interrupt delivery. + * In general, the "Destination Mode" can be used to control this, since + * it is DIFFERENT (0xF) for Pentium and P6, but not on the same APIC + * version for AMD Opteron. + */ +#define APIC_BCAST_ID 0xFF + +/* + * APIC register definitions + */ + +/* + * Shared defines for I/O and local APIC definitions + */ +/** @brief APIC version register */ +#define APIC_VERSION(x) ((x) & 0xFF) +#define APIC_MAXREDIR(x) (((x) >> 16) & 0xFF) +/** @brief APIC id register */ +#define APIC_ID(x) ((x) >> 24) +#define APIC_VER_NEW 0x10 + +#define IOAPIC_REGSEL 0 +#define IOAPIC_RW 0x10 +#define IOAPIC_ID 0 +#define IOAPIC_VER 1 +#define IOAPIC_REDIR 0x10 + +#define LAPIC_ID 0x20 +#define LAPIC_VER 0x30 +#define LAPIC_TPR 0x80 +#define LAPIC_APR 0x90 +#define LAPIC_PPR 0xA0 +#define LAPIC_EOI 0xB0 +#define LAPIC_LDR 0xD0 +#define LAPIC_DFR 0xE0 +#define LAPIC_SPIV 0xF0 +#define LAPIC_SPIV_ENABLE_APIC 0x100 +#define LAPIC_ISR 0x100 +#define LAPIC_TMR 0x180 +#define LAPIC_IRR 0x200 +#define LAPIC_ESR 0x280 +#define LAPIC_ICR 0x300 +#define LAPIC_ICR_DS_SELF 0x40000 +#define LAPIC_ICR_DS_ALLINC 0x80000 +#define LAPIC_ICR_DS_ALLEX 0xC0000 +#define LAPIC_ICR_TM_LEVEL 0x8000 +#define LAPIC_ICR_LEVELASSERT 0x4000 +#define LAPIC_ICR_STATUS_PEND 0x1000 +#define LAPIC_ICR_DM_LOGICAL 0x800 +#define LAPIC_ICR_DM_LOWPRI 0x100 +#define LAPIC_ICR_DM_SMI 0x200 +#define LAPIC_ICR_DM_NMI 0x400 +#define LAPIC_ICR_DM_INIT 0x500 +#define LAPIC_ICR_DM_SIPI 0x600 +#define LAPIC_LVTT 0x320 +#define LAPIC_LVTPC 0x340 +#define LAPIC_LVT0 0x350 +#define LAPIC_LVT1 0x360 +#define LAPIC_LVTE 0x370 +#define LAPIC_TICR 0x380 +#define LAPIC_TCCR 0x390 +#define LAPIC_TDCR 0x3E0 + +#endif /* _APIC_H */ + +/** @} */ diff --git a/bsps/i386/include/bsp/irq.h b/bsps/i386/include/bsp/irq.h new file mode 100644 index 0000000000..f7e673c8a7 --- /dev/null +++ b/bsps/i386/include/bsp/irq.h @@ -0,0 +1,96 @@ +/** + * @file + * @ingroup i386_irq + * @brief Interrupt handlers + */ + +/* irq.h + * + * This include file describe the data structure and the functions implemented + * by rtems to write interrupt handlers. + * + * CopyRight (C) 1998 valette@crf.canon.fr + * + * This code is heavilly inspired by the public specification of STREAM V2 + * that can be found at : + * + * <http://www.chorus.com/Documentation/index.html> by following + * the STREAM API Specification Document link. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +/** + * @defgroup i386_irq Interrupt handlers + * @ingroup i386_shared + * @brief Data structure and the functions to write interrupt handlers + * @{ + */ + +#ifndef _IRQ_H_ +#define _IRQ_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @brief + * Include some preprocessor value also used by assember code + */ + +#include <bsp/irq_asm.h> +#include <rtems.h> +#define BSP_SHARED_HANDLER_SUPPORT 1 +#include <rtems/irq.h> +#include <rtems/irq-extension.h> + +/*-------------------------------------------------------------------------+ +| Constants ++--------------------------------------------------------------------------*/ + +/** @brief Base vector for our IRQ handlers. */ +#define BSP_IRQ_VECTOR_BASE BSP_ASM_IRQ_VECTOR_BASE +#define BSP_IRQ_LINES_NUMBER 16 +#define BSP_IRQ_MAX_ON_i8259A (BSP_IRQ_LINES_NUMBER - 1) + +/* + * Define the number of valid vectors. This is different to the number of IRQ + * signals supported. Use this value to allocation vector data or range check. + */ +#define BSP_IRQ_VECTOR_NUMBER 17 +#define BSP_IRQ_VECTOR_LOWEST_OFFSET 0 +#define BSP_IRQ_VECTOR_MAX_OFFSET (BSP_IRQ_VECTOR_NUMBER - 1) + +/** @brief + * Interrupt offset in comparison to BSP_ASM_IRQ_VECTOR_BASE + * NB : 1) Interrupt vector number in IDT = offset + BSP_ASM_IRQ_VECTOR_BASE + * 2) The same name should be defined on all architecture + * so that handler connection can be unchanged. + */ +#define BSP_PERIODIC_TIMER 0 /* fixed on all builds of PC */ +#define BSP_KEYBOARD 1 /* fixed on all builds of PC */ +#define BSP_UART_COM2_IRQ 3 /* fixed for ISA bus */ +#define BSP_UART_COM1_IRQ 4 /* fixed for ISA bus */ +#define BSP_UART_COM3_IRQ 5 +#define BSP_UART_COM4_IRQ 6 +#define BSP_RT_TIMER1 8 +#define BSP_RT_TIMER3 10 +#define BSP_SMP_IPI 16 /* not part of the ATPIC */ + +#define BSP_INTERRUPT_VECTOR_MIN BSP_IRQ_VECTOR_LOWEST_OFFSET +#define BSP_INTERRUPT_VECTOR_MAX BSP_IRQ_VECTOR_MAX_OFFSET + +/** @brief + * Type definition for RTEMS managed interrupts + */ +typedef unsigned short rtems_i8259_masks; + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* _IRQ_H_ */ diff --git a/bsps/i386/include/bsp/irq_asm.h b/bsps/i386/include/bsp/irq_asm.h new file mode 100644 index 0000000000..05cb4e6cc3 --- /dev/null +++ b/bsps/i386/include/bsp/irq_asm.h @@ -0,0 +1,45 @@ +/** + * @file + * @ingroup i386_irq + * @brief + */ + +/* irq_asm.h + * + * This include file has defines to represent some contant used + * to program and manage the Intel 8259 interrupt controller + * + * + * COPYRIGHT (c) 1998 valette@crf.canon.fr + * + * Copyright (c) 2016 Chris Johns <chrisj@rtems.org> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ +#ifndef __I8259S_H__ +#define __I8259S_H__ + +#define BSP_ASM_IRQ_VECTOR_BASE 0x20 + /** @brief PIC's command and mask registers */ +#define PIC_MASTER_COMMAND_IO_PORT 0x20 ///< Master PIC command register +#define PIC_SLAVE_COMMAND_IO_PORT 0xa0 ///< Slave PIC command register +#define PIC_MASTER_IMR_IO_PORT 0x21 ///< Master PIC Interrupt Mask Register +#define PIC_SLAVE_IMR_IO_PORT 0xa1 ///< Slave PIC Interrupt Mask Register + + /** @brief Command for specific EOI (End Of Interrupt): Interrupt acknowledge */ +#define PIC_EOSI 0x60 ///< End of Specific Interrupt (EOSI) +#define PIC_EOI 0x20 ///< Generic End of Interrupt (EOI) + +/* Operation control word type 3. Bit 3 (0x08) must be set. Even address. */ +#define PIC_OCW3_RIS 0x01 /* 1 = read IS, 0 = read IR */ +#define PIC_OCW3_RR 0x02 /* register read */ +#define PIC_OCW3_P 0x04 /* poll mode command */ +/* 0x08 must be 1 to select OCW3 vs OCW2 */ +#define PIC_OCW3_SEL 0x08 /* must be 1 */ +/* 0x10 must be 0 to select OCW3 vs ICW1 */ +#define PIC_OCW3_SMM 0x20 /* special mode mask */ +#define PIC_OCW3_ESMM 0x40 /* enable SMM */ + +#endif diff --git a/bsps/i386/include/bsp/realmode_int.h b/bsps/i386/include/bsp/realmode_int.h new file mode 100644 index 0000000000..e8a1e36d01 --- /dev/null +++ b/bsps/i386/include/bsp/realmode_int.h @@ -0,0 +1,97 @@ +/** + * @file realmode_int.h + * + * @ingroup i386_shared + * + * @brief Definitioins supporting real mode interrupt calls. + * + * Interface allows calling given interrupt number with content of the + * registers defined. For passing or receiving higher amounts of the data + * there is a buffer accessible from real mode available. Real mode pointer + * to this buffer is passed to the interrupt in the registers. + */ + +/* + * Copyright (C) 2014 Jan Doležal (dolezj21@fel.cvut.cz) + * CTU in Prague. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef _REALMODE_INT_H +#define _REALMODE_INT_H + +#include <rtems/score/cpu.h> +#include <stdint.h> + +#ifndef ASM /* ASM */ + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +/* --- BIOS service interrupt number --- */ +/* number of interrupt servicing video functions */ +#define INTERRUPT_NO_VIDEO_SERVICES 0x10 + +/** + * @brief Used for passing and retrieving registers content to/from real mode + * interrupt call. + */ +typedef struct { + uint32_t reg_eax; + uint32_t reg_ebx; + uint32_t reg_ecx; + uint32_t reg_edx; + uint32_t reg_esi; + uint32_t reg_edi; + uint16_t reg_ds; + uint16_t reg_es; + uint16_t reg_fs; + uint16_t reg_gs; +} RTEMS_PACKED i386_realmode_interrupt_registers; + +/** + * @brief Returns buffer and its size usable with real mode interrupt call. + * + * Provides position to real mode buffer. It is buffer + * accessible from real mode context - it is located below + * address ~0x100000 in order for it to be accessible + * This buffer is meant to be pointed to by segReg:GenPurpReg + * and through this get bigger portion of an information to/from + * interrupt service routine than just by using register. + * + * @param[out] size pointer to variable, where the size of buffer + * will be filled + * @retval pointer to buffer + */ +extern void *i386_get_default_rm_buffer(uint16_t *size); + +/** + * @brief Call to real mode interrupt with specified int NO and processor + * registers. + * + * This function allows calling interrupts in real mode and to set processor + * registers as desired before interrupt call is made and to retrieve the + * registers content after call was made. + * + * @param[in] interrupt_number interrupt number to be called + * @param[in] ir pointer to structure containing registers to be passed to + * interrupt and to retrieve register content after call was made. + * @retval 0 call failed (GDT too small or pagin is on) + * @retval 1 call successful + */ +extern int i386_real_interrupt_call( + uint8_t interrupt_number, + i386_realmode_interrupt_registers *ir +); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* ASM */ + +#endif /* _REALMODE_INT_H */ diff --git a/bsps/i386/include/bsp/smp-imps.h b/bsps/i386/include/bsp/smp-imps.h new file mode 100644 index 0000000000..60e688547b --- /dev/null +++ b/bsps/i386/include/bsp/smp-imps.h @@ -0,0 +1,245 @@ +/** + * @file + * @ingroup i386_smp + * @brief Intel MultiProcessor Specification (MPS) + * version 1.1 and 1.4 SMP hardware control + */ + +/* + * Author: Erich Boleyn <erich@uruk.org> + * http://www.uruk.org/~erich/ + * + * Copyright (c) 1997-2011 Erich Boleyn. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Header file implementing Intel MultiProcessor Specification (MPS) + * version 1.1 and 1.4 SMP hardware control for Intel Architecture CPUs, + * with hooks for running correctly on a standard PC without the hardware. + * + * This file was created from information in the Intel MPS version 1.4 + * document, order number 242016-004, which can be ordered from the + * Intel literature center. + */ + +/* + * This file is based upon code by Eric Boleyn as documented above. + * RTEMS support was added and minimal other changes were made. + * This should make it easier to compare this file with the original + * version. + * + * COPYRIGHT (c) 2011. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +/** + * @defgroup i386_smp SMP + * @ingroup i386_shared + * @brief + * Header file implementing Intel MultiProcessor Specification (MPS) + * version 1.1 and 1.4 SMP hardware control for Intel Architecture CPUs, + * with hooks for running correctly on a standard PC without the hardware. + */ + +#ifndef _SMP_IMPS_H +#define _SMP_IMPS_H + +/* make sure "apic.h" is included */ +#ifndef _APIC_H +#error Must include "apic.h" before "smp-imps.h" +#endif /* !_APIC_H */ + +/* + * Defines used. + */ + +#define IMPS_READ(x) (*((volatile unsigned *) (x))) +#define IMPS_WRITE(x,y) (*((volatile unsigned *) (x)) = (y)) + +#ifdef IMPS_DEBUG +#define IMPS_DEBUG_PRINT(x) KERNEL_PRINT(x) +#else /* !IMPS_DEBUG */ +#define IMPS_DEBUG_PRINT(x) +#endif /* !IMPS_DEBUG */ + +#define IMPS_MAX_CPUS APIC_BCAST_ID + +/** @brief + * This is the value that must be in the "sig" member of the MP + * Floating Pointer Structure. + */ +#define IMPS_FPS_SIGNATURE ('_' | ('M'<<8) | ('P'<<16) | ('_'<<24)) +#define IMPS_FPS_IMCRP_BIT 0x80 +#define IMPS_FPS_DEFAULT_MAX 7 + +/** @brief + * This is the value that must be in the "sig" member of the MP + * Configuration Table Header. + */ +#define IMPS_CTH_SIGNATURE ('P' | ('C'<<8) | ('M'<<16) | ('P'<<24)) + +/** @brief + * These are the "type" values for Base MP Configuration Table entries. + */ +#define IMPS_FLAG_ENABLED 1 +#define IMPS_BCT_PROCESSOR 0 +#define IMPS_CPUFLAG_BOOT 2 +#define IMPS_BCT_BUS 1 +#define IMPS_BCT_IOAPIC 2 +#define IMPS_BCT_IO_INTERRUPT 3 +#define IMPS_BCT_LOCAL_INTERRUPT 4 +#define IMPS_INT_INT 0 +#define IMPS_INT_NMI 1 +#define IMPS_INT_SMI 2 +#define IMPS_INT_EXTINT 3 + + +/* + * Typedefs and data item definitions done here. + */ + +typedef struct imps_fps imps_fps; ///< MP floating pointer structure +typedef struct imps_cth imps_cth; ///< MP configuration table header +typedef struct imps_processor imps_processor; +typedef struct imps_bus imps_bus; +typedef struct imps_ioapic imps_ioapic; +typedef struct imps_interrupt imps_interrupt; + + +/* + * Data structures defined here + */ + +/** @brief + * MP Floating Pointer Structure (fps) + * + * Look at page 4-3 of the MP spec for the starting definitions of + * this structure. + */ +struct imps_fps +{ + unsigned sig; + imps_cth *cth_ptr; + unsigned char length; + unsigned char spec_rev; + unsigned char checksum; + unsigned char feature_info[5]; +}; + +/** @brief + * MP Configuration Table Header (cth) + * + * Look at page 4-5 of the MP spec for the starting definitions of + * this structure. + */ +struct imps_cth +{ + unsigned sig; + unsigned short base_length; + unsigned char spec_rev; + unsigned char checksum; + char oem_id[8]; + char prod_id[12]; + unsigned oem_table_ptr; + unsigned short oem_table_size; + unsigned short entry_count; + unsigned lapic_addr; + unsigned short extended_length; + unsigned char extended_checksum; + char reserved[1]; +}; + +/** @brief + * Base MP Configuration Table Types. They are sorted according to + * type (i.e. all of type 0 come first, etc.). Look on page 4-6 for + * the start of the descriptions. + */ + +struct imps_processor +{ + unsigned char type; ///< must be 0 + unsigned char apic_id; + unsigned char apic_ver; + unsigned char flags; + unsigned signature; + unsigned features; + char reserved[8]; +}; + +struct imps_bus +{ + unsigned char type; ///< must be 1 + unsigned char id; + char bus_type[6]; +}; + +struct imps_ioapic +{ + unsigned char type; ///< must be 2 + unsigned char id; + unsigned char ver; + unsigned char flags; + unsigned addr; +}; + +struct imps_interrupt +{ + unsigned char type; ///< must be 3 or 4 + unsigned char int_type; + unsigned short flags; + unsigned char source_bus_id; + unsigned char source_bus_irq; + unsigned char dest_apic_id; + unsigned char dest_apic_intin; +}; + +/* + * Exported globals here. + */ + +/** @brief + * These map from virtual cpu numbers to APIC id's and back. + */ +extern unsigned char imps_cpu_apic_map[IMPS_MAX_CPUS]; +extern unsigned char imps_apic_cpu_map[IMPS_MAX_CPUS]; + +/** @brief base address of application processor reset code at 0x70000 */ +extern char _binary_appstart_bin_start[]; +extern char _binary_appstart_bin_size[]; + +/* + * Defines that use variables + */ +#define IMPS_LAPIC_READ(x) (*((volatile unsigned *) (imps_lapic_addr+(x)))) +#define IMPS_LAPIC_WRITE(x, y) \ + (*((volatile unsigned *) (imps_lapic_addr+(x))) = (y)) + +#endif /* !_SMP_IMPS_H */ + +/** @} */ diff --git a/bsps/i386/include/bsp/tty_drv.h b/bsps/i386/include/bsp/tty_drv.h new file mode 100644 index 0000000000..cbfb346f22 --- /dev/null +++ b/bsps/i386/include/bsp/tty_drv.h @@ -0,0 +1,104 @@ +/** + * @file + * @ingroup i386_tty + * @brief ttySx driver + */ + +#ifndef __tty_drv__ +#define __tty_drv__ +/*************************************************************************** + * + * Copyright (c) 1999 ConnectTel, Inc. All Rights Reserved. + * + * MODULE DESCRIPTION: Prototype routines for the ttySx driver. + * + * by: Rosimildo da Silva: + * rdasilva@connecttel.com + * http://www.connecttel.com + * + ****************************************************************************/ + +/** + * @defgroup i386_tty ttSx + * @ingroup i386_comm + * @brief i386 tySx driver + * @{ + */ + +/* functions */ +#ifdef __cplusplus +extern "C" { +#endif + +/** @brief ttyS1 entry points */ +rtems_device_driver tty1_initialize( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver tty1_open( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver tty1_control( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +/** @brief tty1 & tty2 shared entry points */ +rtems_device_driver tty_close( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver tty_read( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver tty_write( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +/** @brief tty2 entry points */ +rtems_device_driver tty2_initialize( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver tty2_open( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver tty2_control( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +#define TTY1_DRIVER_TABLE_ENTRY \ + { tty1_initialize, tty1_open, tty_close, \ + tty_read, tty_write, tty1_control } + +#define TTY2_DRIVER_TABLE_ENTRY \ + { tty2_initialize, tty2_open, tty_close, \ + tty_read, tty_write, tty2_control } + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* __tty_drv__ */ diff --git a/bsps/i386/include/i386_io.h b/bsps/i386/include/i386_io.h new file mode 100644 index 0000000000..1308d58b6b --- /dev/null +++ b/bsps/i386/include/i386_io.h @@ -0,0 +1,73 @@ +/** + * @file + * @ingroup i386_io + * @brief I/O + */ + +/* + * Copyright (c) 2000 - Rosimildo da Silva. All Rights Reserved. + * + * MODULE DESCRIPTION: + * + * IO Functions for the PC platform equivalent to DOS/Linux. They make + * eaiser the porting of code from these platforms. + * + * by: Rosimildo da Silva: rdasilva@connecttel.com + * + */ + +/** + * @defgroup i386_io I/O + * @ingroup i386_comm + * @brief I/O + * @{ + */ + +#ifndef i386_io_h__ +#define i386_io_h__ + +#define rtems_inb(port) \ +({ \ + register int _inb_result; \ + \ + __asm__ volatile ("xorl %%eax,%%eax; inb %%dx,%%al" : \ + "=a" (_inb_result) : "d" (port)); \ + _inb_result; \ +}) + +#define rtems_inw(port) \ +({ \ + register int _inbw_result; \ + \ + __asm__ volatile ("xorl %%eax,%%eax; inw %%dx,%%ax" : \ + "=a" (_inbw_result) : "d" (port)); \ + _inbw_result; \ +}) + +#define rtems_outb(port, data) \ + __asm__ volatile ("outb %%al,%%dx" : : "a" (data), "d" (port)) + +#define rtems_outw(port, data) \ + __asm__ volatile ("outw %%ax,%%dx" : : "a" (data), "d" (port)) + +#define outp(port, val) rtems_outb(port,val) +#define inp(port) rtems_inb(port) + +#define outb(val, port) rtems_outb(port,val) +#define inb(port) rtems_inb(port) + +#define outb_p(val, port) rtems_outb(port,val) +#define inb_p(port) rtems_inb(port) + +#define outportb(port,val) rtems_outb(port,val) +#define inportb(port) rtems_inb(port) + +#define outw(val, port) rtems_outw(port,val) +#define inw(port) rtems_inw(port) + +#define cli() __asm__ __volatile__("cli") +#define sti() __asm__ __volatile__("sti"); + +#endif /* i386_io_h__ */ + +/** @} */ diff --git a/bsps/i386/include/libcpu/byteorder.h b/bsps/i386/include/libcpu/byteorder.h new file mode 100644 index 0000000000..939e51fe84 --- /dev/null +++ b/bsps/i386/include/libcpu/byteorder.h @@ -0,0 +1,31 @@ +/* + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef _LIBCPU_BYTEORDER_H +#define _LIBCPU_BYTEORDER_H + +static inline void st_le32(volatile uint32_t *addr, uint32_t value) +{ + *(addr)=value ; +} + +static inline uint32_t ld_le32(volatile uint32_t *addr) +{ + return(*addr); +} + +static inline void st_le16(volatile uint16_t *addr, uint16_t value) +{ + *(addr)=value ; +} + +static inline uint16_t ld_le16(volatile uint16_t *addr) +{ + return(*addr); +} + + +#endif diff --git a/bsps/i386/include/libcpu/cpuModel.h b/bsps/i386/include/libcpu/cpuModel.h new file mode 100644 index 0000000000..d17839b7ea --- /dev/null +++ b/bsps/i386/include/libcpu/cpuModel.h @@ -0,0 +1,51 @@ +/* + * This file contains declaration for variables and code + * that may be used to get the Intel Cpu identification + * that has been performed by checkCPUtypeSetCr0 function. + */ + +/* + * COPYRIGHT (c) 1998 valette@crf.canon.fr + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef libcpu_cpuModel_h +#define libcpu_cpuModel_h + +/* + * Tell us the machine setup.. + */ + +extern char hard_math; /* floating point coprocessor present indicator */ +extern char x86; /* type of cpu (3 = 386, 4 =486, ...) */ +extern char x86_model; +extern char x86_mask; +extern int x86_capability; /* cpuid:EDX */ +extern int x86_capability_x; /* cpuid:ECX */ +extern int x86_capability_ebx; /* cpuid:EBX */ +extern int x86_capability_cores; /* cpuid.(EAX=4, ECX=0) - physical cores */ +extern char x86_vendor_id[13]; +extern int have_cpuid; +extern unsigned char Cx86_step; /* cyrix processor identification */ + +/* Display this information on console in ascii form */ +extern void printCpuInfo(void); + +/* determine if the CPU has a TSC */ +#define x86_has_tsc() \ + (x86_capability & (1 << 4)) + +static inline unsigned long long +rdtsc(void) +{ + /* Return the value of the on-chip cycle counter. */ + unsigned long long result; + __asm__ volatile(".byte 0x0F, 0x31" : "=A" (result)); + return result; +} /* rdtsc */ + + +#endif diff --git a/bsps/i386/include/libcpu/page.h b/bsps/i386/include/libcpu/page.h new file mode 100644 index 0000000000..5e9cec2227 --- /dev/null +++ b/bsps/i386/include/libcpu/page.h @@ -0,0 +1,39 @@ +/* + * @file page.h + * + * Copyright (C) 1998 Eric Valette (valette@crf.canon.fr) + * Canon Centre Recherche France. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef _LIBCPU_i386_PAGE_H +#define _LIBCPU_i386_PAGE_H + +#ifndef ASM + +#include <rtems/score/cpu.h> + +/* C declaration for paging management */ + +extern int _CPU_is_cache_enabled(void); +extern int _CPU_is_paging_enabled(void); +extern int init_paging(void); +extern void _CPU_enable_paging(void); +extern void _CPU_disable_paging(void); +extern void _CPU_disable_cache(void); +extern void _CPU_enable_cache(void); +extern int _CPU_map_phys_address + (void **mappedAddress, void *physAddress, + int size, int flag); +extern int _CPU_unmap_virt_address (void *mappedAddress, int size); +extern int _CPU_change_memory_mapping_attribute + (void **newAddress, void *mappedAddress, + unsigned int size, unsigned int flag); +extern int _CPU_display_memory_attribute(void); + +# endif /* ASM */ + +#endif diff --git a/bsps/i386/include/uart.h b/bsps/i386/include/uart.h new file mode 100644 index 0000000000..96e4a312b4 --- /dev/null +++ b/bsps/i386/include/uart.h @@ -0,0 +1,191 @@ +/** + * @file + * @ingroup i386_uart + * @brief i386 UART definitions + */ + +/* + * This software is Copyright (C) 1998 by T.sqware - all rights limited + * It is provided in to the public domain "as is", can be freely modified + * as far as this copyight notice is kept unchanged, but does not imply + * an endorsement by T.sqware of the product in which it is included. + */ + +/** + * @defgroup i386_uart UART + * @ingroup i386_comm + * @brief i386 UART definitions + * @{ + */ + +#ifndef _BSPUART_H +#define _BSPUART_H + +#ifdef __cplusplus +extern "C" { +#endif + +void BSP_uart_init(int uart, unsigned long baud, unsigned long databits, unsigned long parity, unsigned long stopbits, int hwFlow); +void BSP_uart_set_attributes(int uart, unsigned long baud, unsigned long databits, unsigned long parity, unsigned long stopbits); +void BSP_uart_set_baud(int uart, unsigned long baud); +void BSP_uart_intr_ctrl(int uart, int cmd); +void BSP_uart_throttle(int uart); +void BSP_uart_unthrottle(int uart); +int BSP_uart_polled_status(int uart); +void BSP_uart_polled_write(int uart, int val); +int BSP_uart_polled_read(int uart); +void BSP_uart_termios_set(int uart, void *ttyp); +int BSP_uart_termios_read_com1(int uart); +int BSP_uart_termios_read_com2(int uart); +ssize_t BSP_uart_termios_write_com1(int minor, const char *buf, size_t len); +ssize_t BSP_uart_termios_write_com2(int minor, const char *buf, size_t len); +void BSP_uart_termios_isr_com1(void *); +void BSP_uart_termios_isr_com2(void *); +void BSP_uart_dbgisr_com1(void); +void BSP_uart_dbgisr_com2(void); +extern int BSP_poll_char_via_serial(void); +extern void BSP_output_char_via_serial(char val); +extern int BSPConsolePort; +extern int BSPBaseBaud; + +/** @brief + * Command values for BSP_uart_intr_ctrl(), + * values are strange in order to catch errors + * with assert + */ +#define BSP_UART_INTR_CTRL_DISABLE (0) +#define BSP_UART_INTR_CTRL_GDB (0xaa) ///< RX only +#define BSP_UART_INTR_CTRL_ENABLE (0xbb) ///< Normal operations +#define BSP_UART_INTR_CTRL_TERMIOS (0xcc) ///< RX & line status + +/** @brief Return values for uart_polled_status() */ +#define BSP_UART_STATUS_ERROR (-1) ///< No character +#define BSP_UART_STATUS_NOCHAR (0) ///< No character +#define BSP_UART_STATUS_CHAR (1) ///< Character present +#define BSP_UART_STATUS_BREAK (2) ///< Break point is detected + +/** @brief PC UART definitions */ +#define BSP_UART_COM1 (0) +#define BSP_UART_COM2 (1) + +/** @brief + * Base IO for UART + */ + +#define COM1_BASE_IO 0x3F8 +#define COM2_BASE_IO 0x2F8 + +/** @brief + * Offsets from base + */ + +/** @brief DLAB 0 */ +#define RBR (0) ///< Rx Buffer Register (read) +#define THR (0) ///< Tx Buffer Register (write) +#define IER (1) ///< Interrupt Enable Register + +/** @brief DLAB X */ +#define IIR (2) ///< Interrupt Ident Register (read) +#define FCR (2) ///< FIFO Control Register (write) +#define LCR (3) ///< Line Control Register +#define MCR (4) ///< Modem Control Register +#define LSR (5) ///< Line Status Register +#define MSR (6) ///< Modem Status Register +#define SCR (7) ///< Scratch register + +/** @brief DLAB 1 */ +#define DLL (0) ///< Divisor Latch, LSB +#define DLM (1) ///< Divisor Latch, MSB +#define AFR (2) ///< Alternate Function register + +/** @brief + * Interrupt source definition via IIR + */ +#define MODEM_STATUS 0 +#define NO_MORE_INTR 1 +#define TRANSMITTER_HODING_REGISTER_EMPTY 2 +#define RECEIVER_DATA_AVAIL 4 +#define RECEIVER_ERROR 6 +#define CHARACTER_TIMEOUT_INDICATION 12 + +/** @brief + * Bits definition of IER + */ +#define RECEIVE_ENABLE 0x1 +#define TRANSMIT_ENABLE 0x2 +#define RECEIVER_LINE_ST_ENABLE 0x4 +#define MODEM_ENABLE 0x8 +#define INTERRUPT_DISABLE 0x0 + +/** @brief + * Bits definition of the Line Status Register (LSR) + */ +#define DR 0x01 ///< Data Ready +#define OE 0x02 ///< Overrun Error +#define PE 0x04 ///< Parity Error +#define FE 0x08 ///< Framing Error +#define BI 0x10 ///< Break Interrupt +#define THRE 0x20 ///< Transmitter Holding Register Empty +#define TEMT 0x40 ///< Transmitter Empty +#define ERFIFO 0x80 ///< Error receive Fifo + +/** @brief + * Bits definition of the MODEM Control Register (MCR) + */ +#define DTR 0x01 ///< Data Terminal Ready +#define RTS 0x02 ///< Request To Send +#define OUT_1 0x04 ///< Output 1, (reserved on COMPAQ I/O Board) +#define OUT_2 0x08 ///< Output 2, Enable Asynchronous Port Interrupts +#define LB 0x10 ///< Enable Internal Loop Back + +/** @brief + * Bits definition of the Line Control Register (LCR) + */ +#define CHR_5_BITS 0 +#define CHR_6_BITS 1 +#define CHR_7_BITS 2 +#define CHR_8_BITS 3 + +#define WL 0x03 ///< Word length mask +#define STB 0x04 ///< 1 Stop Bit, otherwise 2 Stop Bits +#define PEN 0x08 ///< Parity Enabled +#define EPS 0x10 ///< Even Parity Select, otherwise Odd +#define SP 0x20 ///< Stick Parity +#define BCB 0x40 ///< Break Control Bit +#define DLAB 0x80 ///< Enable Divisor Latch Access + +/** @brief + * Bits definition of the MODEM Status Register (MSR) + */ +#define DCTS 0x01 ///< Delta Clear To Send +#define DDSR 0x02 ///< Delta Data Set Ready +#define TERI 0x04 ///< Trailing Edge Ring Indicator +#define DDCD 0x08 ///< Delta Carrier Detect Indicator +#define CTS 0x10 ///< Clear To Send (when loop back is active) +#define DSR 0x20 ///< Data Set Ready (when loop back is active) +#define RI 0x40 ///< Ring Indicator (when loop back is active) +#define DCD 0x80 ///< Data Carrier Detect (when loop back is active) + +/** @brief + * Bits definition of the FIFO Control Register : WD16C552 or NS16550 + */ + +#define FIFO_CTRL 0x01 ///< Set to 1 permit access to other bits +#define FIFO_EN 0x01 ///< Enable the FIFO +#define XMIT_RESET 0x02 ///< Transmit FIFO Reset +#define RCV_RESET 0x04 ///< Receive FIFO Reset +#define FCR3 0x08 ///< do not understand manual! + +#define RECEIVE_FIFO_TRIGGER1 0x0 ///< trigger recieve interrupt after 1 byte +#define RECEIVE_FIFO_TRIGGER4 0x40 ///< trigger recieve interrupt after 4 byte +#define RECEIVE_FIFO_TRIGGER8 0x80 ///< trigger recieve interrupt after 8 byte +#define RECEIVE_FIFO_TRIGGER12 0xc0 ///< trigger recieve interrupt after 12 byte +#define TRIG_LEVEL 0xc0 ///< Mask for the trigger level + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* _BSPUART_H */ diff --git a/bsps/i386/pc386/headers.am b/bsps/i386/pc386/headers.am new file mode 100644 index 0000000000..0109c11eed --- /dev/null +++ b/bsps/i386/pc386/headers.am @@ -0,0 +1,25 @@ +## This file was generated by "./boostrap -H". + +include_HEADERS = +include_HEADERS += ../../../../../../bsps/i386/pc386/include/bsp.h +include_HEADERS += include/bspopts.h +include_HEADERS += ../../../../../../bsps/i386/pc386/include/crt.h +include_HEADERS += ../../../../../../bsps/i386/pc386/include/edid.h +include_HEADERS += ../../../../../../bsps/i386/pc386/include/tm27.h + +include_bspdir = $(includedir)/bsp +include_bsp_HEADERS = +include_bsp_HEADERS += ../../../../../../bsps/i386/pc386/include/bsp/bspimpl.h +include_bsp_HEADERS += ../../../../../../bsps/i386/pc386/include/bsp/exar17d15x.h +include_bsp_HEADERS += ../../../../../../bsps/i386/pc386/include/bsp/fb_default_mode.h +include_bsp_HEADERS += ../../../../../../bsps/i386/pc386/include/bsp/fb_vesa.h +include_bsp_HEADERS += ../../../../../../bsps/i386/pc386/include/bsp/rtd316.h +include_bsp_HEADERS += ../../../../../../bsps/i386/pc386/include/bsp/tblsizes.h +include_bsp_HEADERS += ../../../../../../bsps/i386/pc386/include/bsp/vbe3.h + +include_rtemsdir = $(includedir)/rtems +include_rtems_HEADERS = +include_rtems_HEADERS += ../../../../../../bsps/i386/pc386/include/rtems/kd.h +include_rtems_HEADERS += ../../../../../../bsps/i386/pc386/include/rtems/keyboard.h +include_rtems_HEADERS += ../../../../../../bsps/i386/pc386/include/rtems/ps2_drv.h +include_rtems_HEADERS += ../../../../../../bsps/i386/pc386/include/rtems/vgacons.h diff --git a/bsps/i386/pc386/include/bsp.h b/bsps/i386/pc386/include/bsp.h new file mode 100644 index 0000000000..4ff89527b2 --- /dev/null +++ b/bsps/i386/pc386/include/bsp.h @@ -0,0 +1,264 @@ +/** + * @file + * + * @ingroup i386_pc386 + * + * @brief Global BSP definitions. + */ + +/*-------------------------------------------------------------------------+ +| bsp.h v1.1 - PC386 BSP - 1997/08/07 ++--------------------------------------------------------------------------+ +| This include file contains definitions related to the PC386 BSP. ++--------------------------------------------------------------------------+ +| (C) Copyright 1997 - +| - NavIST Group - Real-Time Distributed Systems and Industrial Automation +| +| http://pandora.ist.utl.pt +| +| Instituto Superior Tecnico * Lisboa * PORTUGAL ++--------------------------------------------------------------------------+ +| Modified by Eric Valette the 20/05/98 in order to add definitions used +| to enhance video putchar capabilities. +| +| Copyright (C) 1998 valette@crf.canon.fr +| +| Canon Centre Recherche France. +| ++--------------------------------------------------------------------------+ +| Disclaimer: +| +| This file is provided "AS IS" without warranty of any kind, either +| expressed or implied. ++--------------------------------------------------------------------------+ +| This code is based on: +| bsp.h,v 1.5 1995/12/19 20:07:30 joel Exp - go32 BSP +| With the following copyright notice: +| ************************************************************************** +| * COPYRIGHT (c) 1989-1999. +| * On-Line Applications Research Corporation (OAR). +| * +| * The license and distribution terms for this file may be +| * found in the file LICENSE in this distribution or at +| * http://www.rtems.org/license/LICENSE. +| ************************************************************************** ++--------------------------------------------------------------------------*/ + +#ifndef LIBBSP_I386_PC386_BSP_H +#define LIBBSP_I386_PC386_BSP_H + +#ifndef ASM + +#include <bspopts.h> +#include <bsp/default-initial-extension.h> +#include <bsp/tblsizes.h> + +#include <rtems.h> +#include <rtems/score/cpu.h> +#include <rtems/bspIo.h> + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @degroup pc386_i386 PC386 Support + * + * @ingroup bsp_i386 + * + * @brief PC386 support. + */ + +#define BSP_HAS_FRAME_BUFFER 1 + +/* + * Network driver configuration + */ +struct rtems_bsdnet_ifconfig; + +/* app. may provide a routine (called _very_ early) to tell us + * which ports to use for printk / console. BSP provides a default + * implementation (weak alias) which does nothing (use BSP default + * ports). + */ +extern void +BSP_runtime_console_select(int *pPrintkPort, int *pConsolePort); + +extern int rtems_ne_driver_attach(struct rtems_bsdnet_ifconfig *, int); +#define BSP_NE2000_NETWORK_DRIVER_NAME "ne1" +#define BSP_NE2000_NETWORK_DRIVER_ATTACH rtems_ne_driver_attach + +extern int rtems_wd_driver_attach(struct rtems_bsdnet_ifconfig *, int); +#define BSP_WD8003_NETWORK_DRIVER_NAME "wd1" +#define BSP_WD8003_NETWORK_DRIVER_ATTACH rtems_wd_driver_attach + +extern int rtems_dec21140_driver_attach(struct rtems_bsdnet_ifconfig *, int); +#define BSP_DEC21140_NETWORK_DRIVER_NAME "dc1" +#define BSP_DEC21140_NETWORK_DRIVER_ATTACH rtems_dec21140_driver_attach + +extern int rtems_3c509_driver_attach(struct rtems_bsdnet_ifconfig *config); +#define BSP_3C509_NETWORK_DRIVER_NAME "3c1" +#define BSP_3C509_NETWORK_DRIVER_ATTACH rtems_3c509_driver_attach + +#ifndef RTEMS_BSP_NETWORK_DRIVER_NAME +#define RTEMS_BSP_NETWORK_DRIVER_NAME BSP_DEC21140_NETWORK_DRIVER_NAME +#endif + +#ifndef RTEMS_BSP_NETWORK_DRIVER_ATTACH +#define RTEMS_BSP_NETWORK_DRIVER_ATTACH BSP_DEC21140_NETWORK_DRIVER_ATTACH +#endif + +/*-------------------------------------------------------------------------+ +| Constants ++--------------------------------------------------------------------------*/ + +/*-------------------------------------------------------------------------+ +| Constants relating to the 8254 (or 8253) programmable interval timers. ++--------------------------------------------------------------------------*/ +#define IO_TIMER1 0x40 + /* Port address of the control port and timer channels */ +#define TIMER_CNTR0 (IO_TIMER1 + 0) /* timer 0 counter port */ +#define TIMER_CNTR1 (IO_TIMER1 + 1) /* timer 1 counter port */ +#define TIMER_CNTR2 (IO_TIMER1 + 2) /* timer 2 counter port */ +#define TIMER_MODE (IO_TIMER1 + 3) /* timer mode port */ +#define TIMER_SEL0 0x00 /* select counter 0 */ +#define TIMER_SEL1 0x40 /* select counter 1 */ +#define TIMER_SEL2 0x80 /* select counter 2 */ +#define TIMER_INTTC 0x00 /* mode 0, intr on terminal cnt */ +#define TIMER_ONESHOT 0x02 /* mode 1, one shot */ +#define TIMER_RATEGEN 0x04 /* mode 2, rate generator */ +#define TIMER_SQWAVE 0x06 /* mode 3, square wave */ +#define TIMER_SWSTROBE 0x08 /* mode 4, s/w triggered strobe */ +#define TIMER_HWSTROBE 0x0a /* mode 5, h/w triggered strobe */ +#define TIMER_LATCH 0x00 /* latch counter for reading */ +#define TIMER_LSB 0x10 /* r/w counter LSB */ +#define TIMER_MSB 0x20 /* r/w counter MSB */ +#define TIMER_16BIT 0x30 /* r/w counter 16 bits, LSB first */ +#define TIMER_BCD 0x01 /* count in BCD */ +#define TIMER_RD_BACK 0xc0 /* Read Back Command */ + /* READ BACK command layout in the Command Register */ +#define RB_NOT_COUNT 0x40 /* Don't select counter latch */ +#define RB_NOT_STATUS 0x20 /* Don't select status latch */ +#define RB_COUNT_0 0x02 /* Counter 0 latch */ +#define RB_COUNT_1 0x04 /* Counter 1 latch */ +#define RB_COUNT_2 0x08 /* Counter 2 latch */ +#define RB_OUTPUT 0x80 /* Output of the counter is 1 */ + +#define TIMER_TICK 1193182 /* The internal tick rate in ticks per second */ + +#if defined( RTEMS_SMP ) + extern ISR_lock_Control rtems_i386_i8254_access_lock; +#endif + + +/*-------------------------------------------------------------------------+ +| Console Defines +| WARNING: These Values MUST match the order in +| Console_Configuration_Ports ++--------------------------------------------------------------------------*/ +#define BSP_CONSOLE_VGA 0 +#define BSP_CONSOLE_COM1 1 +#define BSP_CONSOLE_COM2 2 + +/*-------------------------------------------------------------------------+ +| Convert microseconds to ticks and ticks to microseconds. ++--------------------------------------------------------------------------*/ +#define US_TO_TICK(us) (((us)*105+44)/88) +#define TICK_TO_US(tk) (((tk)*88+52)/105) + +/*-------------------------------------------------------------------------+ +| External Variables. ++--------------------------------------------------------------------------*/ +extern interrupt_gate_descriptor Interrupt_descriptor_table[IDT_SIZE]; +extern segment_descriptors _Global_descriptor_table [GDT_SIZE]; + +/*-------------------------------------------------------------------------+ +| Function Prototypes. ++--------------------------------------------------------------------------*/ +void _IBMPC_initVideo(void); /* from 'outch.c' */ +void _IBMPC_outch (char); /* from 'outch.c' */ +char _IBMPC_inch (void); /* from 'inch.c' */ +char _IBMPC_inch_sleep (void); /* from 'inch.c' */ +int BSP_wait_polled_input(void); /* from 'inch.c' */ +int rtems_kbpoll( void ); /* from 'inch.c' */ +int getch( void ); /* from 'inch.c' */ +void add_to_queue( unsigned short b ); /* from 'inch.c' */ + +void Wait_X_ms(unsigned int timeToWait); /* from 'timer.c' */ +void Calibrate_loop_1ms(void); /* from 'timer.c' */ + +void rtems_irq_mngt_init(void); /* from 'irq_init.c' */ + +void Clock_driver_install_handler(void); /* from 'ckinit.c' */ +void Clock_driver_support_initialize_hardware(void); /* from 'ckinit.c' */ + +void *bsp_idle_thread( uintptr_t ignored ); +#define BSP_IDLE_TASK_BODY bsp_idle_thread + +void kbd_reset_setup(char *str, int *ints); /* from 'pc_keyb.c' */ +size_t read_aux(char * buffer, size_t count); /* from 'ps2_mouse.c' */ + +bool bsp_get_serial_mouse_device( /* from 'serial_mouse.c' */ + const char **name, + const char **type +); + +void register_leds( /* from 'keyboard.c' */ + int console, + unsigned int led, + unsigned int *addr, + unsigned int mask +); + +/* Definitions for BSPConsolePort */ +#define BSP_CONSOLE_PORT_CONSOLE (-1) +#define BSP_CONSOLE_PORT_COM1 (BSP_UART_COM1) +#define BSP_CONSOLE_PORT_COM2 (BSP_UART_COM2) + +/* + * Command line. + */ +const char* bsp_cmdline(void); +const char* bsp_cmdline_arg(const char* arg); + +#if BSP_ENABLE_IDE +/* + * IDE command line parsing. + */ +void bsp_ide_cmdline_init(void); + +/* + * indicate, that BSP has IDE driver + */ +#define RTEMS_BSP_HAS_IDE_DRIVER +#endif + +/* GDB stub stuff */ +void init_remote_gdb( void ); +void i386_stub_glue_init(int uart); +void i386_stub_glue_init_breakin(void); +int i386_stub_glue_uart(void); +void breakpoint(void); + +#define BSP_MAXIMUM_DEVICES 6 + +/* + * Debug helper methods + */ +typedef __FILE FILE; +uint32_t BSP_irq_count_dump(FILE *f); + +/* + * Prototypes just called from .S files. This lets the .S file include + * bsp.h just to establish the dependency. + */ +void raw_idt_notify(void); +void C_dispatch_isr(int vector); + +#ifdef __cplusplus +} +#endif + +#endif /* !ASM */ + +#endif /* _BSP_H */ diff --git a/bsps/i386/pc386/include/bsp/bspimpl.h b/bsps/i386/pc386/include/bsp/bspimpl.h new file mode 100644 index 0000000000..314fb91eb9 --- /dev/null +++ b/bsps/i386/pc386/include/bsp/bspimpl.h @@ -0,0 +1,47 @@ +/** + * @file + * + * BSP specific helpers + */ + +/* + * COPYRIGHT (c) 2016. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef __BSPIMPL_h +#define __BSPIMPL_h + +#include <rtems/pci.h> + +/* + * PCI Support Methods + */ +const pci_config_access_functions *pci_bios_initialize(void); +const pci_config_access_functions *pci_io_initialize(void); + +/* + * Helper to parse boot command line arguments related to the console driver + */ +void pc386_parse_console_arguments(void); + +/* + * Helper to parse boot command line arguments related to gdb + */ +void pc386_parse_gdb_arguments(void); + +/* + * Dynamically probe for Legacy UARTS + */ +void legacy_uart_probe(void); + +/* + * Dynamically probe for PCI UARTS + */ +void pci_uart_probe(void); + +#endif diff --git a/bsps/i386/pc386/include/bsp/exar17d15x.h b/bsps/i386/pc386/include/bsp/exar17d15x.h new file mode 100644 index 0000000000..9e1194ffec --- /dev/null +++ b/bsps/i386/pc386/include/bsp/exar17d15x.h @@ -0,0 +1,55 @@ +/** + * @file + * + * @ingroup i386_pc386 + * + * @brief Exar Multiport PCI UART interface. + */ + +/* + * COPYRIGHT (c) 1989-2012. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef _BSP_EXAR17D15X__h +#define _BSP_EXAR17D15X__h + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * This macro defines the standard device driver table entry for + * a console device driver. + */ +#define EXAR17D15X_DRIVER_TABLE_ENTRY \ + { exar17d15x_initialize, NULL, NULL, NULL, NULL, NULL } + +/** + * @brief Exar 17D15x Initialization Entry Point + * + * This method initializes the Exar XR17D15x device driver. + * + * @param[in] major is the device driver major number + * @param[in] minor is the device driver minor number + * @param[in] arg is the parameters to this call + * + * @return This method returns RTEMS_SUCCESSFUL when + * the device driver is successfully initialized. + */ +rtems_device_driver exar17d15x_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg +); + +#ifdef __cplusplus +} +#endif + +#endif +/* end of include file */ diff --git a/bsps/i386/pc386/include/bsp/fb_default_mode.h b/bsps/i386/pc386/include/bsp/fb_default_mode.h new file mode 100644 index 0000000000..948ffee5b6 --- /dev/null +++ b/bsps/i386/pc386/include/bsp/fb_default_mode.h @@ -0,0 +1,25 @@ +/** + * @file fb_default_mode.h + * + * @ingroup i386_pc386 + * + * @brief Variable for the definition of the default graphical mode to be + * initialized. + */ + +/* + * @brief Allows to enable initialization of specific framebuffer driver (e.g. + * VESA real mode) from an application by setting the value of this variable + * to non null value in user's module. The value of this variable will be then + * updated when linked with an application's object. + * + * Further the value should point to string in the following format: + * "<resX>x<resY>[-<bpp>]" - e.g. "1024x768-32" + * "auto" - select the graphic mode automatically + * "none" / "off" - do not initialize the driver + * the given parameters are used if applicable. + * + * Command line argument "--video=" has priority over this string if + * it is read/implemented by the driver. + */ +extern const char * const rtems_fb_default_mode; diff --git a/bsps/i386/pc386/include/bsp/fb_vesa.h b/bsps/i386/pc386/include/bsp/fb_vesa.h new file mode 100644 index 0000000000..d8bfd1bcb4 --- /dev/null +++ b/bsps/i386/pc386/include/bsp/fb_vesa.h @@ -0,0 +1,132 @@ +/** + * @file fb_vesa.h + * + * @ingroup i386_pc386 + * + * @brief Headers specific for framebuffer drivers utilizing VESA VBE. + */ + +/* + * Copyright (C) 2014 Jan Doležal (dolezj21@fel.cvut.cz) + * CTU in Prague. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include <bsp/vbe3.h> +#include <edid.h> + +#ifndef _FB_VESA_H +#define _FB_VESA_H + +#ifndef ASM /* ASM */ + +#include <stdint.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + + +/* ----- Prototypes ----- */ + +/** + * @brief Returns information about graphic's controller in the \p info_block + * structure. + * + * @param[out] info_block pointer to the struct to be filled with + * controller information + * @param[in] queried_VBE_Version if >0x200 then video bios is asked to fill in + * parameters which appeared with second version + * of VBE. + * @retval ax register content as defined in VBE RETURN STATUS paragraph + * @retval -1 error calling graphical bios + */ +uint32_t VBE_controller_information ( + VBE_vbe_info_block *info_block, + uint16_t queried_VBE_Version +); + +/** + * @brief Fills structure \p info_block with informations about selected mode in + * \p mode_number variable. + * + * @param[out] info_block pointer to the struct to be filled with + * mode information + * @param[in] mode_number detailes of this mode to be filled + * @retval ax register content as defined in VBE RETURN STATUS paragraph + * @retval -1 error calling graphical bios + */ +uint32_t VBE_mode_information ( + VBE_mode_info_block *info_block, + uint16_t mode_number +); + +/** + * @brief Sets graphics mode selected. If mode has refreshRateCtrl bit set, than + * the \p info_block must be filled accordingly. + * + * @param[in] mode_number number of mode to be set + * @param[in] info_block pointer to struct containing refresh rate control info + * @retval ax register content as defined in VBE RETURN STATUS paragraph + * @retval -1 error calling graphical bios + */ +uint32_t VBE_set_mode ( + uint16_t mode_number, + VBE_CRTC_info_block *info_block +); + +/** + * @brief Get currently set mode number. + * + * @param[out] mode_number variable to be filled with current mode number + * @retval ax register content as defined in VBE RETURN STATUS paragraph + * @retval -1 error calling graphical bios + */ +uint32_t VBE_current_mode ( + uint16_t *mode_number +); + +/** + * @brief Gets information about display data channel implemented in the + * graphic's controller. + * + * @param[in] controller_unit_number + * @param[out] seconds_to_transfer_EDID_block approximate time to transfer one + * EDID block rounded up to seconds + * @param[out] DDC_level_supported contains DDC version supported and + * screen blanking state during transfer + * @retval ax register content as defined in VBE RETURN STATUS paragraph + * @retval -1 error calling graphical bios + */ +uint32_t VBE_report_DDC_capabilities ( + uint16_t controller_unit_number, + uint8_t *seconds_to_transfer_EDID_block, + uint8_t *DDC_level_supported +); + +/** + * @brief Reads selected EDID block from display attached to controller's + * interface. + * + * @param[in] controller_unit_number + * @param[in] EDID_block_number block no. to be read from the display + * @param[out] buffer place to store block fetched from the display + * @retval ax register content as defined in VBE RETURN STATUS paragraph + * @retval -1 error calling graphical bios + */ +uint32_t VBE_read_EDID ( + uint16_t controller_unit_number, + uint16_t EDID_block_number, + EDID_edid1 *buffer +); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* ASM */ + +#endif /* _FB_VESA_H */ diff --git a/bsps/i386/pc386/include/bsp/rtd316.h b/bsps/i386/pc386/include/bsp/rtd316.h new file mode 100644 index 0000000000..aabad2c263 --- /dev/null +++ b/bsps/i386/pc386/include/bsp/rtd316.h @@ -0,0 +1,77 @@ +/** + * @file + * + * @ingroup i386_pc386 + * + * @brief RTD316 driver interface defintions. + */ + +/* + * COPYRIGHT (c) 1989-2014. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef _BSP_RTD_316_h +#define _BSP_RTD_316_h + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * This macro defines the standard device driver table entry for + * a console device driver. + */ +#define RTD316_DRIVER_TABLE_ENTRY \ + { rtd316_initialize, NULL, NULL, NULL, NULL, NULL } + +/** + * @brief RTD316 Initialization Entry Point + * + * This method initializes the RTD316 device driver. + * + * @param[in] major is the device driver major number + * @param[in] minor is the device driver minor number + * @param[in] arg is the parameters to this call + * + * @return This method returns RTEMS_SUCCESSFUL when + * the device driver is successfully initialized. + */ +rtems_device_driver rtd316_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg +); + +/** + * @brief RTD316 Obtain Register Helper + * + * This method is used to read registers on the RTD316. + * + * @param[in] addr is the base address + * @param[in] reg is the register number + * + * @return This method returns the value of the register. + */ +uint8_t rtd316_com_get_register(uint32_t addr, uint8_t reg); + +/** + * @brief RTD316 Set Register Helper + * + * This method is used to set registers on the RTD316. + * + * @param[in] addr is the base address + * @param[in] reg is the register number + */ +void rtd316_com_set_register(uint32_t addr,uint8_t reg, uint8_t val); + +#ifdef __cplusplus +} +#endif + +#endif +/* end of include file */ diff --git a/bsps/i386/pc386/include/bsp/tblsizes.h b/bsps/i386/pc386/include/bsp/tblsizes.h new file mode 100644 index 0000000000..cea8619c8f --- /dev/null +++ b/bsps/i386/pc386/include/bsp/tblsizes.h @@ -0,0 +1,24 @@ +/** + * @file + * + * @ingroup i386_pc386 + * + * @brief Sizes of Global and Interrupt descriptor tables. + */ + +/* + * This header file is also used in assembler modules. + * + * Copyright (C) 2014 Jan Doležal (dolezj21@fel.cvut.cz) + * CTU in Prague. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include <bspopts.h> + +#define IDT_SIZE (256) +#define NUM_SYSTEM_GDT_DESCRIPTORS 4 +#define GDT_SIZE (NUM_SYSTEM_GDT_DESCRIPTORS + NUM_APP_DRV_GDT_DESCRIPTORS) diff --git a/bsps/i386/pc386/include/bsp/vbe3.h b/bsps/i386/pc386/include/bsp/vbe3.h new file mode 100644 index 0000000000..b62ab6f3ac --- /dev/null +++ b/bsps/i386/pc386/include/bsp/vbe3.h @@ -0,0 +1,619 @@ +/** + * @file vbe3.h + * + * @ingroup i386_pc386 + * + * @brief VESA Bios Extension definitions. + * + * This file contains definitions for constants related to VBE. + * More information can be found at + * <http://www.vesa.org/vesa-standards/free-standards/>. + * VESA public standards may be found at + * <http://www.vesa.org/wp-content/uploads/2010/12/thankspublic.htm>. + */ + +/* + * Copyright (C) 2014 Jan Doležal (dolezj21@fel.cvut.cz) + * CTU in Prague. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef _VBE_H +#define _VBE_H + +#ifndef ASM /* ASM */ + +#include <stdint.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#include <rtems/score/basedefs.h> + +/* VESA BIOS EXTENSION (VBE) Core functions Standard + Version: 3.0 Date: September 16, 1998 */ + +/** AL == 4Fh: Function is supported \n + * AL != 4Fh: Function is not supported */ +#define VBE_functionSupported 0x4F +/** AH == 00h: Function call successful */ +#define VBE_callSuccessful 0x00 +/** AH == 01h: Function call failed */ +#define VBE_callFailed 0x01 +/** AH == 02h: Function is not supported in the current hardware configuration*/ +#define VBE_notSupportedInCurHWConf 0x02 +/** AH == 03h: Function call invalid in current video mode */ +#define VBE_callInvalid 0x03 + +/* VBE Mode Numbers */ +/** D0-D8 = Mode number */ +#define VBE_modeNumberMask 0x01FF +#define VBE_modeNumberShift 0x00 +/** If D8 == 0, this is not a VESA defined VBE mode \n + If D8 == 1, this is a VESA defined VBE mode */ +#define VBE_VESAmodeMask 0x0100 +#define VBE_VESAmodeShift 0x08 +/* D9-D10 = Reserved by VESA for future expansion (= 0) */ +/** If D11 == 0, Use current BIOS default refresh rate \n + If D11 == 1, Use user specified CRTC values for refresh rate */ +#define VBE_refreshRateCtrlMask 0x0800 +#define VBE_refreshRateCtrlShift 0x0B +/* D12-13 = Reserved for VBE/AF (must be 0) */ +/** If D14 == 0, Use Banked/Windowed Frame Buffer \n + If D14 == 1, Use Linear/Flat Frame Buffer */ +#define VBE_linearFlatFrameBufMask 0x4000 +#define VBE_linearFlatFrameBufShift 0x0E +/** If D15 == 0, Clear display memory \n + If D15 == 1, Preserve display memory */ +#define VBE_preserveDispMemMask 0x8000 +#define VBE_preserveDispMemShift 0x0F + +/* Graphics modes */ +/** 15-bit mode, Resolution: 640x400, Colors: 256 */ +#define VBE_R640x400C256 0x100 +/** 15-bit mode, Resolution: 640x480, Colors: 256 */ +#define VBE_R640x480C256 0x101 +/** 15-bit mode, Resolution: 800x600, Colors: 16 */ +#define VBE_R800x600C16 0x102 +/** 7-bit mode, Resolution: 800x600, Colors: 16 */ +#define VBE_b7R800x600C16 0x6A +/** 15-bit mode, Resolution: 800x600, Colors: 256 */ +#define VBE_R800x600C256 0x103 +/** 15-bit mode, Resolution: 1024x768, Colors: 16 */ +#define VBE_R1024x768C16 0x104 +/** 15-bit mode, Resolution: 1024x768, Colors: 256 */ +#define VBE_R1024x768C256 0x105 +/** 15-bit mode, Resolution: 1280x1024, Colors: 16 */ +#define VBE_R1280x1024C16 0x106 +/** 15-bit mode, Resolution: 1280x1024, Colors: 256 */ +#define VBE_R1280x1024C256 0x107 +/** 15-bit mode, Resolution: 320x200, Colors: 32K (1:5:5:5) */ +#define VBE_R320x200C32K 0x10D +/** 15-bit mode, Resolution: 320x200, Colors: 64K (5:6:5) */ +#define VBE_R320x200C64K 0x10E +/** 15-bit mode, Resolution: 320x200, Colors: 16.8M (8:8:8) */ +#define VBE_R320x200C17M 0x10F +/** 15-bit mode, Resolution: 640x480, Colors: 32K (1:5:5:5) */ +#define VBE_R640x480C32K 0x110 +/** 15-bit mode, Resolution: 640x480, Colors: 64K (5:6:5) */ +#define VBE_R640x480C64K 0x111 +/** 15-bit mode, Resolution: 640x480, Colors: 16.8M (8:8:8) */ +#define VBE_R640x480C17M 0x112 +/** 15-bit mode, Resolution: 800x600, Colors: 32K (1:5:5:5) */ +#define VBE_R800x600C32K 0x113 +/** 15-bit mode, Resolution: 800x600, Colors: 64K (5:6:5) */ +#define VBE_R800x600C64K 0x114 +/** 15-bit mode, Resolution: 800x600, Colors: 16.8M (8:8:8) */ +#define VBE_R800x600C17M 0x115 +/** 15-bit mode, Resolution: 1024x768, Colors: 32K (1:5:5:5) */ +#define VBE_R1024x768C32K 0x116 +/** 15-bit mode, Resolution: 1024x768, Colors: 64K (5:6:5) */ +#define VBE_R1024x768C64K 0x117 +/** 15-bit mode, Resolution: 1024x768, Colors: 16.8M (8:8:8) */ +#define VBE_R1024x768C17M 0x118 +/** 15-bit mode, Resolution: 1280x1024, Colors: 32K (1:5:5:5) */ +#define VBE_R1280x1024C32K 0x119 +/** 15-bit mode, Resolution: 1280x1024, Colors: 64K (5:6:5) */ +#define VBE_R1280x1024C64K 0x11A +/** 15-bit mode, Resolution: 1280x1024, Colors: 16.8M (8:8:8) */ +#define VBE_R1280x1024C17M 0x11B +#define VBE_SpecialMode 0x81FF + +/* Text modes */ +#define VBE_C80R60 0x108 /**< 15-bit mode, Columns: 80, Rows: 60 */ +#define VBE_C132R25 0x109 /**< 15-bit mode, Columns: 132, Rows: 25 */ +#define VBE_C132R43 0x10A /**< 15-bit mode, Columns: 132, Rows: 43 */ +#define VBE_C132R50 0x10B /**< 15-bit mode, Columns: 132, Rows: 50 */ +#define VBE_C132R60 0x10C /**< 15-bit mode, Columns: 132, Rows: 60 */ + +/* VBE function numbers - passed in AX register */ +/** VBE function - Return VBE Controller Information */ +#define VBE_RetVBEConInf 0x4F00 +/** VBE function - Return VBE Mode Information */ +#define VBE_RetVBEModInf 0x4F01 +/** VBE function - Set VBE Mode */ +#define VBE_SetVBEMod 0x4F02 +/** VBE function - Return Current VBE Mode */ +#define VBE_RetCurVBEMod 0x4F03 +/** VBE function - Save/Restore State */ +#define VBE_SavResSta 0x4F04 +/** VBE function - Display Window Control */ +#define VBE_DisWinCon 0x4F05 +/** VBE function - Set/Get Logical Scan Line Length */ +#define VBE_SetGetLogScaLinLen 0x4F06 +/** VBE function - Set/Get Display Start */ +#define VBE_SetGetDisSta 0x4F07 +/** VBE function - Set/Get DAC Palette Format */ +#define VBE_SetGetDACPalFor 0x4F08 +/** VBE function - Set/Get Palette Data */ +#define VBE_SetGetPalDat 0x4F09 +/** VBE function - Return VBE Protected Mode Interface */ +#define VBE_RetVBEProModInt 0x4F0A +/** VBE function - Get/Set pixel clock */ +#define VBE_GetSetpixclo 0x4F0B +/** VBE function - Power Management Extensions (PM) */ +#define VBE_PowManExt 0x4F10 +/** VBE function - Flat Panel Interface Extensions (FP) */ +#define VBE_FlaPanIntExt 0x4F11 +/** VBE function - Audio Interface Extensions (AI) */ +#define VBE_AudIntExt 0x4F13 +/** VBE function - OEM Extensions */ +#define VBE_OEMExt 0x4F14 +/** VBE function - Display Data Channel (DDC), Serial Control Interface (SCI) */ +#define VBE_DisDatCha 0x4F15 + +/* VBE subfunction numbers - passed in BL register */ +#define VBE_RetVBESupSpeInf 0x00 /**< Return VBE Supplemental + * Specification Information */ +/* *** Structures *** */ +/** + * @brief Far pointer as defined by VBE standard. + */ +typedef struct { + /** @brief Offset to segment described by \a selector. */ + uint16_t offset; + /** @brief Selector or Segment depending on whether this is used from 16bit + protected mode or from real mode. */ + uint16_t selector; +} RTEMS_PACKED VBE_far_pointer; + +/** + * @brief Protected mode info block as defined by VBE standard. + */ +typedef struct { + /** PM Info Block Signature */ + uint8_t Signature[4]; + /** Offset of PM entry point within BIOS */ + uint16_t EntryPoint; + /** Offset of PM initialization entry point */ + uint16_t PMInitialize; + /** Selector to BIOS data area emulation block */ + uint16_t BIOSDataSel; + /** Selector to access A0000h physical memmory */ + uint16_t A0000Sel; + /** Selector to access B0000h physical memmory */ + uint16_t B0000Sel; + /** Selector to access B8000h physical memmory */ + uint16_t B8000Sel; + /** Selector to access code segment as data */ + uint16_t CodeSegSel; + /** Set to 1 when in protected mode */ + uint8_t InProtectMode; + /** Checksum byte for structure. Sum over all structure bytes gives 0. */ + uint8_t Checksum; +} RTEMS_PACKED VBE_protected_mode_info_block; + +/** General VBE signature */ +#define VBE_SIGNATURE "VESA" +/** Signature for VBE 2.0 and higher */ +#define VBE20plus_SIGNATURE "VBE2" +/** for STUB see VBE CORE FUNCTIONS VERSION 3.0 - Appendix 1 */ +#define VBE_STUB_VideoModeList 0xFFFF +#define VBE_END_OF_VideoModeList 0xFFFF +/** + * @brief Information about VBE implementation. + */ +typedef struct { + /** VBE Signature */ + uint8_t VbeSignature[4]; + /** VBE Version */ + uint16_t VbeVersion; + /** VBE_far_pointer to OEM String */ + uint8_t *OemStringPtr; + /** Capabilities of graphics controller */ + uint8_t Capabilities[4]; + /** VBE_far_pointer to VideoModeList */ + uint32_t *VideoModePtr; + /** Number of 64kb memory blocks */ + uint16_t TotalMemory; + /* Added for VBE 2.0+ */ + /** VBE implementation Software revision */ + uint16_t OemSoftwareRev; + /** VBE_far_pointer to Vendor Name String */ + uint8_t *OemVendorNamePtr; + /** VBE_far_pointer to Product Name String */ + uint8_t *OemProductNamePtr; + /** VBE_far_pointer to Product Revision String */ + uint8_t *OemProductRevPtr; + /** Reserved for VBE implementation scratch */ + uint8_t Reserved[222]; + /** Data Area for OEM Strings */ + uint8_t OemData[256]; +} RTEMS_PACKED VBE_vbe_info_block; + +/** + * @brief Describes graphic's mode parameter. + */ +typedef struct { + /* Mandatory information for all VBE revisions */ + /** mode attributes */ + uint16_t ModeAttributes; + /** window A attributes */ + uint8_t WinAAttributes; + /** window B attributes */ + uint8_t WinBAttributes; + /** window granularity */ + uint16_t WinGranularity; + /** window size */ + uint16_t WinSize; + /** window A start segment */ + uint16_t WinASegment; + /** window B start segment */ + uint16_t WinBSegment; + /** real mode pointer to window function */ + uint32_t *WinFuncPtr; + /** bytes per scan line */ + uint16_t BytesPerScanLine; + /* Mandatory information for VBE 1.2 and above */ + /** horizontal resolution in px or chars */ + uint16_t XResolution; + /** vertical resolution in px or chars */ + uint16_t YResolution; + /** character cell width in pixels */ + uint8_t XCharSize; + /** character cell height in pixels */ + uint8_t YCharSize; + /** number of memory planes */ + uint8_t NumberOfPlanes; + /** bits per pixel */ + uint8_t BitsPerPixel; + /** number of banks */ + uint8_t NumberOfBanks; + /** memory model type */ + uint8_t MemoryModel; + /** bank size in KB */ + uint8_t BankSize; + /** number of images */ + uint8_t NumberOfImagePages; + /** reserved for page function */ + uint8_t Reserved0; + /* Direct Color fields (required for direct/6 and YUV/7 memory models) */ + /** size of direct color red mask in bits */ + uint8_t RedMaskSize; + /** bit position of lsb of red mask */ + uint8_t RedFieldPosition; + /** size of direct color green mask in b */ + uint8_t GreenMaskSize; + /** bit position of lsb of green mask */ + uint8_t GreenFieldPosition; + /** size of direct color blue mask in b */ + uint8_t BlueMaskSize; + /** bit position of lsb of blue mask */ + uint8_t BlueFieldPosition; + /** size of direct color reserved mask */ + uint8_t RsvdMaskSize; + /** bit position of lsb of reserved mask */ + uint8_t RsvdFieldPosition; + /** direct color mode attributes */ + uint8_t DirectColorModeInfo; + /* Mandatory information for VBE 2.0 and above */ + /** physical address for flat memory frame buffer */ + uint32_t *PhysBasePtr; + /** Reserved - always set to 0 */ + uint32_t Reserved1; + /** Reserved - always set to 0 */ + uint16_t Reserved2; + /* Mandatory information for VBE 3.0 and above */ + /** bytes per scan line for linear modes */ + uint16_t LinBytesPerScanLine; + /** number of images for banked modes */ + uint8_t BnkNumberOfImagePages; + /** number of images for linear modes */ + uint8_t LinNumberOfImagePages; + /* linear modes */ + /** size of direct color red mask */ + uint8_t LinRedMaskSize; + /** bit position of lsb of red mask */ + uint8_t LinRedFieldPosition; + /** size of direct color green mask */ + uint8_t LinGreenMaskSize; + /** bit position of lsb of green mask */ + uint8_t LinGreenFieldPosition; + /** size of direct color blue mask */ + uint8_t LinBlueMaskSize; + /** bit position of lsb of blue mask */ + uint8_t LinBlueFieldPosition; + /** size of direct color reserved mask */ + uint8_t LinRsvdMaskSize; + /** bit position of lsb of reserved mask */ + uint8_t LinRsvdFieldPosition; + /** maximum pixel clock (in Hz) for graphics mode */ + uint32_t MaxPixelClock; + /** remainder of VBE_mode_info_block */ + uint8_t Reserved3[189]; +} RTEMS_PACKED VBE_mode_info_block; + +/** + * @brief Describes monitor synchronization. + */ +typedef struct { + /** Horizontal total in pixels */ + uint16_t HorizontalTotal; + /** Horizontal sync start in pixels */ + uint16_t HorizontalSyncStart; + /** Horizontal sync end in pixels */ + uint16_t HorizontalSyncEnd; + /** Vertical total in lines */ + uint16_t VerticalTotal; + /** Vertical sync start in lines */ + uint16_t VerticalSyncStart; + /** Vertical sync end in lines */ + uint16_t VerticalSyncEnd; + /** Flags (Interlaced, Double Scan etc) */ + uint8_t Flags; + /** Pixel clock in units of Hz */ + uint32_t PixelClock; + /** Refresh rate in units of 0.01 Hz */ + uint16_t RefreshRate; + /** remainder of VBE_mode_info_block */ + uint8_t Reserved[40]; +} RTEMS_PACKED VBE_CRTC_info_block; + +/** + * @brief Describes palette entry. + */ +typedef struct { + /** Blue channel value (6 or 8 bits) */ + uint8_t Blue; + /** Green channel value (6 or 8 bits) */ + uint8_t Green; + /** Red channel value(6 or 8 bits) */ + uint8_t Red; + /** DWORD alignment byte (unused) */ + uint8_t Alignment; +} RTEMS_PACKED VBE_palette_entry; + +/** + * @brief Supplemental VBE info block. + */ +typedef struct { + /** Supplemental VBE Signature */ + uint8_t SupVbeSignature[7]; + /** Supplemental VBE Version */ + uint16_t SupVbeVersion; + /** Bitfield of supported subfunctions */ + uint8_t SupVbeSubFunc[8]; + /** OEM Software revision */ + uint16_t OemSoftwareRev; + /** VBE_far_pointer to Vendor Name String */ + uint8_t *OemVendorNamePtr; + /** VBE_far_pointer to Product Name String */ + uint8_t *OemProductNamePtr; + /** VBE_far_pointer to Product Revision String */ + uint8_t *OemProductRevPtr; + /** VBE_far_pointer to OEM String */ + uint8_t *OemStringPtr; + /** Reserved for description strings and future expansion */ + uint8_t Reserved[221]; +} RTEMS_PACKED VBE_supplemental_vbe_info_block; + +/* VBE_vbe_info_block Capabilities */ +/** VBE Info Block - Capabilities\n + D0 = 0 DAC is fixed width, with 6 bits per primary color \n + D0 = 1 DAC width is switchable to 8 bits per primary color */ +#define VBE_DACswitchableMask 0x0001 +/** VBE Info Block - Capabilities\n + D1 = 0 Controller is VGA compatible \n + D1 = 1 Controller is not VGA compatible */ +#define VBE_notVGAcompatibleMask 0x0002 +/** VBE Info Block - Capabilities\n + D2 = 0 Normal RAMDAC operation \n + D2 = 1 When programming large blocks of information to the RAMDAC, + use the blank bit in Function 09h. */ +#define VBE_specialRAMDACopMask 0x0004 +/** VBE Info Block - Capabilities\n + D3 = 0 No hardware stereoscopic signaling support \n + D3 = 1 Hardware stereoscopic signaling supported by controller */ +#define VBE_hwStereoscopicMask 0x0008 +/** VBE Info Block - Capabilities\n + D4 = 0 Stereo signaling supported via external VESA stereo connector \n + D4 = 1 Stereo signaling supported via VESA EVC connector */ +#define VBE_supportEVCconnMask 0x0010 +/* D5-31 = Reserved */ + +/* VBE_mode_info_block ModeAttributes */ +/** Mode Info Block - Mode Attributes\n + D0 = Mode supported by hardware configuration. + 0 = Mode not supported in hardware\n + 1 = Mode supported in hardware */ +#define VBE_modSupInHWMask 0x0001 +/* D1 = 1 (Reserved) */ +/** Mode Info Block - Mode Attributes\n + D2 = TTY Output functions supported by BIOS. + 0 = TTY Output functions not supported by BIOS\n + 1 = TTY Output functions supported by BIOS */ +#define VBE_TTYOutSupByBIOSMask 0x0004 +/** Mode Info Block - Mode Attributes\n + D3 = Monochrome/color mode (see note below). + 0 = Monochrome mode\n + 1 = Color mode */ +#define VBE_ColorModeMask 0x0008 +/** Mode Info Block - Mode Attributes\n + D4 = Mode type. + 0 = Text mode\n + 1 = Graphics mode */ +#define VBE_GraphicsModeMask 0x0010 +/** Mode Info Block - Mode Attributes\n + D5 = VGA compatible mode. + 0 = Yes\n + 1 = No */ +#define VBE_VGACompModeMask 0x0020 +/** Mode Info Block - Mode Attributes\n + D6 = VGA compatible windowed memory mode is available. + 0 = Yes\n + 1 = No */ +#define VBE_VGACompWinMemModeMask 0x0040 +/** Mode Info Block - Mode Attributes\n + D7 = Linear frame buffer mode is available. + 0 = No\n + 1 = Yes */ +#define VBE_LinFraBufModeAvaiMask 0x0080 +/** Mode Info Block - Mode Attributes\n + D8 = Double scan mode is available. + 0 = No\n + 1 = Yes */ +#define VBE_DblScnModeAvaiMask 0x0100 +/** Mode Info Block - Mode Attributes\n + D9 = Interlaced mode is available. + 0 = No\n + 1 = Yes */ +#define VBE_InterlModeAvaiMask 0x0200 +/** Mode Info Block - Mode Attributes\n + D10 = Hardware triple buffering support. + 0 = No\n + 1 = Yes */ +#define VBE_HWTripBufSupMask 0x0400 +/** Mode Info Block - Mode Attributes\n + D11 = Hardware stereoscopic display support. + 0 = No\n + 1 = Yes */ +#define VBE_HWSterDispSupMask 0x0800 +/** Mode Info Block - Mode Attributes\n + D12 = Dual display start address support. + 0 = No\n + 1 = Yes */ +#define VBE_DualDispStAdrSupMask 0x1000 +/* D13-D15 = Reserved */ + +/* VBE_mode_info_block WinXAttributes */ +/** D0 = Relocatable window(s) supported. + 0 = Single non-relocatable window only\n + 1 = Relocatable window(s) are supported */ +#define VBE_RelocWinSupMask 0x01 +/** D1 = Window readable. + 0 = Window is not readable\n + 1 = Window is readable */ +#define VBE_WinReadableMask 0x02 +/** D2 = Window writeable. + 0 = Window is not writeable\n + 1 = Window is writeable */ +#define VBE_WinWritableMask 0x04 +/* D3-D7 = Reserved */ + +/* VBE_mode_info_block MemoryModel */ +#define VBE_TextMode 0x00 +#define VBE_CGAGraphics 0x01 +#define VBE_HerculesGraphics 0x02 +#define VBE_Planar 0x03 +#define VBE_PackedPixel 0x04 +#define VBE_NonChain4Color256 0x05 +#define VBE_DirectColor 0x06 +#define VBE_YUV 0x07 + /* 0x08-0x0F Reserved, to be defined by VESA */ + /* 0x10-0xFF To be defined by OEM */ + +/* VBE_mode_info_block DirectColorModeInfo */ +/** D0 = Color ramp is fixed/programmable. + 0 = Color ramp is fixed\n + 1 = Color ramp is programmable */ +#define VBE_ColRampProgMask 0x01 +/** D1 = Bits in Rsvd field are usable/reserved. + 0 = Bits in Rsvd field are reserved\n + 1 = Bits in Rsvd field are usable by the application */ +#define VBE_RsvdBitsUsableMask 0x02 + +/* VBE_CRTC_info_block Flags */ +/** CRTC Info Block - Flags\n + D0 = Double Scan Mode Enable. + 0 = Graphics mode is not double scanned\n + 1 = Graphics mode is double scanned */ +#define VBE_GrModeDblScanMask 0x01 +/** CRTC Info Block - Flags\n + D1 = Interlaced Mode Enable. + 0 = Graphics mode is non-interlaced\n + 1 = Graphics mode is interlaced */ +#define VBE_GrModeInterlMask 0x02 +/** CRTC Info Block - Flags\n + D2 = Horizontal sync polarity. + 0 = Horizontal sync polarity is positive (+)\n + 1 = Horizontal sync polarity is negative (-) */ +#define VBE_HorSncPolNegMask 0x04 +/** CRTC Info Block - Flags\n + D3 = Vertical sync polarity. + 0 = Vertical sync polarity is positive (+)\n + 1 = Vertical sync polarity is negative (-) */ +#define VBE_VerSncPolNegMask 0x08 + + +/* VESA BIOS Extensions/Display Data Channel Standard + Version: 1.1 November 18, 1999 */ + +/* VBE/DDC subfunction numbers - passed in BL register */ +/** VBE/DDC subfunction - Report VBE/DDC Capabilities */ +#define VBEDDC_Capabilities 0x0 +/** VBE/DDC subfunction - Read EDID */ +#define VBEDDC_ReadEDID 0x1 + +/* DDC Capabilities */ +/* DDC level supported - returned in BL register */ +/** 0 - DDC1 not supported; 1 - DDC1 supported */ +#define VBEDDC_1SupportedMask 0x1 +/** 0 - DDC2 not supported; 1 - DDC2 supported */ +#define VBEDDC_2SupportedMask 0x2 +/** 0 - Screen not blanked during data transfer\n + 1 - Screen blanked during data transfer */ +#define VBEDDC_scrBlnkDatTrMs 0x4 + + +/* VESA BIOS Extensions/Serial Control Interface Standard + Version: 1.0 Revision: 2 Date: July 2, 1997 */ + +/* VBE/SCI subfunction numbers - passed in BL register */ +/** VBE/SCI subfunction - Report VBE/SCI Capabilities */ +#define VBESCI_ReportCapabil 0x10 +/** VBE/SCI subfunction - Begin SCL/SDA control */ +#define VBESCI_BegSCLSDACtrl 0x11 +/** VBE/SCI subfunction - End SCL/SDA control */ +#define VBESCI_EndSCLSDACtrl 0x12 +/** VBE/SCI subfunction - Write SCL clock line */ +#define VBESCI_WrtSCLClkLine 0x13 +/** VBE/SCI subfunction - Write SDA data line */ +#define VBESCI_WrtSDADatLine 0x14 +/** VBE/SCI subfunction - Read SCL clock line */ +#define VBESCI_RdySCLClkLine 0x15 +/** VBE/SCI subfunction - Read SDA data line */ +#define VBESCI_RdySDADatLine 0x16 + +/* SCI Capabilities */ +/* I2C level supported - returned in BL register */ +/** Can write to SCL clock line */ +#define VBESCI_capSCLwrtMask 0x1 +/** Can write to SDA data line */ +#define VBESCI_capSDAwrtMask 0x2 +/** Can read from SCL clock line */ +#define VBESCI_capSCLrdyMask 0x4 +/** Can read from SDA data line */ +#define VBESCI_capSDArdyMask 0x8 + + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* ASM */ + +#endif /* _VBE_H */ diff --git a/bsps/i386/pc386/include/crt.h b/bsps/i386/pc386/include/crt.h new file mode 100644 index 0000000000..ba0534a5aa --- /dev/null +++ b/bsps/i386/pc386/include/crt.h @@ -0,0 +1,94 @@ +/** + * @file + * + * @ingroup i386_pc386 + * + * @brief CRT controller definitions. + */ + +/* + * crt.h - This file contains definitions for constants related to PC console. + * More information can be found at + * <http://millenium.atcg.com/~taco/helppc/tables.html> + * + * Copyright (C) 1998 Eric Valette (valette@crf.canon.fr) + * Canon Centre Recherche France. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef _CRT_H +#define _CRT_H + +/* + * Bitmap video origins in text mode. + */ + + /* In monochrome */ +#define V_MONO 0xb0000 + /* In color */ +#define V_COLOR 0xb8000 + +/* + * Video Option Byte location. It must be maintained + * by the BIOS. + */ +#define VIDEO_MODE_ADDR 0x449 +/* + * Video controller base IO address location in + * BIOS data area + */ +#define DISPLAY_CRT_BASE_IO_ADDR 0x463 +/* + * Number of collums and lines locations for the + * actual video Configuration + */ +#define NB_MAX_COL_ADDR 0x44a +#define NB_MAX_ROW_ADDR 0x484 + + /* + * Miscellaneous information set by the BIOS in offset video_mode, + */ + +# define VGAMODE7 0x7 /* VGA mode 7 */ + + /* Color codes in text mode for background and foreground. */ +#define BLACK 0x0 +#define BLUE 0x1 +#define GREEN 0x2 +#define CYAN 0x3 +#define RED 0x4 +#define MAGENTA 0x5 +#define BROWN 0x6 +#define WHITE 0x7 + +#define GRAY 0x8 +#define LT_BLUE 0x9 +#define LT_GREEN 0xa +#define LT_CYAN 0xb +#define LT_RED 0xc +#define LT_MAGENTA 0xd +#define YELLOW 0xe +#define LT_WHITE 0xf + +#define BLINK 0x8 /* Mask used to determine blinking */ +#define OFF 0 +#define ON 1 + +/* + * CRT Controller register offset definitions + */ + +# define CC_CURSSTART 0x0a /* Cursor start scan line */ +# define CC_CURSEND 0x0b /* Cursor end scan line */ +# define CC_STARTADDRHI 0x0c /* start video ram addr msb */ +# define CC_STARTADDRLO 0x0d /* start video ram lsb */ +# define CC_CURSHIGH 0x0e /* Cursor high location (8 msb) */ +# define CC_CURSLOW 0x0f /* Cursor low location (8 msb) */ +# define CC_VRETSTART 0x10 /* vertical synchro start lsb */ +# define CC_VRETEND 0x11 /* vertical syn end (also it control) */ +# define CC_VDISPEND 0x12 /* vertical display end lsb register */ + +#endif /* _CRT_H */ diff --git a/bsps/i386/pc386/include/edid.h b/bsps/i386/pc386/include/edid.h new file mode 100644 index 0000000000..836294dcad --- /dev/null +++ b/bsps/i386/pc386/include/edid.h @@ -0,0 +1,520 @@ +/** + * @file edid.h + * + * @ingroup i386_pc386 + * + * @brief VESA EDID definitions. + * + * This file contains definitions for constants related to + * VESA Extended Display Identification Data. + * More information can be found at + * <http://www.vesa.org/vesa-standards/free-standards/> + * VESA public standards may be found at + * <http://www.vesa.org/wp-content/uploads/2010/12/thankspublic.htm> + */ + +/* + * Copyright (C) 2014 Jan Doležal (dolezj21@fel.cvut.cz) + * CTU in Prague. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef _EDID_H +#define _EDID_H + +#ifndef ASM /* ASM */ + +#include <stdint.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#include <rtems/score/basedefs.h> +#define EDID_INLINE_ROUTINE RTEMS_INLINE_ROUTINE + +/* VESA Enhanced Extended Display Identification Data (E-EDID) Proposed + Release A, March 27, 2007 */ + +/* *** Detailed Timing Descriptor Flags *** */ +#define EDID1_DTD_Flag_InterlacedOff 7 +#define EDID1_DTD_Flag_InterlacedMask 0x1 +#define EDID1_DTD_Flag_StereoModeOff 0 +#define EDID1_DTD_Flag_StereoModeMask 0xC1 +/* values for stereo flag */ +#define EDID1_DTD_Stereo_FldSeqRightOnSync 0x40 +#define EDID1_DTD_Stereo_FldSeqLeftOnSync 0x80 +#define EDID1_DTD_Stereo_2wItlvdRightOnEven 0x41 +#define EDID1_DTD_Stereo_2wItlvdLeftOnEven 0x81 +#define EDID1_DTD_Stereo_4wInterleaved 0xC0 +#define EDID1_DTD_Stereo_SideBySideItlvd 0xC1 +/* Analog = 0, Digital = 1 */ +#define EDID1_DTD_Flag_DigitalOff 4 +#define EDID1_DTD_Flag_DigitalMask 0x1 +/* Analog */ +#define EDID1_DTD_BipolarAnalogComposSyncOff 3 +#define EDID1_DTD_BipolarAnalogComposSyncMask 0x1 +#define EDID1_DTD_WithSerrationsOff 2 +#define EDID1_DTD_WithSerrationsMask 0x1 +/* Digital */ +#define EDID1_DTD_DigitalSeparateSyncOff 3 +#define EDID1_DTD_DigitalSeparateSyncMask 0x1 + /* when DigitalSeparateSync == 0 -> it is composite + and WithSerrations defined up in Analog part applies */ +#define EDID1_DTD_VerticalSyncIsPositiveOff 2 +#define EDID1_DTD_VerticalSyncIsPositiveMask 0x1 +#define EDID1_DTD_HorizontalSyncIsPositiveOff 1 +#define EDID1_DTD_HorizontalSyncIsPositiveMask 0x1 + +typedef struct { + uint8_t PixelClock_div10000[2]; + uint8_t HorizontalActiveLow; + uint8_t HorizontalBlankingLow; + uint8_t HorizontalBlanking_ActiveHigh; + uint8_t VerticalActiveLow; + uint8_t VerticalBlankingLow; + uint8_t VerticalBlanking_ActiveHigh; + uint8_t HorizontalSyncOffsetLow; + uint8_t HorizontalSyncPulseWidthLow; + uint8_t VerticalSyncPulseWidth_OffsetLow; + uint8_t Vert_Hor_SyncPulseWidth_Offset_High; + uint8_t HorizontalImageSizeLow; + uint8_t VerticalImageSizeLow; + uint8_t Vertical_HorizontalImageSizeHigh; + uint8_t HorizontalBorder; + uint8_t VerticalBorder; + uint8_t Flags; +} RTEMS_PACKED EDID_detailed_timing_descriptor; + +EDID_INLINE_ROUTINE uint16_t DTD_horizontal_active ( + EDID_detailed_timing_descriptor *dtd) +{ + return (dtd->HorizontalActiveLow | + (dtd->HorizontalBlanking_ActiveHigh & 0xF0) << 4); +} + +EDID_INLINE_ROUTINE uint16_t DTD_horizontal_blanking ( + EDID_detailed_timing_descriptor *dtd) +{ + return (dtd->HorizontalBlankingLow | + (dtd->HorizontalBlanking_ActiveHigh & 0xF) << 8); +} + +EDID_INLINE_ROUTINE uint16_t DTD_vertical_active ( + EDID_detailed_timing_descriptor *dtd) +{ + return (dtd->VerticalActiveLow | + (dtd->VerticalBlanking_ActiveHigh & 0xF0) << 4); +} + +EDID_INLINE_ROUTINE uint16_t DTD_vertical_blanking ( + EDID_detailed_timing_descriptor *dtd) +{ + return (dtd->VerticalBlankingLow | + (dtd->VerticalBlanking_ActiveHigh & 0xF) << 8); +} + +EDID_INLINE_ROUTINE uint16_t DTD_vertical_sync_pulse_width ( + EDID_detailed_timing_descriptor *dtd) +{ + return ((dtd->VerticalSyncPulseWidth_OffsetLow & 0xF) | + (dtd->Vert_Hor_SyncPulseWidth_Offset_High & 0x3) << 4); +} + +EDID_INLINE_ROUTINE uint16_t DTD_vertical_sync_offset ( + EDID_detailed_timing_descriptor *dtd) +{ + return ((dtd->VerticalSyncPulseWidth_OffsetLow >> 4) | + (dtd->Vert_Hor_SyncPulseWidth_Offset_High & 0xC) << 2); +} + +EDID_INLINE_ROUTINE uint16_t DTD_horizontal_sync_pulse_width ( + EDID_detailed_timing_descriptor *dtd) +{ + return (dtd->HorizontalSyncPulseWidthLow | + (dtd->Vert_Hor_SyncPulseWidth_Offset_High & 0x30) << 4); +} + +EDID_INLINE_ROUTINE uint16_t DTD_horizontal_sync_offset ( + EDID_detailed_timing_descriptor *dtd) +{ + return (dtd->HorizontalSyncOffsetLow | + (dtd->Vert_Hor_SyncPulseWidth_Offset_High & 0xC0) << 2); +} + +EDID_INLINE_ROUTINE uint16_t DTD_vertical_image_size ( + EDID_detailed_timing_descriptor *dtd) +{ + return (dtd->VerticalImageSizeLow | + (dtd->Vertical_HorizontalImageSizeHigh & 0xF) << 8); +} + +EDID_INLINE_ROUTINE uint16_t DTD_horizontal_image_size ( + EDID_detailed_timing_descriptor *dtd) +{ + return (dtd->HorizontalImageSizeLow | + (dtd->Vertical_HorizontalImageSizeHigh & 0xF0) << 4); +} + +typedef struct { + uint8_t ColorPointWhitePointIndexNumber; + uint8_t ColorPointWhiteLowBits; + uint8_t ColorPointWhite_x; + uint8_t ColorPointWhite_y; + uint8_t ColorPointWhiteGamma; +} RTEMS_PACKED EDID_color_point_data; + +/* Basic Display Parameters */ +/* Monitor Descriptor - Data Type Tag */ +#define EDID_DTT_MonitorSerialNumber 0xFF + +#define EDID_DTT_ASCIIString 0xFE + +#define EDID_DTT_MonitorRangeLimits 0xFD +typedef struct { + uint8_t MinVerticalRateInHz; + uint8_t MaxVerticalRateInHz; + uint8_t MinHorizontalInKHz; + uint8_t MaxHorizontalInKHz; + uint8_t MaxSupportedPixelClockIn10MHz; +/* see VESA, Generalized Timing Formula Standard - GTF + Version 1.0, December 18, 1996 */ + uint8_t GTFStandard[8]; +} RTEMS_PACKED EDID_monitor_range_limits; + +#define EDID_DTT_MonitorName 0xFC + +#define EDID_DTT_AdditionalColorPointData 0xFB +/* Standard Timing Identification */ +#define EDID_DTT_AdditionalSTI 0xFA + +#define EDID_DTT_DisplayColorManagement 0xF9 + +#define EDID_DTT_CVT3ByteTimingCodes 0xF8 + +#define EDID1_CVT_AspectRatioOff 2 +#define EDID1_CVT_AspectRatioMask 0x3 +#define EDID1_CVT_AddressableLinesHighOff 4 +#define EDID1_CVT_AddressableLinesHighMask 0xF + /* next 5 bits indicate supported vertical rates */ +#define EDID1_CVT_VerticalRate60HzRBOff 0 +#define EDID1_CVT_VerticalRate60HzRBMask 0x1 +#define EDID1_CVT_VerticalRate85HzOff 1 +#define EDID1_CVT_VerticalRate85HzMask 0x1 +#define EDID1_CVT_VerticalRate75HzOff 2 +#define EDID1_CVT_VerticalRate75HzMask 0x1 +#define EDID1_CVT_VerticalRate60HzOff 3 +#define EDID1_CVT_VerticalRate60HzMask 0x1 +#define EDID1_CVT_VerticalRate50HzOff 4 +#define EDID1_CVT_VerticalRate50HzMask 0x1 +#define EDID1_CVT_PreferredVerticalRateOff 5 +#define EDID1_CVT_PreferredVerticalRateMask 0x3 + +#define EDID_CVT_AspectRatio_4_3 0 +#define EDID_CVT_AspectRatio_16_9 1 +#define EDID_CVT_AspectRatio_16_10 2 +#define EDID_CVT_AspectRatio_15_9 3 +#define EDID_CVT_PrefVertRate50Hz 0 +#define EDID_CVT_PrefVertRate60Hz 1 +#define EDID_CVT_PrefVertRate75Hz 2 +#define EDID_CVT_PrefVertRate85Hz 3 +typedef struct { + uint8_t AddressableLinesLow; + uint8_t AspectRatio_AddressableLinesHigh; + uint8_t VerticalRate_PreferredVerticalRate; +} RTEMS_PACKED EDID_CVT_3_byte_code_descriptor; +typedef struct { + uint8_t VersionNumber; + EDID_CVT_3_byte_code_descriptor cvt[4]; +} RTEMS_PACKED EDID_CVT_timing_codes_3B; + +EDID_INLINE_ROUTINE uint16_t edid1_CVT_addressable_lines_high ( + EDID_CVT_3_byte_code_descriptor *cvt) +{ + return (cvt->AddressableLinesLow | + (cvt->VerticalRate_PreferredVerticalRate & + (EDID1_CVT_AddressableLinesHighMask<<EDID1_CVT_AddressableLinesHighOff) + ) << (8-EDID1_CVT_AddressableLinesHighOff) ); +} + +EDID_INLINE_ROUTINE uint8_t edid1_CVT_aspect_ratio ( + EDID_CVT_3_byte_code_descriptor *cvt) +{ + return (cvt->AspectRatio_AddressableLinesHigh >> EDID1_CVT_AspectRatioOff) & + EDID1_CVT_AspectRatioMask; +} + +#define EDID_DTT_EstablishedTimingsIII 0xF7 +typedef struct { + uint8_t RevisionNumber; + uint8_t EST_III[12]; +} RTEMS_PACKED EDID_established_timings_III; +enum EST_III { + EST_1152x864_75Hz = 0, + EST_1024x768_85Hz = 1, + EST_800x600_85Hz = 2, + EST_848x480_60Hz = 3, + EST_640x480_85Hz = 4, + EST_720x400_85Hz = 5, + EST_640x400_85Hz = 6, + EST_640x350_85Hz = 7, + + EST_1280x1024_85Hz = 8, + EST_1280x1024_60Hz = 9, + EST_1280x960_85Hz = 10, + EST_1280x960_60Hz = 11, + EST_1280x768_85Hz = 12, + EST_1280x768_75Hz = 13, + EST_1280x768_60Hz = 14, + EST_1280x768_60HzRB = 15, + + EST_1400x1050_75Hz = 16, + EST_1400x1050_60Hz = 17, + EST_1400x1050_60HzRB= 18, + EST_1400x900_85Hz = 19, + EST_1400x900_75Hz = 20, + EST_1400x900_60Hz = 21, + EST_1400x900_60HzRB = 22, + EST_1360x768_60Hz = 23, + + EST_1600x1200_70Hz = 24, + EST_1600x1200_65Hz = 25, + EST_1600x1200_60Hz = 26, + EST_1680x1050_85Hz = 27, + EST_1680x1050_75Hz = 28, + EST_1680x1050_60Hz = 29, + EST_1680x1050_60HzRB= 30, + EST_1400x1050_85Hz = 31, + + EST_1920x1200_60Hz = 32, + EST_1920x1200_60HzRB= 33, + EST_1856x1392_75Hz = 34, + EST_1856x1392_60Hz = 35, + EST_1792x1344_75Hz = 36, + EST_1792x1344_60Hz = 37, + EST_1600x1200_85Hz = 38, + EST_1600x1200_75Hz = 39, + + EST_1920x1440_75Hz = 44, + EST_1920x1440_60Hz = 45, + EST_1920x1200_85Hz = 46, + EST_1920x1200_75Hz = 47, +}; + +#define EDID_DTT_DescriptorSpaceUnused 0x10 +/* DTT 0x0 - 0xF are manufacturer specific */ + +typedef struct { + uint8_t Flag0[2]; + uint8_t Flag1; + uint8_t DataTypeTag; + uint8_t Flag2; + uint8_t DescriptorData[13]; +} RTEMS_PACKED EDID_monitor_descriptor; + +union EDID_DTD_MD { + EDID_detailed_timing_descriptor dtd; + EDID_monitor_descriptor md; +} RTEMS_PACKED; + +#define EDID1_STI_ImageAspectRatioOff 0 +#define EDID1_STI_ImageAspectRatioMask 0x3 +#define EDID1_STI_RefreshRateOff 2 +#define EDID1_STI_RefreshRateMask 0x3F + +#define EDID_STI_DescriptorUnused 0x0101 +#define EDID_STI_AspectRatio_16_10 0 +#define EDID_STI_AspectRatio_4_3 1 +#define EDID_STI_AspectRatio_5_4 2 +#define EDID_STI_AspectRatio_16_9 3 +typedef struct { + uint8_t HorizontalActivePixels; + uint8_t ImageAspectRatio_RefreshRate; +} RTEMS_PACKED EDID_standard_timing_identification; + +/* Video Input Definition */ +/* Analog = 0, Digital = 1 */ +#define EDID1_VID_DigitalSignalLevelOff 7 +#define EDID1_VID_DigitalSignalLevelMask 0x1 +/* for EDID1_VID_DigitalSignalLevelOff = 1 (Digital) */ +#define EDID1_VID_ColorBitDepthOff 4 +#define EDID1_VID_ColorBitDepthMask 0x7 /* see CBD */ +#define EDID1_VID_DigitalVideoStandardSuppOff 0 +#define EDID1_VID_DigitalVideoStandardSuppMask 0xF /* see DVS */ +/* for EDID1_VID_DigitalSignalLevelOff = 0 (Analog) */ +#define EDID1_VID_SignalLevelStandardOff 5 +#define EDID1_VID_SignalLevelStandardMask 0x3 +#define EDID1_VID_VideoSetupBlankOff 4 +#define EDID1_VID_VideoSetupBlankMask 0x1 +#define EDID1_VID_SeparateSyncHandVSignalsOff 3 +#define EDID1_VID_SeparateSyncHandVSignalsMask 0x1 +#define EDID1_VID_SyncSignalOnHorizontalOff 2 +#define EDID1_VID_SyncSignalOnHorizontalMask 0x1 +#define EDID1_VID_SyncSignalOnGreenOff 1 +#define EDID1_VID_SyncSignalOnGreenMask 0x1 +#define EDID1_VID_SerationOnVerticalSyncOff 0 +#define EDID1_VID_SerationOnVerticalSyncMask 0x1 +/* Analog Interface Data Format - Signal Level Standard */ +#define EDID_SLS_0700_0300_1000Vpp 0x0 +#define EDID_SLS_0714_0286_1000Vpp 0x1 +#define EDID_SLS_1000_0400_1400Vpp 0x2 +#define EDID_SLS_0700_0000_0700Vpp 0x3 + +/* Color Bit Depths */ +#define CBD_undef 0x0 +#define CBD_6bPerPrimaryColor 0x1 +#define CBD_8bPerPrimaryColor 0x2 +#define CBD_10bPerPrimaryColor 0x3 +#define CBD_12bPerPrimaryColor 0x4 +#define CBD_14bPerPrimaryColor 0x5 +#define CBD_16bPerPrimaryColor 0x6 +#define CBD_reserved 0x7 + +/* Digital Video Standard Supported */ +#define DVS_undef 0x0 +#define DVS_DVI 0x1 +#define DVS_HDMI-a 0x2 +#define DVS_HDMI-b 0x3 +#define DVS_MDDI 0x4 +#define DVS_DiplayPort 0x5 + +/* Feature Support */ +#define EDID1_Feature_GTFSupported_mask 0x1 +#define EDID1_Feature_GTFSupported_off 0 +#define EDID1_Feature_PreferredTimingMode_mask 0x1 +#define EDID1_Feature_PreferredTimingMode_off 1 +#define EDID1_Feature_StandardDefaultColorSpace_mask 0x1 +#define EDID1_Feature_StandardDefaultColorSpace_off 2 +#define EDID1_Feature_DisplayType_mask 0x2 +#define EDID1_Feature_DisplayType_off 3 + /* Refer to VESA DPMS Specification */ +#define EDID1_Feature_ActiveOff_mask 0x1 +#define EDID1_Feature_ActiveOff_off 5 +#define EDID1_Feature_Suspend_mask 0x1 +#define EDID1_Feature_Suspend_off 6 +#define EDID1_Feature_StandBy_mask 0x1 +#define EDID1_Feature_StandBy_off 7 + /* analog - Display Color Type */ +#define EDID_DisplayType_Monochrome 0 +#define EDID_DisplayType_RGBcolor 1 +#define EDID_DisplayType_nonRGBcolor 2 +#define EDID_DisplayType_undef 3 + /* digital - Supported Color Encoding Formats */ +#define EDID_DisplayType_RGB444 0 +#define EDID_DisplayType_RGB444YCrCb444 1 +#define EDID_DisplayType_RGB444YCrCb422 2 +#define EDID_DisplayType_RGB444YCrCb444YCrCb422 3 + +typedef struct { + uint8_t Header[8]; +/* Vendor Product Identification */ + uint8_t IDManufacturerName[2]; + uint8_t IDProductCode[2]; + uint8_t IDSerialNumber[4]; + uint8_t WeekofManufacture; + uint8_t YearofManufacture; +/* EDID Structure Version Revision Level */ + uint8_t Version; + uint8_t Revision; +/* Basic Display Parameters Features */ + /* Video Input Definition */ + uint8_t VideoInputDefinition; + uint8_t MaxHorizontalImageSize; + uint8_t MaxVerticalImageSize; + uint8_t DisplayTransferCharacteristic; + /* Feature Support */ + uint8_t Features; +/* Color Characteristics */ + uint8_t GreenRedLow; + uint8_t WhiteBlueLow; + uint8_t RedXHigh; + uint8_t RedYHigh; + uint8_t GreenXHigh; + uint8_t GreenYHigh; + uint8_t BlueXHigh; + uint8_t BlueYHigh; + uint8_t WhiteXHigh; + uint8_t WhiteYHigh; +/* Established Timings I, II, Manufacturer's */ + uint8_t EST_I_II_Man[3]; +/* Standard Timing Identification */ + EDID_standard_timing_identification STI[8]; +/* Detailed Timing Descriptions / Monitor Descriptions */ + union EDID_DTD_MD dtd_md[4]; + uint8_t ExtensionFlag; + uint8_t Checksum; +} RTEMS_PACKED EDID_edid1; + +EDID_INLINE_ROUTINE uint16_t edid1_RedX (EDID_edid1 *edid) { + return (edid->RedXHigh<<2) | (edid->GreenRedLow>>6); +} +EDID_INLINE_ROUTINE uint16_t edid1_RedY (EDID_edid1 *edid) { + return (edid->RedYHigh<<2) | (edid->GreenRedLow>>4)&&0x3; +} +EDID_INLINE_ROUTINE uint16_t edid1_GreenX (EDID_edid1 *edid) { + return (edid->GreenXHigh<<2) | (edid->GreenRedLow>>2)&&0x3; +} +EDID_INLINE_ROUTINE uint16_t edid1_GreenY (EDID_edid1 *edid) { + return (edid->GreenYHigh<<2) | (edid->GreenRedLow&0x3); +} +EDID_INLINE_ROUTINE uint16_t edid1_BlueX (EDID_edid1 *edid) { + return (edid->BlueXHigh<<2) | (edid->WhiteBlueLow>>6); +} +EDID_INLINE_ROUTINE uint16_t edid1_BlueY (EDID_edid1 *edid) { + return (edid->BlueYHigh<<2) | (edid->WhiteBlueLow>>4)&&0x3; +} +EDID_INLINE_ROUTINE uint16_t edid1_WhiteX (EDID_edid1 *edid) { + return (edid->WhiteXHigh<<2) | (edid->WhiteBlueLow>>2)&&0x3; +} +EDID_INLINE_ROUTINE uint16_t edid1_WhiteY (EDID_edid1 *edid) { + return (edid->WhiteYHigh<<2) | (edid->WhiteBlueLow&0x3); +} + +EDID_INLINE_ROUTINE int edid1_STI_is_unused ( + const EDID_standard_timing_identification *edid_sti) { + return (edid_sti->HorizontalActivePixels == + (uint8_t)EDID_STI_DescriptorUnused) && + (edid_sti->ImageAspectRatio_RefreshRate == + (uint8_t)(EDID_STI_DescriptorUnused >> 8)); +} + +enum edid1_established_timings { +/* Established Timings I */ + EST_800x600_60Hz = 0, + EST_800x600_56Hz = 1, + EST_640x480_75Hz = 2, + EST_640x480_72Hz = 3, + EST_640x480_67Hz = 4, + EST_640x480_60Hz = 5, + EST_720x400_88Hz = 6, + EST_720x400_70Hz = 7, +/* Established Timings II */ + EST_1280x1024_75Hz = 8, + EST_1024x768_75Hz = 9, + EST_1024x768_70Hz = 10, + EST_1024x768_60Hz = 11, + EST_1024x768_87Hz = 12, + EST_832x624_75Hz = 13, + EST_800x600_75Hz = 14, + EST_800x600_72Hz = 15, +/* Manufacturer's Timings */ + EST_1152x870_75Hz = 23, +}; + +EDID_INLINE_ROUTINE uint8_t edid1_established_tim ( + EDID_edid1 *edid, + enum edid1_established_timings est) +{ + return (uint8_t)(edid->EST_I_II_Man[est/8] & (est%8)); +} + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* ASM */ + +#endif /* _VBE_H */ diff --git a/bsps/i386/pc386/include/rtems/kd.h b/bsps/i386/pc386/include/rtems/kd.h new file mode 100644 index 0000000000..c97e4f7bdd --- /dev/null +++ b/bsps/i386/pc386/include/rtems/kd.h @@ -0,0 +1,111 @@ +/** + * @file + * + * @ingroup i386_pc386 + * + * @brief KD definitions. + */ + +/* + * by: Rosimildo da Silva: rdasilva@connecttel.com + * + * + */ + +#ifndef _LINUX_KD_H +#define _LINUX_KD_H +#include <sys/types.h> + +/* 0x4B is 'K', to avoid collision with termios and vt */ + +#define KIOCSOUND 0x4B2F /* start sound generation (0 for off) */ +#define KDMKTONE 0x4B30 /* generate tone */ + +#define KDGETLED 0x4B31 /* return current led state */ +#define KDSETLED 0x4B32 /* set led state [lights, not flags] */ +#define LED_SCR 0x01 /* scroll lock led */ +#define LED_CAP 0x04 /* caps lock led */ +#define LED_NUM 0x02 /* num lock led */ + +#define KDGKBTYPE 0x4B33 /* get keyboard type */ +#define KB_84 0x01 +#define KB_101 0x02 /* this is what we always answer */ +#define KB_OTHER 0x03 + +#define KDSETMODE 0x4B3A /* set text/graphics mode */ +#define KD_TEXT 0x00 +#define KD_GRAPHICS 0x01 +#define KD_TEXT0 0x02 /* obsolete */ +#define KD_TEXT1 0x03 /* obsolete */ +#define KDGETMODE 0x4B3B /* get current mode */ + +#define K_RAW 0x00 +#define K_XLATE 0x01 +#define K_MEDIUMRAW 0x02 +#define K_UNICODE 0x03 +#define KDGKBMODE 0x4B44 /* gets current keyboard mode */ +#define KDSKBMODE 0x4B45 /* sets current keyboard mode */ + +#define K_METABIT 0x03 +#define K_ESCPREFIX 0x04 +#define KDGKBMETA 0x4B62 /* gets meta key handling mode */ +#define KDSKBMETA 0x4B63 /* sets meta key handling mode */ + +#define K_SCROLLLOCK 0x01 +#define K_CAPSLOCK 0x02 +#define K_NUMLOCK 0x04 +#define KDGKBLED 0x4B64 /* get led flags (not lights) */ +#define KDSKBLED 0x4B65 /* set led flags (not lights) */ + +struct kbentry { + unsigned char kb_table; + unsigned char kb_index; + unsigned short kb_value; +}; +#define K_NORMTAB 0x00 +#define K_SHIFTTAB 0x01 +#define K_ALTTAB 0x02 +#define K_ALTSHIFTTAB 0x03 + +#define KDGKBENT 0x4B46 /* gets one entry in translation table */ +#define KDSKBENT 0x4B47 /* sets one entry in translation table */ + +struct kbsentry { + unsigned char kb_func; + unsigned char kb_string[512]; +}; + +struct kbdiacr { + unsigned char diacr, base, result; +}; +struct kbdiacrs { + unsigned int kb_cnt; /* number of entries in following array */ + struct kbdiacr kbdiacr[256]; /* MAX_DIACR from keyboard.h */ +}; +#define KDGKBDIACR 0x4B4A /* read kernel accent table */ +#define KDSKBDIACR 0x4B4B /* write kernel accent table */ + +struct kbkeycode { + unsigned int scancode, keycode; +}; +#define KDGETKEYCODE 0x4B4C /* read kernel keycode table entry */ +#define KDSETKEYCODE 0x4B4D /* write kernel keycode table entry */ + +#define KDSIGACCEPT 0x4B4E /* accept kbd generated signals */ + +#define KDGHWCLK 0x4B50 /* get hardware clock */ +#define KDSHWCLK 0x4B51 /* set hardware clock */ + +struct kbd_repeat { + int delay; /* in msec; <= 0: don't change */ + int rate; /* in msec; <= 0: don't change */ +}; + +#define KDKBDREP 0x4B52 /* set keyboard delay/repeat rate; + * actually used values are returned */ + +/* note: 0x4B00-0x4B4E all have had a value at some time; + don't reuse for the time being */ +/* note: 0x4B60-0x4B6D, 0x4B70-0x4B72 used above */ + +#endif /* _LINUX_KD_H */ diff --git a/bsps/i386/pc386/include/rtems/keyboard.h b/bsps/i386/pc386/include/rtems/keyboard.h new file mode 100644 index 0000000000..ffc8aabfbd --- /dev/null +++ b/bsps/i386/pc386/include/rtems/keyboard.h @@ -0,0 +1,604 @@ +/** + * @file + * + * @ingroup i386_pc386 + * + * @brief Keyboard definitions. + */ + +/* + * Submitted by: Rosimildo da Silva: rdasilva@connecttel.com + */ + +#ifndef __RTEMS_KEYBOARD_H +#define __RTEMS_KEYBOARD_H + +#include <rtems/kd.h> + +#define KG_SHIFT 0 +#define KG_CTRL 2 +#define KG_ALT 3 +#define KG_ALTGR 1 +#define KG_SHIFTL 4 +#define KG_SHIFTR 5 +#define KG_CTRLL 6 +#define KG_CTRLR 7 +#define KG_CAPSSHIFT 8 + +#define NR_SHIFT 9 + +#define NR_KEYS 128 +#define MAX_NR_KEYMAPS 256 +/* This means 64Kb if all keymaps are allocated. Only the superuser + may increase the number of keymaps beyond MAX_NR_OF_USER_KEYMAPS. */ +#define MAX_NR_OF_USER_KEYMAPS 256 /* should be at least 7 */ + +extern const int NR_TYPES; +extern unsigned short *key_maps[MAX_NR_KEYMAPS]; +extern unsigned short plain_map[NR_KEYS]; +extern unsigned char keyboard_type; + +#define MAX_NR_FUNC 256 /* max nr of strings assigned to keys */ +#define MAX_NR_CONSOLES 1 + +extern char *func_table[MAX_NR_FUNC]; + +#define KT_LATIN 0 /* we depend on this being zero */ +#define KT_LETTER 11 /* symbol that can be acted upon by CapsLock */ +#define KT_FN 1 +#define KT_SPEC 2 +#define KT_PAD 3 +#define KT_DEAD 4 +#define KT_CONS 5 +#define KT_CUR 6 +#define KT_SHIFT 7 +#define KT_META 8 +#define KT_ASCII 9 +#define KT_LOCK 10 +#define KT_SLOCK 12 + +#define K(t,v) (((t)<<8)|(v)) +#define KTYP(x) ((x) >> 8) +#define KVAL(x) ((x) & 0xff) + +#define K_F1 K(KT_FN,0) +#define K_F2 K(KT_FN,1) +#define K_F3 K(KT_FN,2) +#define K_F4 K(KT_FN,3) +#define K_F5 K(KT_FN,4) +#define K_F6 K(KT_FN,5) +#define K_F7 K(KT_FN,6) +#define K_F8 K(KT_FN,7) +#define K_F9 K(KT_FN,8) +#define K_F10 K(KT_FN,9) +#define K_F11 K(KT_FN,10) +#define K_F12 K(KT_FN,11) +#define K_F13 K(KT_FN,12) +#define K_F14 K(KT_FN,13) +#define K_F15 K(KT_FN,14) +#define K_F16 K(KT_FN,15) +#define K_F17 K(KT_FN,16) +#define K_F18 K(KT_FN,17) +#define K_F19 K(KT_FN,18) +#define K_F20 K(KT_FN,19) +#define K_FIND K(KT_FN,20) +#define K_INSERT K(KT_FN,21) +#define K_REMOVE K(KT_FN,22) +#define K_SELECT K(KT_FN,23) +#define K_PGUP K(KT_FN,24) /* PGUP is a synonym for PRIOR */ +#define K_PGDN K(KT_FN,25) /* PGDN is a synonym for NEXT */ +#define K_MACRO K(KT_FN,26) +#define K_HELP K(KT_FN,27) +#define K_DO K(KT_FN,28) +#define K_PAUSE K(KT_FN,29) +#define K_F21 K(KT_FN,30) +#define K_F22 K(KT_FN,31) +#define K_F23 K(KT_FN,32) +#define K_F24 K(KT_FN,33) +#define K_F25 K(KT_FN,34) +#define K_F26 K(KT_FN,35) +#define K_F27 K(KT_FN,36) +#define K_F28 K(KT_FN,37) +#define K_F29 K(KT_FN,38) +#define K_F30 K(KT_FN,39) +#define K_F31 K(KT_FN,40) +#define K_F32 K(KT_FN,41) +#define K_F33 K(KT_FN,42) +#define K_F34 K(KT_FN,43) +#define K_F35 K(KT_FN,44) +#define K_F36 K(KT_FN,45) +#define K_F37 K(KT_FN,46) +#define K_F38 K(KT_FN,47) +#define K_F39 K(KT_FN,48) +#define K_F40 K(KT_FN,49) +#define K_F41 K(KT_FN,50) +#define K_F42 K(KT_FN,51) +#define K_F43 K(KT_FN,52) +#define K_F44 K(KT_FN,53) +#define K_F45 K(KT_FN,54) +#define K_F46 K(KT_FN,55) +#define K_F47 K(KT_FN,56) +#define K_F48 K(KT_FN,57) +#define K_F49 K(KT_FN,58) +#define K_F50 K(KT_FN,59) +#define K_F51 K(KT_FN,60) +#define K_F52 K(KT_FN,61) +#define K_F53 K(KT_FN,62) +#define K_F54 K(KT_FN,63) +#define K_F55 K(KT_FN,64) +#define K_F56 K(KT_FN,65) +#define K_F57 K(KT_FN,66) +#define K_F58 K(KT_FN,67) +#define K_F59 K(KT_FN,68) +#define K_F60 K(KT_FN,69) +#define K_F61 K(KT_FN,70) +#define K_F62 K(KT_FN,71) +#define K_F63 K(KT_FN,72) +#define K_F64 K(KT_FN,73) +#define K_F65 K(KT_FN,74) +#define K_F66 K(KT_FN,75) +#define K_F67 K(KT_FN,76) +#define K_F68 K(KT_FN,77) +#define K_F69 K(KT_FN,78) +#define K_F70 K(KT_FN,79) +#define K_F71 K(KT_FN,80) +#define K_F72 K(KT_FN,81) +#define K_F73 K(KT_FN,82) +#define K_F74 K(KT_FN,83) +#define K_F75 K(KT_FN,84) +#define K_F76 K(KT_FN,85) +#define K_F77 K(KT_FN,86) +#define K_F78 K(KT_FN,87) +#define K_F79 K(KT_FN,88) +#define K_F80 K(KT_FN,89) +#define K_F81 K(KT_FN,90) +#define K_F82 K(KT_FN,91) +#define K_F83 K(KT_FN,92) +#define K_F84 K(KT_FN,93) +#define K_F85 K(KT_FN,94) +#define K_F86 K(KT_FN,95) +#define K_F87 K(KT_FN,96) +#define K_F88 K(KT_FN,97) +#define K_F89 K(KT_FN,98) +#define K_F90 K(KT_FN,99) +#define K_F91 K(KT_FN,100) +#define K_F92 K(KT_FN,101) +#define K_F93 K(KT_FN,102) +#define K_F94 K(KT_FN,103) +#define K_F95 K(KT_FN,104) +#define K_F96 K(KT_FN,105) +#define K_F97 K(KT_FN,106) +#define K_F98 K(KT_FN,107) +#define K_F99 K(KT_FN,108) +#define K_F100 K(KT_FN,109) +#define K_F101 K(KT_FN,110) +#define K_F102 K(KT_FN,111) +#define K_F103 K(KT_FN,112) +#define K_F104 K(KT_FN,113) +#define K_F105 K(KT_FN,114) +#define K_F106 K(KT_FN,115) +#define K_F107 K(KT_FN,116) +#define K_F108 K(KT_FN,117) +#define K_F109 K(KT_FN,118) +#define K_F110 K(KT_FN,119) +#define K_F111 K(KT_FN,120) +#define K_F112 K(KT_FN,121) +#define K_F113 K(KT_FN,122) +#define K_F114 K(KT_FN,123) +#define K_F115 K(KT_FN,124) +#define K_F116 K(KT_FN,125) +#define K_F117 K(KT_FN,126) +#define K_F118 K(KT_FN,127) +#define K_F119 K(KT_FN,128) +#define K_F120 K(KT_FN,129) +#define K_F121 K(KT_FN,130) +#define K_F122 K(KT_FN,131) +#define K_F123 K(KT_FN,132) +#define K_F124 K(KT_FN,133) +#define K_F125 K(KT_FN,134) +#define K_F126 K(KT_FN,135) +#define K_F127 K(KT_FN,136) +#define K_F128 K(KT_FN,137) +#define K_F129 K(KT_FN,138) +#define K_F130 K(KT_FN,139) +#define K_F131 K(KT_FN,140) +#define K_F132 K(KT_FN,141) +#define K_F133 K(KT_FN,142) +#define K_F134 K(KT_FN,143) +#define K_F135 K(KT_FN,144) +#define K_F136 K(KT_FN,145) +#define K_F137 K(KT_FN,146) +#define K_F138 K(KT_FN,147) +#define K_F139 K(KT_FN,148) +#define K_F140 K(KT_FN,149) +#define K_F141 K(KT_FN,150) +#define K_F142 K(KT_FN,151) +#define K_F143 K(KT_FN,152) +#define K_F144 K(KT_FN,153) +#define K_F145 K(KT_FN,154) +#define K_F146 K(KT_FN,155) +#define K_F147 K(KT_FN,156) +#define K_F148 K(KT_FN,157) +#define K_F149 K(KT_FN,158) +#define K_F150 K(KT_FN,159) +#define K_F151 K(KT_FN,160) +#define K_F152 K(KT_FN,161) +#define K_F153 K(KT_FN,162) +#define K_F154 K(KT_FN,163) +#define K_F155 K(KT_FN,164) +#define K_F156 K(KT_FN,165) +#define K_F157 K(KT_FN,166) +#define K_F158 K(KT_FN,167) +#define K_F159 K(KT_FN,168) +#define K_F160 K(KT_FN,169) +#define K_F161 K(KT_FN,170) +#define K_F162 K(KT_FN,171) +#define K_F163 K(KT_FN,172) +#define K_F164 K(KT_FN,173) +#define K_F165 K(KT_FN,174) +#define K_F166 K(KT_FN,175) +#define K_F167 K(KT_FN,176) +#define K_F168 K(KT_FN,177) +#define K_F169 K(KT_FN,178) +#define K_F170 K(KT_FN,179) +#define K_F171 K(KT_FN,180) +#define K_F172 K(KT_FN,181) +#define K_F173 K(KT_FN,182) +#define K_F174 K(KT_FN,183) +#define K_F175 K(KT_FN,184) +#define K_F176 K(KT_FN,185) +#define K_F177 K(KT_FN,186) +#define K_F178 K(KT_FN,187) +#define K_F179 K(KT_FN,188) +#define K_F180 K(KT_FN,189) +#define K_F181 K(KT_FN,190) +#define K_F182 K(KT_FN,191) +#define K_F183 K(KT_FN,192) +#define K_F184 K(KT_FN,193) +#define K_F185 K(KT_FN,194) +#define K_F186 K(KT_FN,195) +#define K_F187 K(KT_FN,196) +#define K_F188 K(KT_FN,197) +#define K_F189 K(KT_FN,198) +#define K_F190 K(KT_FN,199) +#define K_F191 K(KT_FN,200) +#define K_F192 K(KT_FN,201) +#define K_F193 K(KT_FN,202) +#define K_F194 K(KT_FN,203) +#define K_F195 K(KT_FN,204) +#define K_F196 K(KT_FN,205) +#define K_F197 K(KT_FN,206) +#define K_F198 K(KT_FN,207) +#define K_F199 K(KT_FN,208) +#define K_F200 K(KT_FN,209) +#define K_F201 K(KT_FN,210) +#define K_F202 K(KT_FN,211) +#define K_F203 K(KT_FN,212) +#define K_F204 K(KT_FN,213) +#define K_F205 K(KT_FN,214) +#define K_F206 K(KT_FN,215) +#define K_F207 K(KT_FN,216) +#define K_F208 K(KT_FN,217) +#define K_F209 K(KT_FN,218) +#define K_F210 K(KT_FN,219) +#define K_F211 K(KT_FN,220) +#define K_F212 K(KT_FN,221) +#define K_F213 K(KT_FN,222) +#define K_F214 K(KT_FN,223) +#define K_F215 K(KT_FN,224) +#define K_F216 K(KT_FN,225) +#define K_F217 K(KT_FN,226) +#define K_F218 K(KT_FN,227) +#define K_F219 K(KT_FN,228) +#define K_F220 K(KT_FN,229) +#define K_F221 K(KT_FN,230) +#define K_F222 K(KT_FN,231) +#define K_F223 K(KT_FN,232) +#define K_F224 K(KT_FN,233) +#define K_F225 K(KT_FN,234) +#define K_F226 K(KT_FN,235) +#define K_F227 K(KT_FN,236) +#define K_F228 K(KT_FN,237) +#define K_F229 K(KT_FN,238) +#define K_F230 K(KT_FN,239) +#define K_F231 K(KT_FN,240) +#define K_F232 K(KT_FN,241) +#define K_F233 K(KT_FN,242) +#define K_F234 K(KT_FN,243) +#define K_F235 K(KT_FN,244) +#define K_F236 K(KT_FN,245) +#define K_F237 K(KT_FN,246) +#define K_F238 K(KT_FN,247) +#define K_F239 K(KT_FN,248) +#define K_F240 K(KT_FN,249) +#define K_F241 K(KT_FN,250) +#define K_F242 K(KT_FN,251) +#define K_F243 K(KT_FN,252) +#define K_F244 K(KT_FN,253) +#define K_F245 K(KT_FN,254) +#define K_UNDO K(KT_FN,255) + +#define K_HOLE K(KT_SPEC,0) +#define K_ENTER K(KT_SPEC,1) +#define K_SH_REGS K(KT_SPEC,2) +#define K_SH_MEM K(KT_SPEC,3) +#define K_SH_STAT K(KT_SPEC,4) +#define K_BREAK K(KT_SPEC,5) +#define K_CONS K(KT_SPEC,6) +#define K_CAPS K(KT_SPEC,7) +#define K_NUM K(KT_SPEC,8) +#define K_HOLD K(KT_SPEC,9) +#define K_SCROLLFORW K(KT_SPEC,10) +#define K_SCROLLBACK K(KT_SPEC,11) +#define K_BOOT K(KT_SPEC,12) +#define K_CAPSON K(KT_SPEC,13) +#define K_COMPOSE K(KT_SPEC,14) +#define K_SAK K(KT_SPEC,15) +#define K_DECRCONSOLE K(KT_SPEC,16) +#define K_INCRCONSOLE K(KT_SPEC,17) +#define K_SPAWNCONSOLE K(KT_SPEC,18) +#define K_BARENUMLOCK K(KT_SPEC,19) + +#define K_ALLOCATED K(KT_SPEC,126) /* dynamically allocated keymap */ +#define K_NOSUCHMAP K(KT_SPEC,127) /* returned by KDGKBENT */ + +#define K_P0 K(KT_PAD,0) +#define K_P1 K(KT_PAD,1) +#define K_P2 K(KT_PAD,2) +#define K_P3 K(KT_PAD,3) +#define K_P4 K(KT_PAD,4) +#define K_P5 K(KT_PAD,5) +#define K_P6 K(KT_PAD,6) +#define K_P7 K(KT_PAD,7) +#define K_P8 K(KT_PAD,8) +#define K_P9 K(KT_PAD,9) +#define K_PPLUS K(KT_PAD,10) /* key-pad plus */ +#define K_PMINUS K(KT_PAD,11) /* key-pad minus */ +#define K_PSTAR K(KT_PAD,12) /* key-pad asterisk (star) */ +#define K_PSLASH K(KT_PAD,13) /* key-pad slash */ +#define K_PENTER K(KT_PAD,14) /* key-pad enter */ +#define K_PCOMMA K(KT_PAD,15) /* key-pad comma: kludge... */ +#define K_PDOT K(KT_PAD,16) /* key-pad dot (period): kludge... */ +#define K_PPLUSMINUS K(KT_PAD,17) /* key-pad plus/minus */ +#define K_PPARENL K(KT_PAD,18) /* key-pad left parenthesis */ +#define K_PPARENR K(KT_PAD,19) /* key-pad right parenthesis */ + +#define NR_PAD 20 + +#define K_DGRAVE K(KT_DEAD,0) +#define K_DACUTE K(KT_DEAD,1) +#define K_DCIRCM K(KT_DEAD,2) +#define K_DTILDE K(KT_DEAD,3) +#define K_DDIERE K(KT_DEAD,4) +#define K_DCEDIL K(KT_DEAD,5) + +#define NR_DEAD 6 + +#define K_DOWN K(KT_CUR,0) +#define K_LEFT K(KT_CUR,1) +#define K_RIGHT K(KT_CUR,2) +#define K_UP K(KT_CUR,3) + +#define K_SHIFT K(KT_SHIFT,KG_SHIFT) +#define K_CTRL K(KT_SHIFT,KG_CTRL) +#define K_ALT K(KT_SHIFT,KG_ALT) +#define K_ALTGR K(KT_SHIFT,KG_ALTGR) +#define K_SHIFTL K(KT_SHIFT,KG_SHIFTL) +#define K_SHIFTR K(KT_SHIFT,KG_SHIFTR) +#define K_CTRLL K(KT_SHIFT,KG_CTRLL) +#define K_CTRLR K(KT_SHIFT,KG_CTRLR) +#define K_CAPSSHIFT K(KT_SHIFT,KG_CAPSSHIFT) + +#define K_ASC0 K(KT_ASCII,0) +#define K_ASC1 K(KT_ASCII,1) +#define K_ASC2 K(KT_ASCII,2) +#define K_ASC3 K(KT_ASCII,3) +#define K_ASC4 K(KT_ASCII,4) +#define K_ASC5 K(KT_ASCII,5) +#define K_ASC6 K(KT_ASCII,6) +#define K_ASC7 K(KT_ASCII,7) +#define K_ASC8 K(KT_ASCII,8) +#define K_ASC9 K(KT_ASCII,9) +#define K_HEX0 K(KT_ASCII,10) +#define K_HEX1 K(KT_ASCII,11) +#define K_HEX2 K(KT_ASCII,12) +#define K_HEX3 K(KT_ASCII,13) +#define K_HEX4 K(KT_ASCII,14) +#define K_HEX5 K(KT_ASCII,15) +#define K_HEX6 K(KT_ASCII,16) +#define K_HEX7 K(KT_ASCII,17) +#define K_HEX8 K(KT_ASCII,18) +#define K_HEX9 K(KT_ASCII,19) +#define K_HEXa K(KT_ASCII,20) +#define K_HEXb K(KT_ASCII,21) +#define K_HEXc K(KT_ASCII,22) +#define K_HEXd K(KT_ASCII,23) +#define K_HEXe K(KT_ASCII,24) +#define K_HEXf K(KT_ASCII,25) + +#define NR_ASCII 26 + +#define K_SHIFTLOCK K(KT_LOCK,KG_SHIFT) +#define K_CTRLLOCK K(KT_LOCK,KG_CTRL) +#define K_ALTLOCK K(KT_LOCK,KG_ALT) +#define K_ALTGRLOCK K(KT_LOCK,KG_ALTGR) +#define K_SHIFTLLOCK K(KT_LOCK,KG_SHIFTL) +#define K_SHIFTRLOCK K(KT_LOCK,KG_SHIFTR) +#define K_CTRLLLOCK K(KT_LOCK,KG_CTRLL) +#define K_CTRLRLOCK K(KT_LOCK,KG_CTRLR) + +#define K_SHIFT_SLOCK K(KT_SLOCK,KG_SHIFT) +#define K_CTRL_SLOCK K(KT_SLOCK,KG_CTRL) +#define K_ALT_SLOCK K(KT_SLOCK,KG_ALT) +#define K_ALTGR_SLOCK K(KT_SLOCK,KG_ALTGR) +#define K_SHIFTL_SLOCK K(KT_SLOCK,KG_SHIFTL) +#define K_SHIFTR_SLOCK K(KT_SLOCK,KG_SHIFTR) +#define K_CTRLL_SLOCK K(KT_SLOCK,KG_CTRLL) +#define K_CTRLR_SLOCK K(KT_SLOCK,KG_CTRLR) + +#define NR_LOCK 8 + +#define MAX_DIACR 256 + +extern struct kbdiacr accent_table[MAX_DIACR]; +extern unsigned int accent_table_size; + +/* kbd_kern.h --- header file from linux --- */ +extern int shift_state; + +extern char *func_table[MAX_NR_FUNC]; +extern char func_buf[]; +extern char *funcbufptr; +extern int funcbufsize, funcbufleft; + +/* + * kbd->xxx contains the VC-local things (flag settings etc..) + * + * Note: externally visible are LED_SCR, LED_NUM, LED_CAP defined in kd.h + * The code in KDGETLED / KDSETLED depends on the internal and + * external order being the same. + * + * Note: lockstate is used as index in the array key_map. + */ +struct kbd_struct { + + unsigned char lockstate; +/* 8 modifiers - the names do not have any meaning at all; + they can be associated to arbitrarily chosen keys */ +#define VC_SHIFTLOCK KG_SHIFT /* shift lock mode */ +#define VC_ALTGRLOCK KG_ALTGR /* altgr lock mode */ +#define VC_CTRLLOCK KG_CTRL /* control lock mode */ +#define VC_ALTLOCK KG_ALT /* alt lock mode */ +#define VC_SHIFTLLOCK KG_SHIFTL /* shiftl lock mode */ +#define VC_SHIFTRLOCK KG_SHIFTR /* shiftr lock mode */ +#define VC_CTRLLLOCK KG_CTRLL /* ctrll lock mode */ +#define VC_CTRLRLOCK KG_CTRLR /* ctrlr lock mode */ + unsigned char slockstate; /* for `sticky' Shift, Ctrl, etc. */ + + unsigned char ledmode:2; /* one 2-bit value */ +#define LED_SHOW_FLAGS 0 /* traditional state */ +#define LED_SHOW_IOCTL 1 /* only change leds upon ioctl */ +#define LED_SHOW_MEM 2 /* `heartbeat': peek into memory */ + + unsigned char ledflagstate:3; /* flags, not lights */ + unsigned char default_ledflagstate:3; +#define VC_SCROLLOCK 0 /* scroll-lock mode */ +#define VC_NUMLOCK 1 /* numeric lock mode */ +#define VC_CAPSLOCK 2 /* capslock mode */ + + unsigned char kbdmode:2; /* one 2-bit value */ +#define VC_XLATE 0 /* translate keycodes using keymap */ +#define VC_MEDIUMRAW 1 /* medium raw (keycode) mode */ +#define VC_RAW 2 /* raw (scancode) mode */ +#define VC_UNICODE 3 /* Unicode mode */ + + unsigned char modeflags:5; +#define VC_APPLIC 0 /* application key mode */ +#define VC_CKMODE 1 /* cursor key mode */ +#define VC_REPEAT 2 /* keyboard repeat */ +#define VC_CRLF 3 /* 0 - enter sends CR, 1 - enter sends CRLF */ +#define VC_META 4 /* 0 - meta, 1 - meta=prefix with ESC */ +}; + +extern struct kbd_struct kbd_table[]; + + +void kbd_set_driver_handler( + void ( *handler )( void *, unsigned short, unsigned long ) +); + +static inline void show_console(void) +{ +} + +static inline void set_console(int nr) +{ +} + +void set_leds(void); + +static inline int vc_kbd_mode(struct kbd_struct * kbd, int flag) +{ + return ((kbd->modeflags >> flag) & 1); +} + +static inline int vc_kbd_led(struct kbd_struct * kbd, int flag) +{ + return ((kbd->ledflagstate >> flag) & 1); +} + +static inline void set_vc_kbd_mode(struct kbd_struct * kbd, int flag) +{ + kbd->modeflags |= 1 << flag; +} + +static inline void set_vc_kbd_led(struct kbd_struct * kbd, int flag) +{ + kbd->ledflagstate |= 1 << flag; +} + +static inline void clr_vc_kbd_mode(struct kbd_struct * kbd, int flag) +{ + kbd->modeflags &= ~(1 << flag); +} + +static inline void clr_vc_kbd_led(struct kbd_struct * kbd, int flag) +{ + kbd->ledflagstate &= ~(1 << flag); +} + +static inline void chg_vc_kbd_lock(struct kbd_struct * kbd, int flag) +{ + kbd->lockstate ^= 1 << flag; +} + +static inline void chg_vc_kbd_slock(struct kbd_struct * kbd, int flag) +{ + kbd->slockstate ^= 1 << flag; +} + +static inline void chg_vc_kbd_mode(struct kbd_struct * kbd, int flag) +{ + kbd->modeflags ^= 1 << flag; +} + +static inline void chg_vc_kbd_led(struct kbd_struct * kbd, int flag) +{ + kbd->ledflagstate ^= 1 << flag; + set_leds(); +} + +#define U(x) ((x) ^ 0xf000) + +/* keyboard.c */ +int kbd_init(void); +int getkeycode(unsigned int scancode); +int setkeycode(unsigned int scancode, unsigned int keycode); +void compute_shiftstate(void); +unsigned char getledstate(void); +void setledstate(struct kbd_struct *kbd, unsigned int led); +void handle_scancode(unsigned char scancode, int down); + +/* kbd_parser.c */ +void register_kbd_msg_queue( char *qname, int port ); +void unregister_kbd_msg_queue( int port ); + +/* defkeymap.c */ +extern unsigned int keymap_count; + +/* inch.c */ +void add_to_queue( unsigned short ); +int getch( void ); +int BSP_wait_polled_input(void); +int rtems_kbpoll( void ); + +/* outch.c */ +void _IBMPC_initVideo(void); + +/* pc_keyb.c */ +void keyboard_interrupt(void *unused); + +/* vt.c */ +int vt_ioctl( unsigned int cmd, unsigned long arg); + +#endif diff --git a/bsps/i386/pc386/include/rtems/ps2_drv.h b/bsps/i386/pc386/include/rtems/ps2_drv.h new file mode 100644 index 0000000000..536b56a6ed --- /dev/null +++ b/bsps/i386/pc386/include/rtems/ps2_drv.h @@ -0,0 +1,79 @@ +/** + * @file + * + * @ingroup i386_pc386 + * + * @brief Paux driver routines. + */ + +#ifndef __paux_drv__ +#define __paux_drv__ +/*************************************************************************** + * + * Copyright (c) 1999 ConnectTel, Inc. All Rights Reserved. + * + * MODULE DESCRIPTION: Prototype routines for the paux driver. + * + * by: Rosimildo da Silva: + * rdasilva@connecttel.com + * http://www.connecttel.com + * + ****************************************************************************/ + +/* functions */ +#ifdef __cplusplus +extern "C" { +#endif + +/* paux prototype entry points */ +rtems_device_driver paux_initialize( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver paux_open( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver paux_control( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver paux_close( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver paux_read( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver paux_write( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +rtems_device_driver paux_control( + rtems_device_major_number, + rtems_device_minor_number, + void * +); + +#define PAUX_DRIVER_TABLE_ENTRY \ + { paux_initialize, paux_open, paux_close, \ + paux_read, paux_write, paux_control } + +#ifdef __cplusplus +} +#endif + +#endif /* __paux_drv__ */ diff --git a/bsps/i386/pc386/include/rtems/vgacons.h b/bsps/i386/pc386/include/rtems/vgacons.h new file mode 100644 index 0000000000..df7615bf5e --- /dev/null +++ b/bsps/i386/pc386/include/rtems/vgacons.h @@ -0,0 +1,49 @@ +/** + * @file + * + * @ingroup i386_pc386 + * + * @brief VGA definitions. + */ + +/* + * COPYRIGHT (c) 1989-2011. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef _VGACONS_H_ +#define _VGACONS_H_ + +#include <libchip/serial.h> + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * This is the ASCII for "PC" in the upper word and 0386 + * in the lower which should be unique enough to + * distinguish this type of serial device from others. + */ + +#define VGA_CONSOLE 0x80670386 + +#define VGACONS_UART0 0 +#define VGACONS_UART1 1 + +bool vgacons_probe( int minor ); + +/* + * Driver function table + */ +extern const console_fns vgacons_fns; + +#ifdef __cplusplus +} +#endif + +#endif /* _VGACONS_H_ */ diff --git a/bsps/i386/pc386/include/tm27.h b/bsps/i386/pc386/include/tm27.h new file mode 100644 index 0000000000..b53ab8e97a --- /dev/null +++ b/bsps/i386/pc386/include/tm27.h @@ -0,0 +1,38 @@ +/** + * @file + * + * @ingroup i386_pc386 + * + * @brief Implementation of interrupt mechanisms for Time Test 27. + */ + +/* + * tm27.h + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef _RTEMS_TMTEST27 +#error "This is an RTEMS internal file you must not include directly." +#endif + +#ifndef __tm27_h +#define __tm27_h + +/* + * Define the interrupt mechanism for Time Test 27 + */ + +#define MUST_WAIT_FOR_INTERRUPT 0 + +#define Install_tm27_vector(handler) + +#define Cause_tm27_intr() __asm__ volatile("int $0x90" : :); + +#define Clear_tm27_intr() /* empty */ + +#define Lower_tm27_intr() /* empty */ + +#endif |