Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step.  It
copied header files from arbitrary locations into the build tree.  The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

* The make preinstall step itself needs time and disk space.

* Errors in header files show up in the build tree copy.  This makes it
  hard for editors to open the right file to fix the error.

* There is no clear relationship between source and build tree header
  files.  This makes an audit of the build process difficult.

* The visibility of all header files in the build tree makes it
  difficult to enforce API barriers.  For example it is discouraged to
  use BSP-specifics in the cpukit.

* An introduction of a new build system is difficult.

* Include paths specified by the -B option are system headers.  This
  may suppress warnings.

* The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step.   All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc.  Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

* cpukit/include

* cpukit/score/cpu/@RTEMS_CPU@/include

* cpukit/libnetworking

The new BSP include directories are:

* bsps/include

* bsps/@RTEMS_CPU@/include

* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed.  The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

1 files changed, 70 insertions, 0 deletions

diff --git a/bsps/bfin/include/libcpu/uartRegs.h b/bsps/bfin/include/libcpu/uartRegs.h
new file mode 100644
index 0000000000..f48052e49b
--- /dev/null
+++ b/bsps/bfin/include/libcpu/uartRegs.h
@@ -0,0 +1,70 @@
+/*  Blackfin UART Registers
+ *
+ *  Copyright (c) 2008 Kallisti Labs, Los Gatos, CA, USA
+ *             written by Allan Hessenflow <allanh@kallisti.com>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef _uartRegs_h_
+#define _uartRegs_h_
+
+/* register addresses */
+
+#define UART_RBR_OFFSET                               0x0000
+#define UART_THR_OFFSET                               0x0000
+#define UART_DLL_OFFSET                               0x0000
+#define UART_IER_OFFSET                               0x0004
+#define UART_DLH_OFFSET                               0x0004
+#define UART_IIR_OFFSET                               0x0008
+#define UART_LCR_OFFSET                               0x000c
+#define UART_MCR_OFFSET                               0x0010
+#define UART_LSR_OFFSET                               0x0014
+#define UART_SCR_OFFSET                               0x001c
+#define UART_GCTL_OFFSET                              0x0024
+
+
+/* register fields */
+
+#define UART_LCR_DLAB                                   0x80
+#define UART_LCR_SB                                     0x40
+#define UART_LCR_STP                                    0x20
+#define UART_LCR_EPS                                    0x10
+#define UART_LCR_PEN                                    0x08
+#define UART_LCR_STB                                    0x04
+#define UART_LCR_WLS_MASK                               0x03
+#define UART_LCR_WLS_5                                  0x00
+#define UART_LCR_WLS_6                                  0x01
+#define UART_LCR_WLS_7                                  0x02
+#define UART_LCR_WLS_8                                  0x03
+
+#define UART_MCR_LOOP                                   0x10
+
+#define UART_LSR_TEMT                                   0x40
+#define UART_LSR_THRE                                   0x20
+#define UART_LSR_BI                                     0x10
+#define UART_LSR_FE                                     0x08
+#define UART_LSR_PE                                     0x04
+#define UART_LSR_OE                                     0x02
+#define UART_LSR_DR                                     0x01
+
+#define UART_IER_ELSI                                   0x04
+#define UART_IER_ETBEI                                  0x02
+#define UART_IER_ERBFI                                  0x01
+
+#define UART_IIR_STATUS_MASK                            0x06
+#define UART_IIR_STATUS_THRE                            0x02
+#define UART_IIR_STATUS_RDR                             0x04
+#define UART_IIR_STATUS_LS                              0x06
+#define UART_IIR_NINT                                   0x01
+
+#define UART_GCTL_FFE                                   0x20
+#define UART_GCTL_FPE                                   0x10
+#define UART_GCTL_RPOLC                                 0x08
+#define UART_GCTL_TPOLC                                 0x04
+#define UART_GCTL_IREN                                  0x02
+#define UART_GCTL_UCEN                                  0x01
+
+#endif /* _uartRegs_h_ */