Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step.  It
copied header files from arbitrary locations into the build tree.  The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

* The make preinstall step itself needs time and disk space.

* Errors in header files show up in the build tree copy.  This makes it
  hard for editors to open the right file to fix the error.

* There is no clear relationship between source and build tree header
  files.  This makes an audit of the build process difficult.

* The visibility of all header files in the build tree makes it
  difficult to enforce API barriers.  For example it is discouraged to
  use BSP-specifics in the cpukit.

* An introduction of a new build system is difficult.

* Include paths specified by the -B option are system headers.  This
  may suppress warnings.

* The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step.   All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc.  Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

* cpukit/include

* cpukit/score/cpu/@RTEMS_CPU@/include

* cpukit/libnetworking

The new BSP include directories are:

* bsps/include

* bsps/@RTEMS_CPU@/include

* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed.  The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

1 files changed, 58 insertions, 0 deletions

diff --git a/bsps/bfin/include/libcpu/ppiRegs.h b/bsps/bfin/include/libcpu/ppiRegs.h
new file mode 100644
index 0000000000..0ff301aefc
--- /dev/null
+++ b/bsps/bfin/include/libcpu/ppiRegs.h
@@ -0,0 +1,58 @@
+/*  Blackfin Parallel Peripheral Interface Registers
+ *
+ *  Copyright (c) 2008 Kallisti Labs, Los Gatos, CA, USA
+ *             written by Allan Hessenflow <allanh@kallisti.com>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef _ppiRegs_h_
+#define _ppiRegs_h_
+
+
+/* register addresses */
+
+#define PPI_CONTROL_OFFSET                            0x0000
+#define PPI_STATUS_OFFSET                             0x0004
+#define PPI_COUNT_OFFSET                              0x0008
+#define PPI_DELAY_OFFSET                              0x000c
+#define PPI_FRAME_OFFSET                              0x0010
+
+
+/* register fields */
+
+#define PPI_CONTROL_POLS                              0x8000
+#define PPI_CONTROL_POLC                              0x4000
+#define PPI_CONTROL_DLEN_MASK                         0x3800
+#define PPI_CONTROL_DLEN_8                            0x0000
+#define PPI_CONTROL_DLEN_10                           0x0800
+#define PPI_CONTROL_DLEN_11                           0x1000
+#define PPI_CONTROL_DLEN_12                           0x1800
+#define PPI_CONTROL_DLEN_13                           0x2000
+#define PPI_CONTROL_DLEN_14                           0x2800
+#define PPI_CONTROL_DLEN_15                           0x3000
+#define PPI_CONTROL_DLEN_16                           0x3800
+#define PPI_CONTROL_SKIP_EO                           0x0400
+#define PPI_CONTROL_SKIP_EN                           0x0200
+#define PPI_CONTROL_PACK_EN                           0x0080
+#define PPI_CONTROL_FLD_SEL                           0x0040
+#define PPI_CONTROL_PORT_CFG_MASK                     0x0030
+#define PPI_CONTROL_PORT_CFG_SHIFT                         4
+#define PPI_CONTROL_XFR_TYPE_MASK                     0x000c
+#define PPI_CONTROL_XFR_TYPE_SHIFT                         2
+#define PPI_CONTROL_PORT_DIR                          0x0002
+#define PPI_CONTROL_PORT_EN                           0x0001
+
+#define PPI_STATUS_ERR_NCOR                           0x8000
+#define PPI_STATUS_ERR_DET                            0x4000
+#define PPI_STATUS_UNDR                               0x2000
+#define PPI_STATUS_OVR                                0x1000
+#define PPI_STATUS_FT_ERR                             0x0800
+#define PPI_STATUS_FLD                                0x0400
+#define PPI_STATUS_LT_ERR_UNDR                        0x0200
+#define PPI_STATUS_LT_ERR_OVR                         0x0100
+
+
+#endif /* _ppiRegs_h_ */