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author | Chris Johns <chrisj@rtems.org> | 2017-12-23 18:18:56 +1100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-01-25 08:45:26 +0100 |
commit | 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9 (patch) | |
tree | 44759efe9374f13200a97e96d91bd9a2b7e5ce2a /bsps/bfin/include/libcpu/interrupt.h | |
parent | MAINTAINERS: Add myself to Write After Approval. (diff) | |
download | rtems-2afb22b7e1ebcbe40373ff7e0efae7d207c655a9.tar.bz2 |
Remove make preinstall
A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.
This has at least seven problems:
* The make preinstall step itself needs time and disk space.
* Errors in header files show up in the build tree copy. This makes it
hard for editors to open the right file to fix the error.
* There is no clear relationship between source and build tree header
files. This makes an audit of the build process difficult.
* The visibility of all header files in the build tree makes it
difficult to enforce API barriers. For example it is discouraged to
use BSP-specifics in the cpukit.
* An introduction of a new build system is difficult.
* Include paths specified by the -B option are system headers. This
may suppress warnings.
* The parallel build had sporadic failures on some hosts.
This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.
The new cpukit include directories are:
* cpukit/include
* cpukit/score/cpu/@RTEMS_CPU@/include
* cpukit/libnetworking
The new BSP include directories are:
* bsps/include
* bsps/@RTEMS_CPU@/include
* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include
There are build tree include directories for generated files.
The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.
The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.
Update #3254.
Diffstat (limited to 'bsps/bfin/include/libcpu/interrupt.h')
-rw-r--r-- | bsps/bfin/include/libcpu/interrupt.h | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/bsps/bfin/include/libcpu/interrupt.h b/bsps/bfin/include/libcpu/interrupt.h new file mode 100644 index 0000000000..2c6b538bde --- /dev/null +++ b/bsps/bfin/include/libcpu/interrupt.h @@ -0,0 +1,80 @@ +/* + * RTEMS support for Blackfin interrupt controller + * + * COPYRIGHT (c) 2008 Kallisti Labs, Los Gatos, CA, USA + * written by Allan Hessenflow <allanh@kallisti.com> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef _interrupt_h_ +#define _interrupt_h_ + +/* Some rules for using this module: + + SIC_IARx registers must not be changed after calling + bfin_interrupt_init(). + + The bfin_isr structures must stick around for as long as the isr is + registered. + + For any interrupt source (SIC bit) that could be shared, it is only + safe to disable an ISR through this module if the ultimate source is + also disabled (the ultimate source must be disabled prior to disabling + it through this module, and must remain disabled until after enabling + it through this module). + + For any source that is shared with modules that cannot be disabled, + give careful thought to the control of those interrupts. + bfin_interrupt_enable_all() or bfin_interrupt_enable_global() can + be used to help solve the problems caused by that. + + + Note that this module does not provide prioritization. It is assumed + that the priorities afforded by the CEC are sufficient. If finer + grained priority control is required then this wlll need to be + redesigned. +*/ + + +#ifdef __cplusplus +extern "C" { +#endif + +/* source is the source to the SIC (the bit number in SIC_ISR). isr is + the function that will be called when the interrupt is active. */ +typedef struct bfin_isr_s { + int source; + void (*isr)(int source); + /* the following are for internal use only */ + uint32_t mask; + int vector; + struct bfin_isr_s *next; +} bfin_isr_t; + +/* If non-default mapping is desired, the BSP should set the SIC_IARx + registers prior to calling this. */ +void bfin_interrupt_init(void); + +/* ISR starts out disabled */ +void bfin_interrupt_register(bfin_isr_t *isr); +void bfin_interrupt_unregister(bfin_isr_t *isr); + +/* enable/disable specific ISR */ +void bfin_interrupt_enable(bfin_isr_t *isr, bool enable); + +/* atomically enable/disable all ISRs attached to specified source */ +void bfin_interrupt_enable_all(int source, bool enable); + +/* disable a source independently of the individual ISR enables (starts + out all enabled) */ +void bfin_interrupt_enable_global(int source, bool enable); + +#ifdef __cplusplus +} +#endif + +#endif /* _interrupt_h_ */ + |