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authorSebastian Huber <sebastian.huber@embedded-brains.de>2023-01-23 15:48:48 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2023-01-24 09:56:53 +0100
commitd36070fec8758a745a0b33f1ffa9f8192fceec51 (patch)
tree1fc77b95d0588a6288dae6f2869fce3443a88221 /bsps/arm
parentcpuuse: Use standard wording and group name (diff)
downloadrtems-d36070fec8758a745a0b33f1ffa9f8192fceec51.tar.bz2
intr: Add Interrupt Manager implementation group
The shared BSP interrupt controller support code actually implements parts of the Interrupt Manager. Update #3706.
Diffstat (limited to 'bsps/arm')
-rw-r--r--bsps/arm/altera-cyclone-v/include/bsp/irq.h2
-rw-r--r--bsps/arm/beagle/irq/irq.c2
-rw-r--r--bsps/arm/lpc176x/include/bsp/irq.h4
-rw-r--r--bsps/arm/lpc176x/irq/irq.c2
-rw-r--r--bsps/arm/lpc24xx/include/bsp/irq.h4
-rw-r--r--bsps/arm/lpc24xx/irq/irq-dispatch.c2
-rw-r--r--bsps/arm/lpc24xx/irq/irq.c2
-rw-r--r--bsps/arm/lpc32xx/include/bsp/irq.h2
8 files changed, 10 insertions, 10 deletions
diff --git a/bsps/arm/altera-cyclone-v/include/bsp/irq.h b/bsps/arm/altera-cyclone-v/include/bsp/irq.h
index 15d05ec632..d06bfa92f0 100644
--- a/bsps/arm/altera-cyclone-v/include/bsp/irq.h
+++ b/bsps/arm/altera-cyclone-v/include/bsp/irq.h
@@ -52,7 +52,7 @@ extern "C" {
*
* @ingroup RTEMSBSPsARMCycV
*
- * @ingroup bsp_interrupt
+ * @ingroup RTEMSImplClassicIntr
*
* @brief Intel Cyclone V Interrupt Support.
*
diff --git a/bsps/arm/beagle/irq/irq.c b/bsps/arm/beagle/irq/irq.c
index 29a4e391e8..0ae82aa95e 100644
--- a/bsps/arm/beagle/irq/irq.c
+++ b/bsps/arm/beagle/irq/irq.c
@@ -1,7 +1,7 @@
/**
* @file
*
- * @ingroup bsp_interrupt
+ * @ingroup RTEMSImplClassicIntr
* @ingroup arm_beagle
*
* @brief Interrupt support.
diff --git a/bsps/arm/lpc176x/include/bsp/irq.h b/bsps/arm/lpc176x/include/bsp/irq.h
index 19f8601771..8ec55e8b84 100644
--- a/bsps/arm/lpc176x/include/bsp/irq.h
+++ b/bsps/arm/lpc176x/include/bsp/irq.h
@@ -3,7 +3,7 @@
/**
* @file
*
- * @ingroup bsp_interrupt
+ * @ingroup RTEMSImplClassicIntr
*
* @brief LPC176X interrupt definitions.
*/
@@ -43,7 +43,7 @@
#endif
/**
- * @addtogroup bsp_interrupt
+ * @addtogroup RTEMSImplClassicIntr
*
* @{
*/
diff --git a/bsps/arm/lpc176x/irq/irq.c b/bsps/arm/lpc176x/irq/irq.c
index 005002a647..dad212dfeb 100644
--- a/bsps/arm/lpc176x/irq/irq.c
+++ b/bsps/arm/lpc176x/irq/irq.c
@@ -3,7 +3,7 @@
/**
* @file
*
- * @ingroup bsp_interrupt
+ * @ingroup RTEMSImplClassicIntr
*
* @brief LPC176X interrupt support.
*/
diff --git a/bsps/arm/lpc24xx/include/bsp/irq.h b/bsps/arm/lpc24xx/include/bsp/irq.h
index 524a7f1f51..ff1135e48c 100644
--- a/bsps/arm/lpc24xx/include/bsp/irq.h
+++ b/bsps/arm/lpc24xx/include/bsp/irq.h
@@ -3,7 +3,7 @@
/**
* @file
*
- * @ingroup bsp_interrupt
+ * @ingroup RTEMSImplClassicIntr
*
* @brief LPC24XX interrupt definitions.
*/
@@ -43,7 +43,7 @@
#endif
/**
- * @addtogroup bsp_interrupt
+ * @addtogroup RTEMSImplClassicIntr
*
* @{
*/
diff --git a/bsps/arm/lpc24xx/irq/irq-dispatch.c b/bsps/arm/lpc24xx/irq/irq-dispatch.c
index b244b97b8a..3f12c88c5e 100644
--- a/bsps/arm/lpc24xx/irq/irq-dispatch.c
+++ b/bsps/arm/lpc24xx/irq/irq-dispatch.c
@@ -3,7 +3,7 @@
/**
* @file
*
- * @ingroup bsp_interrupt
+ * @ingroup RTEMSImplClassicIntr
*
* @brief LPC24XX interrupt support.
*/
diff --git a/bsps/arm/lpc24xx/irq/irq.c b/bsps/arm/lpc24xx/irq/irq.c
index a92763131a..025123addb 100644
--- a/bsps/arm/lpc24xx/irq/irq.c
+++ b/bsps/arm/lpc24xx/irq/irq.c
@@ -3,7 +3,7 @@
/**
* @file
*
- * @ingroup bsp_interrupt
+ * @ingroup RTEMSImplClassicIntr
*
* @brief LPC24XX interrupt support.
*/
diff --git a/bsps/arm/lpc32xx/include/bsp/irq.h b/bsps/arm/lpc32xx/include/bsp/irq.h
index ea3c116a58..582bcb9568 100644
--- a/bsps/arm/lpc32xx/include/bsp/irq.h
+++ b/bsps/arm/lpc32xx/include/bsp/irq.h
@@ -51,7 +51,7 @@ extern "C" {
*
* @ingroup RTEMSBSPsARMLPC32XX
*
- * @ingroup bsp_interrupt
+ * @ingroup RTEMSImplClassicIntr
*
* @{
*/