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| author | Jeff Kubascik <jeff.kubascik@dornerworks.com> | 2019-04-10 19:38:54 -0400 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-04-11 07:29:08 +0200 |
| commit | 677d5167ba6605036032a32744a904947f6a0dc2 (patch) | |
| tree | f979f610ac4d8ba8632c554c1253fbe319b66391 /bsps/arm/xilinx-zynqmp/start/linkcmds.in | |
| parent | bsp/zynq-uart: Move Zynq UART driver to shared directory (diff) | |
| download | rtems-677d5167ba6605036032a32744a904947f6a0dc2.tar.bz2 | |
bsp/xilinx-zynqmp: Stub out Xilinx MPSoC BSP
Source files were copied from xilinx-zynq.
Update #3682.
Diffstat (limited to 'bsps/arm/xilinx-zynqmp/start/linkcmds.in')
| -rw-r--r-- | bsps/arm/xilinx-zynqmp/start/linkcmds.in | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/bsps/arm/xilinx-zynqmp/start/linkcmds.in b/bsps/arm/xilinx-zynqmp/start/linkcmds.in new file mode 100644 index 0000000000..b56309bf37 --- /dev/null +++ b/bsps/arm/xilinx-zynqmp/start/linkcmds.in @@ -0,0 +1,36 @@ +MEMORY { + RAM_INT_0 : ORIGIN = @ZYNQ_RAM_INT_0_ORIGIN@, LENGTH = @ZYNQ_RAM_INT_0_LENGTH@ + RAM_INT_1 : ORIGIN = @ZYNQ_RAM_INT_1_ORIGIN@, LENGTH = @ZYNQ_RAM_INT_1_LENGTH@ + RAM_MMU : ORIGIN = @ZYNQ_RAM_MMU@, LENGTH = @ZYNQ_RAM_MMU_LENGTH@ + RAM : ORIGIN = @ZYNQ_RAM_ORIGIN_AVAILABLE@, LENGTH = @ZYNQ_RAM_LENGTH_AVAILABLE@ - @ZYNQ_RAM_NOCACHE_LENGTH@ + NOCACHE : ORIGIN = @ZYNQ_RAM_ORIGIN_AVAILABLE@ + @ZYNQ_RAM_LENGTH_AVAILABLE@ - @ZYNQ_RAM_NOCACHE_LENGTH@, LENGTH = @ZYNQ_RAM_NOCACHE_LENGTH@ +} + +REGION_ALIAS ("REGION_START", RAM); +REGION_ALIAS ("REGION_VECTOR", RAM); +REGION_ALIAS ("REGION_TEXT", RAM); +REGION_ALIAS ("REGION_TEXT_LOAD", RAM); +REGION_ALIAS ("REGION_RODATA", RAM); +REGION_ALIAS ("REGION_RODATA_LOAD", RAM); +REGION_ALIAS ("REGION_DATA", RAM); +REGION_ALIAS ("REGION_DATA_LOAD", RAM); +REGION_ALIAS ("REGION_FAST_TEXT", RAM); +REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM); +REGION_ALIAS ("REGION_FAST_DATA", RAM); +REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM); +REGION_ALIAS ("REGION_BSS", RAM); +REGION_ALIAS ("REGION_WORK", RAM); +REGION_ALIAS ("REGION_STACK", RAM); +REGION_ALIAS ("REGION_NOCACHE", NOCACHE); +REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE); + +bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024; + +bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M; + +bsp_vector_table_in_start_section = 1; + +bsp_translation_table_base = ORIGIN (RAM_MMU); +bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU); + +INCLUDE linkcmds.armv4 |