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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2024-04-10 08:20:23 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2024-04-11 17:01:32 +0200 |
| commit | 226d51ac2d9d031f5d1216085f7b998ea166e74f (patch) | |
| tree | a5a9bcb2c9d56059f29b275e133d5b58103be659 /bsps/arm/xilinx-zynqmp-rpu | |
| parent | bsps/xil-ttc: Add XIL_FATAL_TTC_IRQ_INSTALL (diff) | |
| download | rtems-226d51ac2d9d031f5d1216085f7b998ea166e74f.tar.bz2 | |
bsps/xil-ttc: Improve clock driver
Make the clock driver parameters configurable. Use the maximum counter
frequency to get the best time resolution. Decouple the CPU counter from the
timecounter. Make the tick catch up handling more robust. Add a validation
test for the tick catch up.
Diffstat (limited to 'bsps/arm/xilinx-zynqmp-rpu')
| -rw-r--r-- | bsps/arm/xilinx-zynqmp-rpu/include/bsp.h | 3 | ||||
| -rw-r--r-- | bsps/arm/xilinx-zynqmp-rpu/include/bsp/irq.h | 1 |
2 files changed, 0 insertions, 4 deletions
diff --git a/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h b/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h index d80cedbd0d..70ad4f3c57 100644 --- a/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h +++ b/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h @@ -59,7 +59,6 @@ #include <bsp/default-initial-extension.h> #include <bsp/start.h> -#include <peripheral_maps/xilinx_zynqmp.h> #include <dev/serial/zynq-uart-zynqmp.h> @@ -76,8 +75,6 @@ extern "C" { #define BSP_ARM_A9MPCORE_GT_BASE 0 -#define BSP_SELECTED_TTC_ADDR ZYNQMP_TTC0 - /** * @brief Zynq UltraScale+ MPSoC specific set up of the MMU. * diff --git a/bsps/arm/xilinx-zynqmp-rpu/include/bsp/irq.h b/bsps/arm/xilinx-zynqmp-rpu/include/bsp/irq.h index a65e5404f0..51aa613cdd 100644 --- a/bsps/arm/xilinx-zynqmp-rpu/include/bsp/irq.h +++ b/bsps/arm/xilinx-zynqmp-rpu/include/bsp/irq.h @@ -51,7 +51,6 @@ extern "C" { #endif /* __cplusplus */ -#define BSP_SELECTED_TTC_IRQ ZYNQMP_IRQ_TTC_0_0 #define BSP_INTERRUPT_VECTOR_COUNT 188 /** @} */ |