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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-12-21 15:16:48 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2024-01-15 10:33:33 +0100 |
| commit | 75dd82407980a227a39aef70b383090778361f70 (patch) | |
| tree | 0c2e6353c8656361858cb66858ebdc8c239ae4d3 /bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h | |
| parent | bsp/tms570: Conditionalize TMS570LS3137 errata (diff) | |
| download | rtems-75dd82407980a227a39aef70b383090778361f70.tar.bz2 | |
bsp/tms570: Add errata SSWF021#45 handling
Update #4982.
Diffstat (limited to 'bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h')
| -rw-r--r-- | bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h b/bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h index f5d35719fa..12edca3eb1 100644 --- a/bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h +++ b/bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h @@ -51,6 +51,12 @@ #include <bsp/utility.h> +enum tms570_dcc1_cnt0_clksrc { + DCC1_CNT0_HF_LPO = 0x5U, /**< Alias for DCC1 CNT 0 CLOCK SOURCE 0*/ + DCC1_CNT0_TCK = 0xAU, /**< Alias for DCC1 CNT 0 CLOCK SOURCE 1*/ + DCC1_CNT0_OSCIN = 0xFU, /**< Alias for DCC1 CNT 0 CLOCK SOURCE 2*/ +}; + typedef struct{ uint32_t GCTRL; /*DCC Global Control Register*/ uint32_t REV; /*DCC Revision Id Register*/ |