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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-11-26 08:13:52 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-11-26 08:21:46 +0100 |
| commit | fe58f6ce4bf1ff5e92d64b9fee0cb46b6ac06e64 (patch) | |
| tree | 8b7d53b172d70fd9f78f400515b73e1d2c4f8e1e /bsps/arm/stm32h7/include/stm32h7xx_ll_bus.h | |
| parent | spec/a53: Set conditionally failing test state (diff) | |
| download | rtems-fe58f6ce4bf1ff5e92d64b9fee0cb46b6ac06e64.tar.bz2 | |
bsp/stm32h7: Add and use BSP Doxygen group
Update #3910.
Diffstat (limited to 'bsps/arm/stm32h7/include/stm32h7xx_ll_bus.h')
| -rw-r--r-- | bsps/arm/stm32h7/include/stm32h7xx_ll_bus.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_ll_bus.h b/bsps/arm/stm32h7/include/stm32h7xx_ll_bus.h index 6ee1528aab..5a83e49236 100644 --- a/bsps/arm/stm32h7/include/stm32h7xx_ll_bus.h +++ b/bsps/arm/stm32h7/include/stm32h7xx_ll_bus.h @@ -54,6 +54,7 @@ extern "C" { #if defined(RCC)
/** @defgroup BUS_LL BUS
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -67,10 +68,12 @@ extern "C" { /* Exported constants --------------------------------------------------------*/
/** @defgroup BUS_LL_Exported_Constants BUS Exported Constants
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
/** @defgroup BUS_LL_EC_AHB3_GRP1_PERIPH AHB3 GRP1 PERIPH
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define LL_AHB3_GRP1_PERIPH_MDMA RCC_AHB3ENR_MDMAEN
@@ -121,6 +124,7 @@ extern "C" { /** @defgroup BUS_LL_EC_AHB1_GRP1_PERIPH AHB1 GRP1 PERIPH
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHB1ENR_DMA1EN
@@ -149,6 +153,7 @@ extern "C" { /** @defgroup BUS_LL_EC_AHB2_GRP1_PERIPH AHB2 GRP1 PERIPH
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define LL_AHB2_GRP1_PERIPH_DCMI RCC_AHB2ENR_DCMIEN
@@ -187,6 +192,7 @@ extern "C" { /** @defgroup BUS_LL_EC_AHB4_GRP1_PERIPH AHB4 GRP1 PERIPH
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define LL_AHB4_GRP1_PERIPH_GPIOA RCC_AHB4ENR_GPIOAEN
@@ -230,6 +236,7 @@ extern "C" { /** @defgroup BUS_LL_EC_APB3_GRP1_PERIPH APB3 GRP1 PERIPH
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define LL_APB3_GRP1_PERIPH_LTDC RCC_APB3ENR_LTDCEN
@@ -246,6 +253,7 @@ extern "C" { /** @defgroup BUS_LL_EC_APB1_GRP1_PERIPH APB1 GRP1 PERIPH
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1LENR_TIM2EN
@@ -281,6 +289,7 @@ extern "C" { /** @defgroup BUS_LL_EC_APB1_GRP2_PERIPH APB1 GRP2 PERIPH
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define LL_APB1_GRP2_PERIPH_CRS RCC_APB1HENR_CRSEN
@@ -294,6 +303,7 @@ extern "C" { /** @defgroup BUS_LL_EC_APB2_GRP1_PERIPH APB2 GRP1 PERIPH
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define LL_APB2_GRP1_PERIPH_TIM1 RCC_APB2ENR_TIM1EN
@@ -327,6 +337,7 @@ extern "C" { /** @defgroup BUS_LL_EC_APB4_GRP1_PERIPH APB4 GRP1 PERIPH
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define LL_APB4_GRP1_PERIPH_SYSCFG RCC_APB4ENR_SYSCFGEN
@@ -361,6 +372,7 @@ extern "C" { */
/** @defgroup BUS_LL_EC_CLKAM_PERIPH CLKAM PERIPH
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#if defined(RCC_D3AMR_BDMAAMEN)
@@ -453,6 +465,7 @@ extern "C" { #if defined(RCC_CKGAENR_AXICKG)
/** @defgroup BUS_LL_EC_CKGA_PERIPH CKGA (AXI Clocks Gating) PERIPH
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define LL_CKGA_PERIPH_AXI RCC_CKGAENR_AXICKG
@@ -486,10 +499,12 @@ extern "C" { /* Exported functions --------------------------------------------------------*/
/** @defgroup BUS_LL_Exported_Functions BUS Exported Functions
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
/** @defgroup BUS_LL_EF_AHB3 AHB3
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -806,6 +821,7 @@ __STATIC_INLINE void LL_AHB3_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_AHB1 AHB1
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -1055,6 +1071,7 @@ __STATIC_INLINE void LL_AHB1_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_AHB2 AHB2
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -1278,6 +1295,7 @@ __STATIC_INLINE void LL_AHB2_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_AHB4 AHB4
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -1600,6 +1618,7 @@ __STATIC_INLINE void LL_AHB4_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_APB3 APB3
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -1738,6 +1757,7 @@ __STATIC_INLINE void LL_APB3_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_APB1 APB1
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -2328,6 +2348,7 @@ __STATIC_INLINE void LL_APB1_GRP2_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_APB2 APB2
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -2662,6 +2683,7 @@ __STATIC_INLINE void LL_APB2_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_APB4 APB4
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -2968,6 +2990,7 @@ __STATIC_INLINE void LL_APB4_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_CLKAM
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -3133,6 +3156,7 @@ __STATIC_INLINE void LL_CKGA_Disable(uint32_t Periphs) #if defined(DUAL_CORE)
/** @defgroup BUS_LL_EF_AHB3 AHB3
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -3347,6 +3371,7 @@ __STATIC_INLINE void LL_C1_AHB3_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_AHB1 AHB1
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -3543,6 +3568,7 @@ __STATIC_INLINE void LL_C1_AHB1_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_AHB2 AHB2
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -3715,6 +3741,7 @@ __STATIC_INLINE void LL_C1_AHB2_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_AHB4 AHB4
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -3953,6 +3980,7 @@ __STATIC_INLINE void LL_C1_AHB4_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_APB3 APB3
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -4059,6 +4087,7 @@ __STATIC_INLINE void LL_C1_APB3_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_APB1 APB1
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -4493,6 +4522,7 @@ __STATIC_INLINE void LL_C1_APB1_GRP2_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_APB2 APB2
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -4736,6 +4766,7 @@ __STATIC_INLINE void LL_C1_APB2_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_APB4 APB4
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -4953,6 +4984,7 @@ __STATIC_INLINE void LL_C1_APB4_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_AHB3 AHB3
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -5127,6 +5159,7 @@ __STATIC_INLINE void LL_C2_AHB3_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_AHB1 AHB1
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -5303,6 +5336,7 @@ __STATIC_INLINE void LL_C2_AHB1_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_AHB2 AHB2
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -5441,6 +5475,7 @@ __STATIC_INLINE void LL_C2_AHB2_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_AHB4 AHB4
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -5679,6 +5714,7 @@ __STATIC_INLINE void LL_C2_AHB4_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_APB3 APB3
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -5785,6 +5821,7 @@ __STATIC_INLINE void LL_C2_APB3_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_APB1 APB1
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -6209,6 +6246,7 @@ __STATIC_INLINE void LL_C2_APB1_GRP2_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_APB2 APB2
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -6425,6 +6463,7 @@ __STATIC_INLINE void LL_C2_APB2_GRP1_DisableClockSleep(uint32_t Periphs) */
/** @defgroup BUS_LL_EF_APB4 APB4
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
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