bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

6 files changed, 219 insertions, 0 deletions

diff --git a/bsps/arm/smdk2410/start/bsp_specs b/bsps/arm/smdk2410/start/bsp_specs
new file mode 100644
index 0000000000..47dd31d46b
--- /dev/null
+++ b/bsps/arm/smdk2410/start/bsp_specs
@@ -0,0 +1,9 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{!nostdlib: %{qrtems: crti.o%s crtbegin.o%s}}
+
+*endfile:
+%{!qrtems: %(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s}
diff --git a/bsps/arm/smdk2410/start/bspidle.c b/bsps/arm/smdk2410/start/bspidle.c
new file mode 100644
index 0000000000..0f96f1f09b
--- /dev/null
+++ b/bsps/arm/smdk2410/start/bspidle.c
@@ -0,0 +1,23 @@
+/*
+ *  BSP specific Idle thread
+ */
+
+/*
+ *  Copyright (c) 2000 Canon Research Centre France SA.
+ *  Emmanuel Raguet, mailto:raguet@crf.canon.fr
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+
+void *bsp_idle_thread(uintptr_t ignored)
+{
+  while(1) {
+    __asm__ volatile ("MCR p15,0,r0,c7,c0,4     \n");
+  }
+  return NULL;
+}
+
diff --git a/bsps/arm/smdk2410/start/bspreset.c b/bsps/arm/smdk2410/start/bspreset.c
new file mode 100644
index 0000000000..365a22f14f
--- /dev/null
+++ b/bsps/arm/smdk2410/start/bspreset.c
@@ -0,0 +1,51 @@
+/*
+ *  Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/bootcard.h>
+
+void bsp_reset(void)
+{
+#if ON_SKYEYE == 1
+  #define SKYEYE_MAGIC_ADDRESS (*(volatile unsigned int *)(0xb0000000))
+
+  SKYEYE_MAGIC_ADDRESS = 0xff;
+#else
+  /* TODO: This code was initially copied from the gp32 BSP. That BSP has
+   * been obsoleted and removed but this code may still benefit from being
+   * in a shared place.
+   */
+  rtems_interrupt_level level;
+
+  (void) level;
+  rtems_interrupt_disable(level);
+  /* disable mmu, invalide i-cache and call swi #4 */
+  __asm__ volatile(""
+    "mrc    p15,0,r0,c1,c0,0  \n"
+    "bic    r0,r0,#1          \n"
+    "mcr    p15,0,r0,c1,c0,0  \n"
+    "nop                      \n"
+    "nop                      \n"
+    "nop                      \n"
+    "nop                      \n"
+    "nop                      \n"
+    "mov    r0,#0             \n"
+    "MCR    p15,0,r0,c7,c5,0  \n"
+    "nop                      \n"
+    "nop                      \n"
+    "nop                      \n"
+    "nop                      \n"
+    "nop                      \n"
+    "swi    #4                "
+    :
+    :
+    : "r0"
+  );
+  /* we should be back in bios now */
+#endif
+}
diff --git a/bsps/arm/smdk2410/start/bspstart.c b/bsps/arm/smdk2410/start/bspstart.c
new file mode 100644
index 0000000000..c70de1f291
--- /dev/null
+++ b/bsps/arm/smdk2410/start/bspstart.c
@@ -0,0 +1,83 @@
+/*
+ * This file contains the ARM BSP startup package. It includes application,
+ * board, and monitor specific initialization and configuration. The generic CPU
+ * dependent initialization has been performed before this routine is invoked.
+ */
+
+/*
+ *  Copyright (c) 2000 Canon Research Centre France SA.
+ *  Emmanuel Raguet, mailto:raguet@crf.canon.fr
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/irq-generic.h>
+#include <rtems/bspIo.h>
+#include <s3c24xx.h>
+
+/*
+ *  BSP Specific Initialization in C
+ */
+static void bsp_start_default( void )
+{
+  uint32_t cr;
+  uint32_t pend,last;
+  uint32_t REFCNT;
+  int i;
+
+  /* stop RTC */
+  #ifdef CPU_S3C2400
+    rTICINT = 0x0;
+  #else
+    rTICNT = 0x0;
+  #endif
+  /* stop watchdog,ADC and timers */
+  rWTCON = 0x0;
+  rTCON = 0x0;
+  rADCCON = 0x0;
+
+  /* disable interrupts */
+  rINTMOD = 0x0;
+  rINTMSK = BIT_ALLMSK; /* unmasked by drivers */
+
+  last = 0;
+  for(i=0; i<4; i++) {
+    pend = rSRCPND;
+    if(pend == 0 || pend == last)
+      break;
+    rSRCPND = pend;
+    rINTPND = pend;
+    last    = pend;
+  }
+
+  /* setup clocks */
+  rCLKDIVN = M_CLKDIVN;
+  rMPLLCON = ((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV);
+  /* setup rREFRESH
+   * period = 15.6 us, HCLK=66Mhz, (2048+1-15.6*66)
+   */
+  REFCNT   = 2048+1-(15.6*get_HCLK()/1000000);
+  rREFRESH = ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT);
+
+  /* set prescaler for timers 2,3,4 to 16(15+1) */
+  cr = rTCFG0 & 0xFFFF00FF;
+  rTCFG0 = (cr | (15<<8));
+
+  /* set prescaler for timers 0,1 to 1(0+1) */
+  cr = rTCFG0 & 0xFFFFFF00;
+  rTCFG0 = (cr | (0<<0));
+
+  /*
+   * Init rtems interrupt management
+   */
+  bsp_interrupt_initialize();
+}
+
+/*
+ *  By making this a weak alias for bsp_start_default, a brave soul
+ *  can override the actual bsp_start routine used.
+ */
+void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default")));
diff --git a/bsps/arm/smdk2410/start/linkcmds b/bsps/arm/smdk2410/start/linkcmds
new file mode 100644
index 0000000000..9cd68886a7
--- /dev/null
+++ b/bsps/arm/smdk2410/start/linkcmds
@@ -0,0 +1,26 @@
+MEMORY {
+	SDRAM_MMU : ORIGIN = 0x30000000, LENGTH = 16k
+	SDRAM : ORIGIN = 0x30004000, LENGTH = 64M - 16k
+}
+
+REGION_ALIAS ("REGION_START", SDRAM);
+REGION_ALIAS ("REGION_VECTOR", SDRAM);
+REGION_ALIAS ("REGION_TEXT", SDRAM);
+REGION_ALIAS ("REGION_TEXT_LOAD", SDRAM);
+REGION_ALIAS ("REGION_RODATA", SDRAM);
+REGION_ALIAS ("REGION_RODATA_LOAD", SDRAM);
+REGION_ALIAS ("REGION_DATA", SDRAM);
+REGION_ALIAS ("REGION_DATA_LOAD", SDRAM);
+REGION_ALIAS ("REGION_FAST_TEXT", SDRAM);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", SDRAM);
+REGION_ALIAS ("REGION_FAST_DATA", SDRAM);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", SDRAM);
+REGION_ALIAS ("REGION_BSS", SDRAM);
+REGION_ALIAS ("REGION_WORK", SDRAM);
+REGION_ALIAS ("REGION_STACK", SDRAM);
+REGION_ALIAS ("REGION_NOCACHE", SDRAM);
+REGION_ALIAS ("REGION_NOCACHE_LOAD", SDRAM);
+
+_ttbl_base = ORIGIN (SDRAM_MMU);
+
+INCLUDE linkcmds.armv4
diff --git a/bsps/arm/smdk2410/start/memmap.c b/bsps/arm/smdk2410/start/memmap.c
new file mode 100644
index 0000000000..21ba35b21b
--- /dev/null
+++ b/bsps/arm/smdk2410/start/memmap.c
@@ -0,0 +1,27 @@
+/*
+ *  SMDK2410 Memory Map
+ */
+
+/*
+ *  Copyright (c) 2004 by Cogent Computer Systems
+ *  Written by Jay Monkman <jtm@lopingdog.com>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+#include <rtems.h>
+#include <libcpu/mmu.h>
+
+/* Remember, the ARM920 has 64 TLBs. If you have more 1MB sections than
+ * that, you'll have TLB lookups, which could hurt performance.
+ */
+mmu_sect_map_t mem_map[] = {
+/*  <phys addr>  <virt addr> <size> <flags> */
+    {0x30000000, 0x00000000,   1,   MMU_CACHE_NONE},     /* SDRAM for vectors */
+    {0x30000000, 0x30000000,   32,  MMU_CACHE_WTHROUGH}, /* SDRAM W cache */
+    {0x32000000, 0x32000000,   32,  MMU_CACHE_NONE},     /* SDRAM W/O cache */
+    {0x48000000, 0x48000000,   256, MMU_CACHE_NONE},     /* Internals Regs - */
+    {0x50000000, 0x50000000,   256, MMU_CACHE_NONE},     /* Internal Regs - */
+    {0x00000000, 0x00000000,   0,    0}                  /* The end */
+};