bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

6 files changed, 868 insertions, 0 deletions

diff --git a/bsps/arm/shared/start/bsp-start-in-hyp-support.S b/bsps/arm/shared/start/bsp-start-in-hyp-support.S
new file mode 100644
index 0000000000..b608c59fa8
--- /dev/null
+++ b/bsps/arm/shared/start/bsp-start-in-hyp-support.S
@@ -0,0 +1,77 @@
+/**
+ * @file
+ *
+ * @brief Boot and system start code.
+ */
+
+ /*
+ * Copyright (c) 2016 Pavel Pisa <pisa@cmp.felk.cvut.cz>
+ *
+ * Czech Technical University in Prague
+ * Zikova 1903/4
+ * 166 36 Praha 6
+ * Czech Republic
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems/asm.h>
+#include <rtems/system.h>
+#include <rtems/score/cpu.h>
+
+#include <bspopts.h>
+#include <bsp/irq.h>
+#include <bsp/linker-symbols.h>
+
+	.extern	bsp_start_hyp_vector_table_begin
+	.globl	bsp_start_arm_drop_hyp_mode
+	.globl	bsp_arm_drop_hyp_mode_only
+
+.arm
+
+/*
+ * The routine is called from startup code and it should
+ * preserve all registers except r2 and r3. r0 can be used
+ * as pass though argument in some cases, a1 is used for
+ * CPU stack offset during startup and r4 to r6 to preserve
+ * booloader arguments
+ */
+
+bsp_start_arm_drop_hyp_mode:
+	ldr	r2, bsp_start_hyp_vector_table_begin_addr
+	mcr	p15, 4, r2, c12, c0, 0
+
+	mov	r2, #0
+	mcr	p15, 4, r2, c1, c1, 0
+	mcr	p15, 4, r2, c1, c1, 2
+	mcr	p15, 4, r2, c1, c1, 3
+/*
+ * HSCTLR.TE
+ * optional start of hypervisor handlers in Thumb mode
+ *	orr	r0, #(1 << 30)
+ */
+	mcr	p15, 4, r2, c1, c0, 0	/* HSCTLR */
+	mrc	p15, 4, r2, c1, c1, 1	/* HDCR */
+	and	r2, #0x1f		/* Preserve HPMN */
+	mcr	p15, 4, r2, c1, c1, 1	/* HDCR */
+
+bsp_arm_drop_hyp_mode_only:
+	/* Prepare SVC mode for eret */
+	mrs	r2, cpsr
+	bic	r2, r2, #ARM_PSR_M_MASK
+	orr	r2, r2, #ARM_PSR_M_SVC
+	msr	spsr_cxsf, r2
+
+	adr	r2, 1f
+	.inst 0xe12ef302	/* msr ELR_hyp, r2 */
+	mov	r2, sp
+	mov	r3, lr
+	.inst 0xe160006e	/* eret */
+1:	mov	sp, r2
+	mov	lr, r3
+	bx	lr
+
+bsp_start_hyp_vector_table_begin_addr:
+	.word	bsp_start_hyp_vector_table_begin
diff --git a/bsps/arm/shared/start/bsp-start-init-registers.S b/bsps/arm/shared/start/bsp-start-init-registers.S
new file mode 100644
index 0000000000..2e308ce5de
--- /dev/null
+++ b/bsps/arm/shared/start/bsp-start-init-registers.S
@@ -0,0 +1,105 @@
+/**
+ * @file bsp-start-init-registers.S
+ *
+ * @brief ARM register initialization routines.
+ */
+
+/*
+ * Copyright (c) 2015 Taller Technologies.  All rights reserved.
+ *
+ * @author Martin Galvan <martin.galvan@tallertechnologies.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+/*
+ * These routines initialize the core and VFP registers of ARM CPUs.
+ * This is necessary for boards that operate in a 1oo1D fashion,
+ * such as the TMS570.
+ */
+
+#include <rtems/asm.h>
+
+.section .text
+.syntax unified
+.cpu cortex-r4
+.arm
+
+/* Initialization of the ARM core registers. */
+FUNCTION_ENTRY(bsp_start_init_registers_core)
+	mov r0, #0
+	mov r1, #0
+	mov r2, #0
+	mov r3, #0
+	mov r4, #0
+	mov r5, #0
+	mov r6, #0
+	mov r7, #0
+	mov r8, #0
+	mov r9, #0
+	mov r10, #0
+	mov r11, #0
+	mov r12, #0
+	mov r13, #0
+
+	bx lr
+FUNCTION_END(bsp_start_init_registers_core)
+
+/* Initialization of the FIQ mode banked registers. */
+FUNCTION_ENTRY(bsp_start_init_registers_banked_fiq)
+	mov r8, #0
+	mov r9, #0
+	mov r10, #0
+	mov r11, #0
+	mov r12, #0
+
+	bx lr
+FUNCTION_END(bsp_start_init_registers_banked_fiq)
+
+#ifdef ARM_MULTILIB_VFP
+
+/* Initialization of the FPU registers. */
+FUNCTION_ENTRY(bsp_start_init_registers_vfp)
+	mov r0, #0
+	vmov d0, r0, r0
+	vmov d1, r0, r0
+	vmov d2, r0, r0
+	vmov d3, r0, r0
+	vmov d4, r0, r0
+	vmov d5, r0, r0
+	vmov d6, r0, r0
+	vmov d7, r0, r0
+	vmov d8, r0, r0
+	vmov d9, r0, r0
+	vmov d10, r0, r0
+	vmov d11, r0, r0
+	vmov d12, r0, r0
+	vmov d13, r0, r0
+	vmov d14, r0, r0
+	vmov d15, r0, r0
+
+#ifdef ARM_MULTILIB_VFP_D32
+	vmov d16, r0, r0
+	vmov d17, r0, r0
+	vmov d18, r0, r0
+	vmov d19, r0, r0
+	vmov d20, r0, r0
+	vmov d21, r0, r0
+	vmov d22, r0, r0
+	vmov d23, r0, r0
+	vmov d24, r0, r0
+	vmov d25, r0, r0
+	vmov d26, r0, r0
+	vmov d27, r0, r0
+	vmov d28, r0, r0
+	vmov d29, r0, r0
+	vmov d30, r0, r0
+	vmov d31, r0, r0
+#endif /* ARM_MULTILIB_VFP_D32 */
+
+	bx lr
+FUNCTION_END(bsp_start_init_registers_vfp)
+
+#endif /* ARM_MULTILIB_VFP */
diff --git a/bsps/arm/shared/start/bsp-start-memcpy.S b/bsps/arm/shared/start/bsp-start-memcpy.S
new file mode 100644
index 0000000000..cb97eb47f8
--- /dev/null
+++ b/bsps/arm/shared/start/bsp-start-memcpy.S
@@ -0,0 +1,147 @@
+/**
+ * @file
+ *
+ * @brief bsp_start_memcpy() implementation.
+ */
+
+/*
+ * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems/asm.h>
+#include <rtems/system.h>
+#include <rtems/score/cpu.h>
+
+	.section	".bsp_start_text", "ax"
+
+#if defined(ARM_MULTILIB_ARCH_V4)
+
+DEFINE_FUNCTION_ARM(bsp_start_memcpy)
+
+	/* Return if dest == src */
+	cmp	r0, r1
+#ifdef __thumb__
+	bxeq	lr
+#else
+	moveq	pc, lr
+#endif
+
+	/* Return if length is zero */
+	mov	r3, #0
+	cmp	r3, r2
+#ifdef __thumb__
+	bxeq	lr
+#else
+	moveq	pc, lr
+#endif
+
+	/* Save non-volatile registers */
+	push	{r4-r8, lr}
+
+	/* Copy worker routine to stack */
+	adr	ip, worker_begin
+	ldm	ip, {r3-r8}
+	push	{r3-r8}
+
+	/* Execute worker routine */
+	mov	r3, #0
+	mov	ip, sp
+	mov	lr, pc
+#ifdef __thumb__
+	bx	ip
+#else
+	mov	pc, ip
+#endif
+
+	/* Restore stack and non-volatile registers */
+	add	sp, sp, #24
+	pop	{r4-r8, lr}
+
+	/* Return */
+#ifdef __thumb__
+	bx	lr
+#else
+	mov	pc, lr
+#endif
+
+worker_begin:
+
+	/* Worker routine */
+	ldr	ip, [r1, r3]
+	str	ip, [r0, r3]
+	add	r3, r3, #4
+	cmp	r3, r2
+	bcc	worker_begin
+#ifdef __thumb__
+	bx	lr
+#else
+	mov	pc, lr
+#endif
+
+#elif defined(ARM_MULTILIB_ARCH_V7M)
+
+	.syntax	unified
+
+	.align	2
+	.globl	bsp_start_memcpy
+	.thumb
+	.thumb_func
+	.type	bsp_start_memcpy, %function
+
+bsp_start_memcpy:
+
+	/* Return if dest == src */
+	cmp	r0, r1
+	beq	return
+
+	/* Return if length is zero */
+	movs	r3, #0
+	cmp	r3, r2
+	beq	return
+
+	/* Save non-volatile registers */
+	push	{r4-r7, lr}
+
+	/* Copy worker routine to stack */
+	adr	r3, worker_begin
+	ldm	r3, {r4-r7}
+	push	{r4-r7}
+
+	/* Execute worker routine */
+	add	r3, sp, #1
+	adds	r2, r2, #3
+	bic	r2, r2, #3
+	adds	r2, r2, r1
+	blx	r3
+
+	/* Restore stack and non-volatile registers */
+	add	sp, sp, #16
+	pop	{r4-r7, lr}
+
+return:
+
+	/* Return */
+	bx	lr
+
+	.align	2
+
+worker_begin:
+
+	/* Worker routine */
+	ldr	r3, [r1], #4
+	cmp	r2, r1
+	str	r3, [r0], #4
+	bne	worker_begin
+	bx	lr
+
+#endif /* defined(ARM_MULTILIB_ARCH_V7M) */
diff --git a/bsps/arm/shared/start/linkcmds.armv4 b/bsps/arm/shared/start/linkcmds.armv4
new file mode 100644
index 0000000000..33e419f5be
--- /dev/null
+++ b/bsps/arm/shared/start/linkcmds.armv4
@@ -0,0 +1,26 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_linker
+ *
+ * @brief Linker command file for ARMv4T architecture.
+ */
+
+/*
+ * Copyright (c) 2010-2014 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 1024;
+bsp_stack_irq_size = ALIGN (bsp_stack_irq_size, bsp_stack_align);
+
+INCLUDE linkcmds.base
diff --git a/bsps/arm/shared/start/linkcmds.armv7m b/bsps/arm/shared/start/linkcmds.armv7m
new file mode 100644
index 0000000000..f0fb2cde1f
--- /dev/null
+++ b/bsps/arm/shared/start/linkcmds.armv7m
@@ -0,0 +1,26 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_linker
+ *
+ * @brief Linker command file for ARMv7 architecture.
+ */
+
+/*
+ * Copyright (c) 2010 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 4096;
+bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align);
+
+INCLUDE linkcmds.base
diff --git a/bsps/arm/shared/start/linkcmds.base b/bsps/arm/shared/start/linkcmds.base
new file mode 100644
index 0000000000..c6314547eb
--- /dev/null
+++ b/bsps/arm/shared/start/linkcmds.base
@@ -0,0 +1,487 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_linker
+ *
+ * @brief Linker command base file.
+ */
+
+/*
+ * Copyright (c) 2008, 2016 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+
+OUTPUT_ARCH (arm)
+
+ENTRY (_start)
+STARTUP (start.o)
+
+/*
+ * Global symbols that may be defined externally
+ */
+
+bsp_vector_table_size = DEFINED (bsp_vector_table_size) ? bsp_vector_table_size : 64;
+
+bsp_section_xbarrier_align = DEFINED (bsp_section_xbarrier_align) ? bsp_section_xbarrier_align : 1;
+bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1;
+bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1;
+
+bsp_stack_align = DEFINED (bsp_stack_align) ? bsp_stack_align : 8;
+
+bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 0;
+bsp_stack_abt_size = ALIGN (bsp_stack_abt_size, bsp_stack_align);
+
+bsp_stack_fiq_size = DEFINED (bsp_stack_fiq_size) ? bsp_stack_fiq_size : 0;
+bsp_stack_fiq_size = ALIGN (bsp_stack_fiq_size, bsp_stack_align);
+
+bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 0;
+bsp_stack_irq_size = ALIGN (bsp_stack_irq_size, bsp_stack_align);
+
+bsp_stack_svc_size = DEFINED (bsp_stack_svc_size) ? bsp_stack_svc_size : 0;
+bsp_stack_svc_size = ALIGN (bsp_stack_svc_size, bsp_stack_align);
+
+bsp_stack_und_size = DEFINED (bsp_stack_und_size) ? bsp_stack_und_size : 0;
+bsp_stack_und_size = ALIGN (bsp_stack_und_size, bsp_stack_align);
+
+bsp_stack_hyp_size = DEFINED (bsp_stack_hyp_size) ? bsp_stack_hyp_size : 0;
+bsp_stack_hyp_size = ALIGN (bsp_stack_hyp_size, bsp_stack_align);
+
+bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 0;
+bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align);
+
+bsp_stack_all_size = bsp_stack_abt_size + bsp_stack_fiq_size + bsp_stack_irq_size + bsp_stack_svc_size + bsp_stack_und_size + bsp_stack_hyp_size + bsp_stack_main_size;
+
+bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : 1;
+
+MEMORY {
+	UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0
+}
+
+SECTIONS {
+	.start : ALIGN_WITH_INPUT {
+		bsp_section_start_begin = .;
+		KEEP (*(.bsp_start_text))
+		KEEP (*(.bsp_start_data))
+		bsp_section_start_end = .;
+	} > REGION_START AT > REGION_START
+	bsp_section_start_size = bsp_section_start_end - bsp_section_start_begin;
+
+	.xbarrier : ALIGN_WITH_INPUT {
+		. = ALIGN (bsp_section_xbarrier_align);
+	} > REGION_VECTOR AT > REGION_VECTOR
+
+	.text : ALIGN_WITH_INPUT {
+		bsp_section_text_begin = .;
+		*(.text.unlikely .text.*_unlikely)
+		*(.text .stub .text.* .gnu.linkonce.t.*)
+		/* .gnu.warning sections are handled specially by elf32.em.  */
+		*(.gnu.warning)
+		*(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
+	} > REGION_TEXT AT > REGION_TEXT_LOAD
+	.init : ALIGN_WITH_INPUT {
+		KEEP (*(.init))
+	} > REGION_TEXT AT > REGION_TEXT_LOAD
+	.fini : ALIGN_WITH_INPUT {
+		KEEP (*(.fini))
+		bsp_section_text_end = .;
+	} > REGION_TEXT AT > REGION_TEXT_LOAD
+	bsp_section_text_size = bsp_section_text_end - bsp_section_text_begin;
+	bsp_section_text_load_begin = LOADADDR (.text);
+	bsp_section_text_load_end = bsp_section_text_load_begin + bsp_section_text_size;
+
+	.robarrier : ALIGN_WITH_INPUT {
+		. = ALIGN (bsp_section_robarrier_align);
+	} > REGION_RODATA AT > REGION_RODATA
+
+	.rodata : ALIGN_WITH_INPUT {
+		bsp_section_rodata_begin = .;
+		*(.rodata .rodata.* .gnu.linkonce.r.*)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.rodata1 : ALIGN_WITH_INPUT {
+		*(.rodata1)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.ARM.extab : ALIGN_WITH_INPUT {
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.ARM.exidx : ALIGN_WITH_INPUT {
+		__exidx_start = .;
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+		__exidx_end = .;
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.eh_frame : ALIGN_WITH_INPUT {
+		KEEP (*(.eh_frame))
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.gcc_except_table : ALIGN_WITH_INPUT {
+		*(.gcc_except_table .gcc_except_table.*)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.tdata : ALIGN_WITH_INPUT {
+		_TLS_Data_begin = .;
+		*(.tdata .tdata.* .gnu.linkonce.td.*)
+		_TLS_Data_end = .;
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.tbss : ALIGN_WITH_INPUT {
+		_TLS_BSS_begin = .;
+		*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
+		_TLS_BSS_end = .;
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
+	_TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
+	_TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
+	_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
+	_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
+	_TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
+	.preinit_array : ALIGN_WITH_INPUT {
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP (*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.init_array : ALIGN_WITH_INPUT {
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP (*(SORT(.init_array.*)))
+		KEEP (*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.fini_array : ALIGN_WITH_INPUT {
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP (*(.fini_array))
+		KEEP (*(SORT(.fini_array.*)))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.ctors : ALIGN_WITH_INPUT {
+		/* gcc uses crtbegin.o to find the start of
+		   the constructors, so we make sure it is
+		   first.  Because this is a wildcard, it
+		   doesn't matter if the user does not
+		   actually link against crtbegin.o; the
+		   linker won't look for a file to match a
+		   wildcard.  The wildcard also means that it
+		   doesn't matter which directory crtbegin.o
+		   is in.  */
+		KEEP (*crtbegin.o(.ctors))
+		KEEP (*crtbegin?.o(.ctors))
+		/* We don't want to include the .ctor section from
+		   the crtend.o file until after the sorted ctors.
+		   The .ctor section from the crtend file contains the
+		   end of ctors marker and it must be last */
+		KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
+		KEEP (*(SORT(.ctors.*)))
+		KEEP (*(.ctors))
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.dtors : ALIGN_WITH_INPUT {
+		KEEP (*crtbegin.o(.dtors))
+		KEEP (*crtbegin?.o(.dtors))
+		KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
+		KEEP (*(SORT(.dtors.*)))
+		KEEP (*(.dtors))
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.data.rel.ro : ALIGN_WITH_INPUT {
+		*(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*)
+		*(.data.rel.ro* .gnu.linkonce.d.rel.ro.*)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.jcr : ALIGN_WITH_INPUT {
+		KEEP (*(.jcr))
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.interp : ALIGN_WITH_INPUT {
+		*(.interp)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.note.gnu.build-id : ALIGN_WITH_INPUT {
+		*(.note.gnu.build-id)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.hash : ALIGN_WITH_INPUT {
+		*(.hash)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.gnu.hash : ALIGN_WITH_INPUT {
+		*(.gnu.hash)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.dynsym : ALIGN_WITH_INPUT {
+		*(.dynsym)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.dynstr : ALIGN_WITH_INPUT {
+		*(.dynstr)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.gnu.version : ALIGN_WITH_INPUT {
+		*(.gnu.version)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.gnu.version_d : ALIGN_WITH_INPUT {
+		*(.gnu.version_d)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.gnu.version_r : ALIGN_WITH_INPUT {
+		*(.gnu.version_r)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.rel.dyn : ALIGN_WITH_INPUT {
+		*(.rel.init)
+		*(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
+		*(.rel.fini)
+		*(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
+		*(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*)
+		*(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
+		*(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
+		*(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
+		*(.rel.ctors)
+		*(.rel.dtors)
+		*(.rel.got)
+		*(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
+		PROVIDE_HIDDEN (__rel_iplt_start = .);
+		*(.rel.iplt)
+		PROVIDE_HIDDEN (__rel_iplt_end = .);
+		PROVIDE_HIDDEN (__rela_iplt_start = .);
+		PROVIDE_HIDDEN (__rela_iplt_end = .);
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.rela.dyn : ALIGN_WITH_INPUT {
+		*(.rela.init)
+		*(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
+		*(.rela.fini)
+		*(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
+		*(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
+		*(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
+		*(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
+		*(.rela.ctors)
+		*(.rela.dtors)
+		*(.rela.got)
+		*(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
+		*(.rela.rtemsroset*)
+		*(.rela.rtemsrwset*)
+		PROVIDE_HIDDEN (__rel_iplt_start = .);
+		PROVIDE_HIDDEN (__rel_iplt_end = .);
+		PROVIDE_HIDDEN (__rela_iplt_start = .);
+		*(.rela.iplt)
+		PROVIDE_HIDDEN (__rela_iplt_end = .);
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.rel.plt : ALIGN_WITH_INPUT {
+		*(.rel.plt)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.rela.plt : ALIGN_WITH_INPUT {
+		*(.rela.plt)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.plt : ALIGN_WITH_INPUT {
+		*(.plt)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.iplt : ALIGN_WITH_INPUT {
+		*(.iplt)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.dynamic : ALIGN_WITH_INPUT {
+		*(.dynamic)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.got : ALIGN_WITH_INPUT {
+		*(.got.plt) *(.igot.plt) *(.got) *(.igot)
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	.rtemsroset : ALIGN_WITH_INPUT {
+		/* Special FreeBSD linker set sections */
+		__start_set_sysctl_set = .;
+		*(set_sysctl_*);
+		__stop_set_sysctl_set = .;
+		*(set_domain_*);
+		*(set_pseudo_*);
+
+		KEEP (*(SORT(.rtemsroset.*)))
+		bsp_section_rodata_end = .;
+	} > REGION_RODATA AT > REGION_RODATA_LOAD
+	bsp_section_rodata_size = bsp_section_rodata_end - bsp_section_rodata_begin;
+	bsp_section_rodata_load_begin = LOADADDR (.rodata);
+	bsp_section_rodata_load_end = bsp_section_rodata_load_begin + bsp_section_rodata_size;
+
+	.rwbarrier : ALIGN_WITH_INPUT {
+		. = ALIGN (bsp_section_rwbarrier_align);
+	} > REGION_DATA AT > REGION_DATA
+
+	.vector : ALIGN_WITH_INPUT {
+		bsp_section_vector_begin = .;
+
+		. = . + DEFINED (bsp_vector_table_in_start_section) ? 0 : bsp_vector_table_size;
+
+		. = ALIGN (bsp_stack_align);
+
+		bsp_stack_irq_begin = .;
+		. = . + bsp_stack_irq_size;
+		bsp_stack_irq_end = .;
+
+		bsp_stack_svc_begin = .;
+		. = . + bsp_stack_svc_size;
+		bsp_stack_svc_end = .;
+
+		bsp_stack_fiq_begin = .;
+		. = . + bsp_stack_fiq_size;
+		bsp_stack_fiq_end = .;
+
+		bsp_stack_und_begin = .;
+		. = . + bsp_stack_und_size;
+		bsp_stack_und_end = .;
+
+		bsp_stack_hyp_begin = .;
+		. = . + bsp_stack_hyp_size;
+		bsp_stack_hyp_end = .;
+
+		bsp_stack_abt_begin = .;
+		. = . + bsp_stack_abt_size;
+		bsp_stack_abt_end = .;
+
+		bsp_stack_main_begin = .;
+		. = . + bsp_stack_main_size;
+		bsp_stack_main_end = .;
+
+		bsp_stack_secondary_processors_begin = .;
+		. = . + (bsp_processor_count - 1) * bsp_stack_all_size;
+		bsp_stack_secondary_processors_end = .;
+
+		*(.bsp_vector)
+		bsp_section_vector_end = .;
+	} > REGION_VECTOR AT > REGION_VECTOR
+	bsp_section_vector_size = bsp_section_vector_end - bsp_section_vector_begin;
+	bsp_vector_table_begin = DEFINED (bsp_vector_table_in_start_section) ? bsp_section_start_begin : bsp_section_vector_begin;
+	bsp_vector_table_end = bsp_vector_table_begin + bsp_vector_table_size;
+
+	.fast_text : ALIGN_WITH_INPUT {
+		bsp_section_fast_text_begin = .;
+		*(.bsp_fast_text)
+		bsp_section_fast_text_end = .;
+	} > REGION_FAST_TEXT AT > REGION_FAST_TEXT_LOAD
+	bsp_section_fast_text_size = bsp_section_fast_text_end - bsp_section_fast_text_begin;
+	bsp_section_fast_text_load_begin = LOADADDR (.fast_text);
+	bsp_section_fast_text_load_end = bsp_section_fast_text_load_begin + bsp_section_fast_text_size;
+
+	.fast_data : ALIGN_WITH_INPUT {
+		bsp_section_fast_data_begin = .;
+		*(.bsp_fast_data)
+		bsp_section_fast_data_end = .;
+	} > REGION_FAST_DATA AT > REGION_FAST_DATA_LOAD
+	bsp_section_fast_data_size = bsp_section_fast_data_end - bsp_section_fast_data_begin;
+	bsp_section_fast_data_load_begin = LOADADDR (.fast_data);
+	bsp_section_fast_data_load_end = bsp_section_fast_data_load_begin + bsp_section_fast_data_size;
+
+	.data : ALIGN_WITH_INPUT {
+		bsp_section_data_begin = .;
+		*(.data .data.* .gnu.linkonce.d.*)
+		SORT(CONSTRUCTORS)
+	} > REGION_DATA AT > REGION_DATA_LOAD
+	.data1 : ALIGN_WITH_INPUT {
+		*(.data1)
+	} > REGION_DATA AT > REGION_DATA_LOAD
+	.rtemsrwset : ALIGN_WITH_INPUT {
+		KEEP (*(SORT(.rtemsrwset.*)))
+		bsp_section_data_end = .;
+	} > REGION_DATA AT > REGION_DATA_LOAD
+	bsp_section_data_size = bsp_section_data_end - bsp_section_data_begin;
+	bsp_section_data_load_begin = LOADADDR (.data);
+	bsp_section_data_load_end = bsp_section_data_load_begin + bsp_section_data_size;
+
+	.bss : ALIGN_WITH_INPUT {
+		bsp_section_bss_begin = .;
+		*(.dynbss)
+		*(.bss .bss.* .gnu.linkonce.b.*)
+		*(COMMON)
+		bsp_section_bss_end = .;
+	} > REGION_BSS AT > REGION_BSS
+	bsp_section_bss_size = bsp_section_bss_end - bsp_section_bss_begin;
+
+	.work : ALIGN_WITH_INPUT {
+		/*
+		 * The work section will occupy the remaining REGION_WORK region and
+		 * contains the RTEMS work space and heap.
+		 */
+		bsp_section_work_begin = .;
+		. += ORIGIN (REGION_WORK) + LENGTH (REGION_WORK) - ABSOLUTE (.);
+		bsp_section_work_end = .;
+	} > REGION_WORK AT > REGION_WORK
+	bsp_section_work_size = bsp_section_work_end - bsp_section_work_begin;
+
+	.stack : ALIGN_WITH_INPUT {
+		/*
+		 * The stack section will occupy the remaining REGION_STACK region and may
+		 * contain the task stacks.  Depending on the region distribution this
+		 * section may be of zero size.
+		 */
+		bsp_section_stack_begin = .;
+		. += ORIGIN (REGION_STACK) + LENGTH (REGION_STACK) - ABSOLUTE (.);
+		bsp_section_stack_end = .;
+	} > REGION_STACK AT > REGION_STACK
+	bsp_section_stack_size = bsp_section_stack_end - bsp_section_stack_begin;
+
+	.nocache : ALIGN_WITH_INPUT {
+		bsp_section_nocache_begin = .;
+		*(SORT_BY_ALIGNMENT (SORT_BY_NAME (.bsp_nocache*)))
+		bsp_section_nocache_end = .;
+	} > REGION_NOCACHE AT > REGION_NOCACHE_LOAD
+	bsp_section_nocache_size = bsp_section_nocache_end - bsp_section_nocache_begin;
+	bsp_section_nocache_load_begin = LOADADDR (.nocache);
+	bsp_section_nocache_load_end = bsp_section_nocache_load_begin + bsp_section_nocache_size;
+
+	.nocachenoload (NOLOAD) : ALIGN_WITH_INPUT {
+		bsp_section_nocachenoload_begin = .;
+		*(SORT_BY_ALIGNMENT (SORT_BY_NAME (.bsp_noload_nocache*)))
+		bsp_section_nocacheheap_begin = .;
+		. += ORIGIN (REGION_NOCACHE) + LENGTH (REGION_NOCACHE) - ABSOLUTE (.);
+		bsp_section_nocacheheap_end = .;
+		bsp_section_nocachenoload_end = .;
+	} > REGION_NOCACHE AT > REGION_NOCACHE
+	bsp_section_nocacheheap_size = bsp_section_nocacheheap_end - bsp_section_nocacheheap_begin;
+	bsp_section_nocachenoload_size = bsp_section_nocachenoload_end - bsp_section_nocachenoload_begin;
+
+	/* FIXME */
+	RamBase = ORIGIN (REGION_WORK);
+	RamSize = LENGTH (REGION_WORK);
+	WorkAreaBase = bsp_section_work_begin;
+	HeapSize = 0;
+
+	/* Stabs debugging sections.  */
+	.stab          0 : { *(.stab) }
+	.stabstr       0 : { *(.stabstr) }
+	.stab.excl     0 : { *(.stab.excl) }
+	.stab.exclstr  0 : { *(.stab.exclstr) }
+	.stab.index    0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment       0 : { *(.comment) }
+	/* DWARF debug sections.
+	   Symbols in the DWARF debugging sections are relative to the beginning
+	   of the section so we begin them at 0.  */
+	/* DWARF 1 */
+	.debug          0 : { *(.debug) }
+	.line           0 : { *(.line) }
+	/* GNU DWARF 1 extensions */
+	.debug_srcinfo  0 : { *(.debug_srcinfo) }
+	.debug_sfnames  0 : { *(.debug_sfnames) }
+	/* DWARF 1.1 and DWARF 2 */
+	.debug_aranges  0 : { *(.debug_aranges) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	/* DWARF 2 */
+	.debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+	.debug_abbrev   0 : { *(.debug_abbrev) }
+	.debug_line     0 : { *(.debug_line) }
+	.debug_frame    0 : { *(.debug_frame) }
+	.debug_str      0 : { *(.debug_str) }
+	.debug_loc      0 : { *(.debug_loc) }
+	.debug_macinfo  0 : { *(.debug_macinfo) }
+	/* SGI/MIPS DWARF 2 extensions */
+	.debug_weaknames 0 : { *(.debug_weaknames) }
+	.debug_funcnames 0 : { *(.debug_funcnames) }
+	.debug_typenames 0 : { *(.debug_typenames) }
+	.debug_varnames  0 : { *(.debug_varnames) }
+	/* DWARF 3 */
+	.debug_pubtypes 0 : { *(.debug_pubtypes) }
+	.debug_ranges   0 : { *(.debug_ranges) }
+	/* DWARF extension */
+	.debug_macro    0 : { *(.debug_macro) }
+	.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) KEEP (*(.gnu.attributes)) }
+	.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
+	/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
+
+	/*
+	 * This is a RTEMS specific section to catch all unexpected input
+	 * sections.  In case you get an error like
+	 *   "section `.unexpected_sections' will not fit in region
+	 *   `UNEXPECTED_SECTIONS'"
+	 * you have to figure out the offending input section and add it to the
+	 * appropriate output section definition above.
+	 */
+	.unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS
+}