bsps/arm: Clear SCTLR[M, I, A, C] in start.S

Initialize the data and unified cache levels.  Invalidate the
instruction cache levels.

Update #4202.

1 files changed, 2 insertions, 45 deletions

diff --git a/bsps/arm/raspberrypi/start/bspstarthooks.c b/bsps/arm/raspberrypi/start/bspstarthooks.c
index b050cb695e..60ff098be7 100644
--- a/bsps/arm/raspberrypi/start/bspstarthooks.c
+++ b/bsps/arm/raspberrypi/start/bspstarthooks.c
@@ -67,57 +67,14 @@ raspberrypi_mmu_config_table[] = {
 
 void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
 {
-  uint32_t sctlr_val;
-#ifdef RTEMS_SMP
-  uint32_t cpu_index_self = _SMP_Get_current_processor();
-#endif /* RTEMS_SMP */
-
-  sctlr_val = arm_cp15_get_control();
-
-  /*
-   * Current U-boot loader seems to start kernel image
-   * with I and D caches on and MMU enabled.
-   * If RTEMS application image finds that cache is on
-   * during startup then disable caches.
-   */
-  if (sctlr_val & (ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) {
-    if (sctlr_val & (ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) {
-      /*
-       * If the data cache is on then ensure that it is clean
-       * before switching off to be extra carefull.
-       */
-#ifdef RTEMS_SMP
-      if (cpu_index_self != 0) {
-        arm_cp15_data_cache_clean_level(0);
-        arm_cp15_cache_invalidate_level(0, 0);
-      } else
-#endif /* RTEMS_SMP */
-      {
-        rtems_cache_flush_entire_data();
-        rtems_cache_invalidate_entire_data();
-      }
-    }
-    arm_cp15_flush_prefetch_buffer();
-    sctlr_val &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M | ARM_CP15_CTRL_A);
-    arm_cp15_set_control(sctlr_val);
-  }
-#ifdef RTEMS_SMP
-  if (cpu_index_self != 0) {
-    arm_cp15_cache_invalidate_level(0, 0);
-  } else
-#endif /* RTEMS_SMP */
-  {
-    rtems_cache_invalidate_entire_data();
-  }
-  rtems_cache_invalidate_entire_instruction();
   arm_cp15_tlb_invalidate();
-  arm_cp15_flush_prefetch_buffer();
+  _ARM_Instruction_synchronization_barrier();
 
   /* Clear Translation Table Base Control Register */
   arm_cp15_set_translation_table_base_control_register(0);
 
 #ifdef RTEMS_SMP
-  if (cpu_index_self == 0) {
+  if (_SMP_Get_current_processor() == 0) {
     rpi_ipi_initialize();
   } else {
     rpi_start_rtems_on_secondary_processor();