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authorSebastian Huber <sebastian.huber@embedded-brains.de>2018-04-20 10:35:35 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-04-20 13:52:14 +0200
commit99648958668d3a33ee57974479b36201fe303f34 (patch)
tree6f27ea790e2823c6156e71219a4f54680263fac6 /bsps/arm/raspberrypi
parentbsps: Move start files to bsps (diff)
downloadrtems-99648958668d3a33ee57974479b36201fe303f34.tar.bz2
bsps: Move startup files to bsps
Adjust build support files to new directory layout. This patch is a part of the BSP source reorganization. Update #3285.
Diffstat (limited to 'bsps/arm/raspberrypi')
-rw-r--r--bsps/arm/raspberrypi/start/bsp_specs9
-rw-r--r--bsps/arm/raspberrypi/start/bspgetworkarea.c78
-rw-r--r--bsps/arm/raspberrypi/start/bspreset.c26
-rw-r--r--bsps/arm/raspberrypi/start/bspsmp.c83
-rw-r--r--bsps/arm/raspberrypi/start/bspsmp_init.c81
-rw-r--r--bsps/arm/raspberrypi/start/bspstart.c29
-rw-r--r--bsps/arm/raspberrypi/start/bspstarthooks.c107
-rw-r--r--bsps/arm/raspberrypi/start/cmdline.c55
-rw-r--r--bsps/arm/raspberrypi/start/linkcmds.in70
-rw-r--r--bsps/arm/raspberrypi/start/mm_config_table.c96
10 files changed, 634 insertions, 0 deletions
diff --git a/bsps/arm/raspberrypi/start/bsp_specs b/bsps/arm/raspberrypi/start/bsp_specs
new file mode 100644
index 0000000000..47dd31d46b
--- /dev/null
+++ b/bsps/arm/raspberrypi/start/bsp_specs
@@ -0,0 +1,9 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{!nostdlib: %{qrtems: crti.o%s crtbegin.o%s}}
+
+*endfile:
+%{!qrtems: %(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s}
diff --git a/bsps/arm/raspberrypi/start/bspgetworkarea.c b/bsps/arm/raspberrypi/start/bspgetworkarea.c
new file mode 100644
index 0000000000..6a43e3c437
--- /dev/null
+++ b/bsps/arm/raspberrypi/start/bspgetworkarea.c
@@ -0,0 +1,78 @@
+/**
+ * @file
+ *
+ * @ingroup arm_start
+ *
+ * @brief Raspberry pi workarea initialization.
+ */
+
+/*
+ * COPYRIGHT (c) 1989-2008.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * Copyright (c) 2011-2012 embedded brains GmbH.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ *
+ * Copyright (c) 2015 YANG Qiao
+ *
+ * Code is based on c/src/lib/libbsp/shared/bspgetworkarea.c
+ */
+
+#include <string.h>
+#include <bsp.h>
+#include <bsp/bootcard.h>
+#include <bsp/vc.h>
+#ifdef BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN
+ #include <rtems/config.h>
+#endif
+
+#if defined(HAS_UBOOT) && !defined(BSP_DISABLE_UBOOT_WORK_AREA_CONFIG)
+ #define USE_UBOOT
+#endif
+
+/*
+ * These are provided by the linkcmds for ALL of the BSPs which use this file.
+ */
+extern char WorkAreaBase[];
+
+/*
+ * We may get the size information from U-Boot or the linker scripts.
+ */
+#ifdef USE_UBOOT
+ #include <bsp/u-boot.h>
+#else
+ extern char RamBase[];
+ extern char RamSize[];
+#endif
+
+void bsp_work_area_initialize(void)
+{
+ uintptr_t work_base = (uintptr_t) WorkAreaBase;
+ uintptr_t ram_end;
+ bcm2835_get_vc_memory_entries vc_entry;
+ /*
+ * bcm2835_get_arm_memory_entries arm_entry;
+ * is another alternative how to obtain usable memory size
+ */
+
+ #ifdef USE_UBOOT
+ ram_end = (uintptr_t) bsp_uboot_board_info.bi_memstart +
+ bsp_uboot_board_info.bi_memsize;
+ #else
+ ram_end = (uintptr_t)RamBase + (uintptr_t)RamSize;
+ #endif
+
+ #ifdef BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN
+ work_base += rtems_configuration_get_interrupt_stack_size();
+ #endif
+
+ memset( &vc_entry, 0, sizeof(vc_entry) );
+ if (bcm2835_mailbox_get_vc_memory( &vc_entry ) >= 0) {
+ if (vc_entry.base > 10 * 1024 *1024)
+ ram_end = ram_end > vc_entry.base? vc_entry.base: ram_end;
+ }
+ bsp_work_area_initialize_default( (void *) work_base, ram_end - work_base );
+}
diff --git a/bsps/arm/raspberrypi/start/bspreset.c b/bsps/arm/raspberrypi/start/bspreset.c
new file mode 100644
index 0000000000..98c28bea9d
--- /dev/null
+++ b/bsps/arm/raspberrypi/start/bspreset.c
@@ -0,0 +1,26 @@
+/**
+ * @file
+ *
+ * @ingroup raspberrypi
+ *
+ * @brief Raspberry pi restart chip function
+ */
+
+#include <bsp/bootcard.h>
+#include <bsp/raspberrypi.h>
+#include <bsp.h>
+#include <rtems.h>
+
+void bsp_reset(void)
+{
+ uint32_t rstc;
+
+ BCM2835_REG(BCM2835_PM_WDOG) = BCM2835_PM_PASSWD_MAGIC | 20;
+ rstc = BCM2835_REG(BCM2835_PM_RSTC);
+ rstc &= ~BCM2835_PM_RSTC_WRCFG;
+ rstc |= BCM2835_PM_PASSWD_MAGIC | BCM2835_PM_RSTC_WRCFG_FULL;
+ BCM2835_REG(BCM2835_PM_RSTC) = rstc;
+ BCM2835_REG(BCM2835_PM_WDOG) = BCM2835_PM_PASSWD_MAGIC | 1;
+
+ while (1) ;
+}
diff --git a/bsps/arm/raspberrypi/start/bspsmp.c b/bsps/arm/raspberrypi/start/bspsmp.c
new file mode 100644
index 0000000000..c3e5451442
--- /dev/null
+++ b/bsps/arm/raspberrypi/start/bspsmp.c
@@ -0,0 +1,83 @@
+/**
+ * @file
+ *
+ * @ingroup raspberrypi
+ *
+ * @brief Raspberry pi SMP management functions provided to SuperCore
+ */
+
+/*
+ * Copyright (c) 2016 Pavel Pisa <pisa@cmp.felk.cvut.cz>
+ *
+ * Czech Technical University in Prague
+ * Zikova 1903/4
+ * 166 36 Praha 6
+ * Czech Republic
+ *
+ * Reuses some ideas from Rohini Kulkarni <krohini1593@gmail.com>
+ * GSoC 2015 project and Altera Cyclone-V SMP code
+ * by embedded brains GmbH
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems/score/smpimpl.h>
+
+#include <bsp/start.h>
+#include <bsp/raspberrypi.h>
+#include <bsp.h>
+#include <bsp/arm-cp15-start.h>
+#include <libcpu/arm-cp15.h>
+#include <rtems.h>
+#include <bsp/irq-generic.h>
+#include <assert.h>
+
+bool _CPU_SMP_Start_processor( uint32_t cpu_index )
+{
+ bool started;
+ uint32_t cpu_index_self = _SMP_Get_current_processor();
+
+ if (cpu_index != cpu_index_self) {
+
+ BCM2835_REG(BCM2836_MAILBOX_3_WRITE_SET_BASE + 0x10 * cpu_index) = (uint32_t)_start;
+
+ /*
+ * Wait for secondary processor to complete its basic initialization so
+ * that we can enable the unified L2 cache.
+ */
+ started = _Per_CPU_State_wait_for_non_initial_state(cpu_index, 0);
+ } else {
+ started = false;
+ }
+
+ return started;
+}
+
+uint32_t _CPU_SMP_Initialize(void)
+{
+ uint32_t cpu_count = (uint32_t)bsp_processor_count;
+
+ if ( cpu_count > 4 )
+ cpu_count = 4;
+
+ return cpu_count;
+}
+
+void _CPU_SMP_Finalize_initialization( uint32_t cpu_count )
+{
+ /* Do nothing */
+}
+
+void _CPU_SMP_Prepare_start_multitasking( void )
+{
+ /* Do nothing */
+}
+
+void _CPU_SMP_Send_interrupt( uint32_t target_cpu_index )
+{
+ /* Generates IPI */
+ BCM2835_REG(BCM2836_MAILBOX_3_WRITE_SET_BASE +
+ 0x10 * target_cpu_index) = 0x1;
+}
diff --git a/bsps/arm/raspberrypi/start/bspsmp_init.c b/bsps/arm/raspberrypi/start/bspsmp_init.c
new file mode 100644
index 0000000000..8c8cd74712
--- /dev/null
+++ b/bsps/arm/raspberrypi/start/bspsmp_init.c
@@ -0,0 +1,81 @@
+/**
+ * @file
+ *
+ * @ingroup raspberrypi
+ *
+ * @brief Raspberry pi secondary CPU and IPI HW initialization
+ */
+
+/*
+ * Copyright (c) 2016 Pavel Pisa <pisa@cmp.felk.cvut.cz>
+ *
+ * Czech Technical University in Prague
+ * Zikova 1903/4
+ * 166 36 Praha 6
+ * Czech Republic
+ *
+ * Reuses some ideas from Rohini Kulkarni <krohini1593@gmail.com>
+ * GSoC 2015 project and Altera Cyclone-V SMP code
+ * by embedded brains GmbH
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems/score/smpimpl.h>
+
+#include <bsp/start.h>
+#include <bsp/raspberrypi.h>
+#include <bsp.h>
+#include <bsp/arm-cp15-start.h>
+#include <libcpu/arm-cp15.h>
+#include <rtems.h>
+#include <bsp/irq-generic.h>
+#include <assert.h>
+
+void rpi_ipi_initialize(void)
+{
+ uint32_t cpu_index_self = _SMP_Get_current_processor();
+
+ /*
+ * Includes support only for mailbox 3 interrupt.
+ * Further interrupt support has to be added. This will have to be integrated
+ * with existing interrupt support for Raspberry Pi
+ */
+
+ /* reset mailbox 3 contents to zero */
+ BCM2835_REG(BCM2836_MAILBOX_3_READ_CLEAR_BASE + 0x10 * cpu_index_self) = 0xffffffff;
+
+ BCM2835_REG(BCM2836_MAILBOX_IRQ_CTRL(cpu_index_self)) =
+ BCM2836_MAILBOX_IRQ_CTRL_MBOX3_IRQ;
+}
+
+void rpi_start_rtems_on_secondary_processor(void)
+{
+ uint32_t ctrl;
+
+ ctrl = arm_cp15_start_setup_mmu_and_cache(
+ 0,
+ ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
+ );
+
+ rpi_ipi_initialize();
+
+ arm_cp15_set_domain_access_control(
+ ARM_CP15_DAC_DOMAIN(ARM_MMU_DEFAULT_CLIENT_DOMAIN, ARM_CP15_DAC_CLIENT)
+ );
+
+ /* FIXME: Sharing the translation table between processors is brittle */
+ arm_cp15_set_translation_table_base(
+ (uint32_t *) bsp_translation_table_base
+ );
+
+ arm_cp15_tlb_invalidate();
+
+ ctrl |= ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M;
+ ctrl &= ~ARM_CP15_CTRL_V;
+ arm_cp15_set_control(ctrl);
+
+ _SMP_Start_multitasking_on_secondary_processor();
+}
diff --git a/bsps/arm/raspberrypi/start/bspstart.c b/bsps/arm/raspberrypi/start/bspstart.c
new file mode 100644
index 0000000000..c5786bfa4a
--- /dev/null
+++ b/bsps/arm/raspberrypi/start/bspstart.c
@@ -0,0 +1,29 @@
+/**
+ * @file
+ *
+ * @ingroup arm_start
+ *
+ * @brief Raspberry pi startup code.
+ */
+
+/*
+ * Copyright (c) 2013 by Alan Cudmore
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ *
+ * http://www.rtems.org/license/LICENSE
+ */
+
+#include <bsp.h>
+#include <bsp/bootcard.h>
+#include <bsp/irq-generic.h>
+#include <bsp/irq.h>
+#include <bsp/linker-symbols.h>
+#include <bsp/stackalloc.h>
+#include <bsp/raspberrypi.h>
+
+void bsp_start(void)
+{
+ bsp_interrupt_initialize();
+}
diff --git a/bsps/arm/raspberrypi/start/bspstarthooks.c b/bsps/arm/raspberrypi/start/bspstarthooks.c
new file mode 100644
index 0000000000..165a555880
--- /dev/null
+++ b/bsps/arm/raspberrypi/start/bspstarthooks.c
@@ -0,0 +1,107 @@
+/**
+ * @file
+ *
+ * @ingroup arm_start
+ *
+ * @brief Rasberry Pi startup code.
+ */
+
+/*
+ * Copyright (c) 2013. Hesham AL-Matary
+ * Copyright (c) 2013 by Alan Cudmore
+ * based on work by:
+ * Copyright (c) 2009
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE
+ */
+
+#include <bspopts.h>
+#include <bsp/start.h>
+#include <bsp/raspberrypi.h>
+#include <bsp/mm.h>
+#include <libcpu/arm-cp15.h>
+#include <bsp.h>
+
+#ifdef RTEMS_SMP
+#include <rtems/score/smp.h>
+#endif
+
+void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
+{
+ uint32_t sctlr_val;
+#ifdef RTEMS_SMP
+ uint32_t cpu_index_self = _SMP_Get_current_processor();
+#endif /* RTEMS_SMP */
+
+ sctlr_val = arm_cp15_get_control();
+
+ /*
+ * Current U-boot loader seems to start kernel image
+ * with I and D caches on and MMU enabled.
+ * If RTEMS application image finds that cache is on
+ * during startup then disable caches.
+ */
+ if (sctlr_val & (ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) {
+ if (sctlr_val & (ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) {
+ /*
+ * If the data cache is on then ensure that it is clean
+ * before switching off to be extra carefull.
+ */
+#ifdef RTEMS_SMP
+ if (cpu_index_self != 0) {
+ arm_cp15_data_cache_clean_level(0);
+ arm_cp15_cache_invalidate_level(0, 0);
+ } else
+#endif /* RTEMS_SMP */
+ {
+ rtems_cache_flush_entire_data();
+ rtems_cache_invalidate_entire_data();
+ }
+ }
+ arm_cp15_flush_prefetch_buffer();
+ sctlr_val &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M | ARM_CP15_CTRL_A);
+ arm_cp15_set_control(sctlr_val);
+ }
+#ifdef RTEMS_SMP
+ if (cpu_index_self != 0) {
+ arm_cp15_cache_invalidate_level(0, 0);
+ } else
+#endif /* RTEMS_SMP */
+ {
+ rtems_cache_invalidate_entire_data();
+ }
+ rtems_cache_invalidate_entire_instruction();
+ arm_cp15_branch_predictor_invalidate_all();
+ arm_cp15_tlb_invalidate();
+ arm_cp15_flush_prefetch_buffer();
+
+ /* Clear Translation Table Base Control Register */
+ arm_cp15_set_translation_table_base_control_register(0);
+
+ /* Clear Secure or Non-secure Vector Base Address Register */
+ arm_cp15_set_vector_base_address(0);
+
+#ifdef RTEMS_SMP
+ if (cpu_index_self == 0) {
+ rpi_ipi_initialize();
+ } else {
+ rpi_start_rtems_on_secondary_processor();
+ }
+#endif
+}
+
+void BSP_START_TEXT_SECTION bsp_start_hook_1(void)
+{
+ bsp_start_copy_sections();
+ bsp_memory_management_initialize();
+ bsp_start_clear_bss();
+
+ rpi_video_init();
+}
diff --git a/bsps/arm/raspberrypi/start/cmdline.c b/bsps/arm/raspberrypi/start/cmdline.c
new file mode 100644
index 0000000000..222b21eb63
--- /dev/null
+++ b/bsps/arm/raspberrypi/start/cmdline.c
@@ -0,0 +1,55 @@
+/**
+ * @file
+ *
+ * @ingroup raspberrypi
+ *
+ * @brief mailbox support.
+ */
+/*
+ * Copyright (c) 2015 Yang Qiao
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ *
+ * http://www.rtems.org/license/LICENSE
+ *
+ */
+
+#include <bsp.h>
+#include <bsp/vc.h>
+
+#include <string.h>
+
+#define MAX_CMDLINE_LENGTH 1024
+static int rpi_cmdline_ready = -1;
+static char rpi_cmdline_cached[MAX_CMDLINE_LENGTH] = "force .data placement";
+static bcm2835_get_cmdline_entries rpi_cmdline_entries;
+
+const char *rpi_cmdline_get_raw(void)
+{
+ memset(&rpi_cmdline_entries, 0, sizeof(rpi_cmdline_entries));
+ if (bcm2835_mailbox_get_cmdline(&rpi_cmdline_entries) < 0)
+ return NULL;
+ return rpi_cmdline_entries.cmdline;
+}
+
+const char *rpi_cmdline_get_cached(void)
+{
+ if (rpi_cmdline_ready <= 0) {
+ const char *line = rpi_cmdline_get_raw();
+ if (line != NULL)
+ strncpy(rpi_cmdline_cached, line, MAX_CMDLINE_LENGTH - 1);
+ rpi_cmdline_cached[MAX_CMDLINE_LENGTH - 1] = 0;
+ rpi_cmdline_ready = 1;
+ }
+ return rpi_cmdline_cached;
+}
+
+const char *rpi_cmdline_get_arg(const char* arg)
+{
+ const char *opt_data;
+ opt_data = strstr(rpi_cmdline_get_cached(), arg);
+ if (opt_data)
+ opt_data += strlen(arg);
+ return opt_data;
+}
diff --git a/bsps/arm/raspberrypi/start/linkcmds.in b/bsps/arm/raspberrypi/start/linkcmds.in
new file mode 100644
index 0000000000..829716c11c
--- /dev/null
+++ b/bsps/arm/raspberrypi/start/linkcmds.in
@@ -0,0 +1,70 @@
+/**
+ * @file
+ *
+ * @ingroup raspberrypi_linker
+ *
+ * @brief Memory map
+ */
+
+/**
+ * @defgroup raspberrypi_linker Raspberry Pi Memory Map
+ *
+ * @ingroup bsp_linker
+ *
+ * @brief Raspberry Pi memory map.
+ */
+
+/**
+ * <table>
+ * <tr><th>Region Name</th><th>Region Begin</th><th>Region Size</th></tr>
+ * <tr><td>VECTOR_RAM</td><td>0x08000000</td><td>8k</td></tr>
+ * <tr><td>RAM</td><td>0x80008000</td><td>128M</td></tr>
+ * </table>
+ *
+ * <table>
+ * <tr><th>Section Name</th><th>Section Runtime Region</th><th>Section Load Region</th></tr>
+ * <tr><td>.start</td><td>RAM</td><td></td></tr>
+ * <tr><td>.vector</td><td>VECTOR_RAM</td><td></td></tr>
+ * <tr><td>.text</td><td>RAM</td><td>RAM_EXT</td></tr>
+ * <tr><td>.rodata</td><td>RAM</td><td>RAM_EXT</td></tr>
+ * <tr><td>.data</td><td>RAM</td><td>RAM_EXT</td></tr>
+ * <tr><td>.fast</td><td>RAM</td><td>RAM_EXT</td></tr>
+ * <tr><td>.bss</td><td>RAM</td><td></td></tr>
+ * <tr><td>.work</td><td>RAM</td><td></td></tr>
+ * <tr><td>.stack</td><td>RAM</td><td></td></tr>
+ * </table>
+ */
+
+MEMORY {
+ VECTOR_RAM (AIW) : ORIGIN = 0x0 , LENGTH = 16k
+ RAM_MMU (AIW) : ORIGIN = 0x00004000, LENGTH = 16k
+ RAM (AIW) : ORIGIN = 0x00008000, LENGTH = 128M - 32k
+}
+
+bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : @RASPBERRYPI_CPUS@;
+
+REGION_ALIAS ("REGION_START", RAM);
+REGION_ALIAS ("REGION_VECTOR", VECTOR_RAM);
+REGION_ALIAS ("REGION_TEXT", RAM);
+REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
+REGION_ALIAS ("REGION_RODATA", RAM);
+REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
+REGION_ALIAS ("REGION_DATA", RAM);
+REGION_ALIAS ("REGION_DATA_LOAD", RAM);
+REGION_ALIAS ("REGION_FAST_TEXT", RAM);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
+REGION_ALIAS ("REGION_FAST_DATA", RAM);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
+REGION_ALIAS ("REGION_BSS", RAM);
+REGION_ALIAS ("REGION_WORK", RAM);
+REGION_ALIAS ("REGION_STACK", RAM);
+REGION_ALIAS ("REGION_NOCACHE", RAM);
+REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM);
+
+bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 3008;
+bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
+
+bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1M;
+bsp_translation_table_base = ORIGIN (RAM_MMU);
+
+INCLUDE linkcmds.armv4
diff --git a/bsps/arm/raspberrypi/start/mm_config_table.c b/bsps/arm/raspberrypi/start/mm_config_table.c
new file mode 100644
index 0000000000..27fa76b355
--- /dev/null
+++ b/bsps/arm/raspberrypi/start/mm_config_table.c
@@ -0,0 +1,96 @@
+/**
+ * @file
+ *
+ * @ingroup arm_start
+ *
+ * @brief Raspberry Pi low level start
+ */
+
+/*
+ * Copyright (c) 2013 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Dornierstr. 4
+ * 82178 Puchheim
+ * Germany
+ * <info@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/arm-cp15-start.h>
+
+/*
+ * Pagetable initialization data
+ *
+ * Keep all read-only sections before read-write ones.
+ * This ensures that write is allowed if one page/region
+ * is partially filled by read-only section contentent
+ * and rest is used for writeable section
+ */
+
+const arm_cp15_start_section_config arm_cp15_start_mmu_config_table[] = {
+ {
+ .begin = (uint32_t) bsp_section_fast_text_begin,
+ .end = (uint32_t) bsp_section_fast_text_end,
+ .flags = ARMV7_MMU_CODE_CACHED
+ }, {
+ .begin = (uint32_t) bsp_section_start_begin,
+ .end = (uint32_t) bsp_section_start_end,
+ .flags = ARMV7_MMU_CODE_CACHED
+ }, {
+ .begin = (uint32_t) bsp_section_text_begin,
+ .end = (uint32_t) bsp_section_text_end,
+ .flags = ARMV7_MMU_CODE_CACHED
+ }, {
+ .begin = (uint32_t) bsp_section_rodata_begin,
+ .end = (uint32_t) bsp_section_rodata_end,
+ .flags = ARMV7_MMU_DATA_READ_ONLY_CACHED
+ }, {
+ .begin = (uint32_t) bsp_translation_table_base,
+ .end = (uint32_t) bsp_translation_table_base + 0x4000,
+ .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED
+ }, {
+ .begin = (uint32_t) bsp_section_fast_data_begin,
+ .end = (uint32_t) bsp_section_fast_data_end,
+ .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED
+ }, {
+ .begin = (uint32_t) bsp_section_vector_begin,
+ .end = (uint32_t) bsp_section_vector_end,
+ .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED
+ }, {
+ .begin = (uint32_t) bsp_section_data_begin,
+ .end = (uint32_t) bsp_section_data_end,
+ .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED
+ }, {
+ .begin = (uint32_t) bsp_section_bss_begin,
+ .end = (uint32_t) bsp_section_bss_end,
+ .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED
+ }, {
+ .begin = (uint32_t) bsp_section_work_begin,
+ .end = (uint32_t) bsp_section_work_end,
+ .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED
+ }, {
+ .begin = (uint32_t) bsp_section_stack_begin,
+ .end = (uint32_t) bsp_section_stack_end,
+ .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED
+ }, {
+ .begin = RPI_PERIPHERAL_BASE,
+ .end = RPI_PERIPHERAL_BASE + RPI_PERIPHERAL_SIZE,
+ .flags = ARMV7_MMU_DEVICE
+ }
+#if (BSP_IS_RPI2 == 1)
+ /* Core local peripherals area - timer, mailboxes */
+ , {
+ .begin = BCM2836_CORE_LOCAL_PERIPH_BASE,
+ .end = BCM2836_CORE_LOCAL_PERIPH_BASE + BCM2836_CORE_LOCAL_PERIPH_SIZE,
+ .flags = ARMV7_MMU_DEVICE
+ }
+#endif
+};
+
+const size_t arm_cp15_start_mmu_config_table_size =
+ RTEMS_ARRAY_SIZE(arm_cp15_start_mmu_config_table);