bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

6 files changed, 427 insertions, 0 deletions

diff --git a/bsps/arm/lpc176x/start/bsp_specs b/bsps/arm/lpc176x/start/bsp_specs
new file mode 100644
index 0000000000..47dd31d46b
--- /dev/null
+++ b/bsps/arm/lpc176x/start/bsp_specs
@@ -0,0 +1,9 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{!nostdlib: %{qrtems: crti.o%s crtbegin.o%s}}
+
+*endfile:
+%{!qrtems: %(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s}
diff --git a/bsps/arm/lpc176x/start/bspstart.c b/bsps/arm/lpc176x/start/bspstart.c
new file mode 100644
index 0000000000..f1aba444fc
--- /dev/null
+++ b/bsps/arm/lpc176x/start/bspstart.c
@@ -0,0 +1,91 @@
+/**
+ * @file
+ *
+ * @ingroup lpc176x
+ *
+ * @brief Startup code.
+ */
+
+/*
+ * Copyright (c) 2008-2012 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/io.h>
+#include <bsp/irq.h>
+#include <bsp/dma.h>
+#include <bsp/bootcard.h>
+#include <bsp/timer.h>
+#include <bsp/irq-generic.h>
+#include <bsp/system-clocks.h>
+#include <bsp/linker-symbols.h>
+#include <bsp/common-types.h>
+#include <bsp/uart-output-char.h>
+
+#ifdef LPC176X_HEAP_EXTEND
+LINKER_SYMBOL( lpc176x_region_heap_0_begin );
+LINKER_SYMBOL( lpc176x_region_heap_0_size );
+LINKER_SYMBOL( lpc176x_region_heap_0_end );
+LINKER_SYMBOL( lpc176x_region_heap_1_begin );
+LINKER_SYMBOL( lpc176x_region_heap_1_size );
+LINKER_SYMBOL( lpc176x_region_heap_1_end );
+extern Heap_Control *RTEMS_Malloc_Heap;
+#endif
+
+static void heap_extend( void )
+{
+#ifdef LPC176X_HEAP_EXTEND
+  _Heap_Extend( RTEMS_Malloc_Heap,
+    lpc176x_region_heap_0_begin,
+    (uintptr_t) lpc176x_region_heap_0_size,
+    NULL );
+  _Heap_Extend( RTEMS_Malloc_Heap,
+    lpc176x_region_heap_1_begin,
+    (uintptr_t) lpc176x_region_heap_1_size,
+    NULL );
+#endif
+}
+
+/**
+ * @brief Console initialization
+ */
+static void initialize_console( void )
+{
+#ifdef LPC176X_CONFIG_CONSOLE
+
+  lpc176x_module_enable( LPC176X_MODULE_UART_0, LPC176X_MODULE_PCLK_DEFAULT );
+
+  lpc176x_pin_select( LPC176X_PIN_UART_0_TXD, LPC176X_PIN_FUNCTION_01 );
+  lpc176x_pin_select( LPC176X_PIN_UART_0_RXD, LPC176X_PIN_FUNCTION_01 );
+
+  BSP_CONSOLE_UART_INIT( LPC176X_PCLK / 16 / LPC176X_UART_BAUD );
+#endif
+}
+
+void bsp_start( void )
+{
+  /* Initialize console */
+  initialize_console();
+
+  /*Initialize timer*/
+  lpc176x_timer_init( LPC176X_TIMER_1 );
+  lpc176x_timer_start( LPC176X_TIMER_1 );
+
+  /* Interrupts */
+  bsp_interrupt_initialize();
+
+  /* DMA */
+  lpc176x_dma_initialize();
+
+  heap_extend();
+}
diff --git a/bsps/arm/lpc176x/start/bspstarthooks.c b/bsps/arm/lpc176x/start/bspstarthooks.c
new file mode 100644
index 0000000000..a60c5bdf89
--- /dev/null
+++ b/bsps/arm/lpc176x/start/bspstarthooks.c
@@ -0,0 +1,227 @@
+/**
+ * @file bspstarthooks.c
+ *
+ * @ingroup lpc176x
+ *
+ * @brief First configurations and initializations to the correct
+ *              functionality of the board.
+ */
+
+/*
+ * Copyright (c) 2014 Taller Technologies.
+ *
+ * @author  Boretto Martin    (martin.boretto@tallertechnologies.com)
+ * @author  Diaz Marcos (marcos.diaz@tallertechnologies.com)
+ * @author  Lenarduzzi Federico  (federico.lenarduzzi@tallertechnologies.com)
+ * @author  Daniel Chicco  (daniel.chicco@tallertechnologies.com)
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/start.h>
+#include <bsp/io.h>
+
+/**
+ * @brief Initializes the oscillator according to the lpc176x board.
+ */
+static BSP_START_TEXT_SECTION void lpc176x_init_main_oscillator( void )
+{
+  if ( ( LPC176X_SCB.scs & LPC176X_SCB_SCS_OSC_STATUS ) == 0u ) {
+    LPC176X_SCB.scs |= LPC176X_SCB_SCS_OSC_ENABLE;
+
+    while ( ( LPC176X_SCB.scs & LPC176X_SCB_SCS_OSC_STATUS ) == 0u ) {
+      /* Wait. */
+    }
+  }
+
+  /* else implies that the oscillator is initialized. Also,
+     there is nothing to do. */
+}
+
+/**
+ * @brief Sets the PLL configuration.
+ *
+ * @param pll Value to set.
+ * @param val Set value.
+ */
+static BSP_START_TEXT_SECTION void lpc176x_pll_config( const uint32_t val )
+{
+  ( LPC176X_SCB.pll_0 ).con = val;
+  /* The two register writes must be in correct sequence. */
+  ( LPC176X_SCB.pll_0 ).feed = LPC176X_PLL0CON;
+  ( LPC176X_SCB.pll_0 ).feed = LPC176X_PLL0CFG;
+}
+
+/**
+ * @brief Sets the PLL.
+ *
+ * @param msel Multiplier value.
+ * @param psel Divider value.
+ * @param cclkdiv Divisor clock.
+ */
+static BSP_START_TEXT_SECTION void lpc176x_set_pll(
+  const unsigned msel,
+  const unsigned psel,
+  const unsigned cclkdiv
+)
+{
+  const uint32_t pllcfg = LPC176X_PLL_SEL_MSEL( msel ) |
+                          LPC176X_PLL_SEL_PSEL( psel );
+  const uint32_t pllstat = LPC176X_PLL_STAT_PLLE | LPC176X_PLL_STAT_PLOCK |
+                           pllcfg;
+  const uint32_t cclksel_cclkdiv = LPC176X_SCB_CCLKSEL_CCLKDIV( cclkdiv );
+
+  if ( ( LPC176X_SCB.pll_0 ).stat != pllstat
+       || LPC176X_SCB.cclksel != cclksel_cclkdiv
+       || LPC176X_SCB.clksrcsel != LPC176X_SCB_CLKSRCSEL_CLKSRC ) {
+    lpc176x_pll_config( ( LPC176X_SCB.pll_0 ).con & ~LPC176X_PLL_CON_PLLC );
+
+    /* Turn off USB.  */
+    LPC176X_SCB.usbclksel = 0u;
+
+    /* Disable PLL. */
+    lpc176x_pll_config( 0u );
+
+    /* Use SYSCLK for CCLK. */
+    LPC176X_SCB.cclksel = LPC176X_SCB_CCLKSEL_CCLKDIV( 0u );
+
+    /* Set the CCLK, PCLK and EMCCLK divider. */
+    LPC176X_SCB.cclksel = cclksel_cclkdiv;
+
+    /* Select main oscillator as clock source. */
+    LPC176X_SCB.clksrcsel = LPC176X_SCB_CLKSRCSEL_CLKSRC;
+
+    /* The two register writes must be in correct sequence. */
+    /* Set PLL configuration. */
+    ( LPC176X_SCB.pll_0 ).cfg = pllcfg;
+    ( LPC176X_SCB.pll_0 ).feed = LPC176X_PLL0CON;
+    ( LPC176X_SCB.pll_0 ).feed = LPC176X_PLL0CFG;
+
+    /* Enable PLL. */
+    lpc176x_pll_config( LPC176X_PLL_CON_PLLE );
+
+    /* Wait for lock. */
+    while ( ( ( LPC176X_SCB.pll_0 ).stat & LPC176X_PLL_STAT_PLOCK ) == 0u ) {
+      /* Wait */
+    }
+
+    /* Connect PLL. */
+    lpc176x_pll_config( ( LPC176X_PLL_CON_PLLE | LPC176X_PLL_CON_PLLC ) );
+
+    /* Wait for connected and enabled. */
+    while ( ( ( LPC176X_SCB.pll_0 ).stat & ( LPC176X_PLL_STAT_PLLE |
+                                             LPC176X_PLL_STAT_PLLC ) ) ==
+            0u ) {
+      /* Wait  */
+    }
+  }
+
+  /* else implies that the pll has a wrong value. Also,
+     there is nothing to do. */
+}
+
+/**
+ * @brief Pll initialization.
+ */
+static BSP_START_TEXT_SECTION void lpc176x_init_pll( void )
+{
+#if ( LPC176X_OSCILLATOR_MAIN == 12000000u )
+#if ( LPC176X_CCLK == 96000000U )
+  lpc176x_set_pll( 11u, 0u, 2u );
+#else
+#error "unexpected CCLK"
+#endif
+#else
+#error "unexpected main oscillator frequency"
+#endif
+}
+
+/**
+ * @brief Memory map initialization.
+ */
+static BSP_START_TEXT_SECTION void lpc176x_init_memory_map( void )
+{
+  LPC176X_SCB.memmap = LPC176X_SCB_MEMMAP_MAP;
+}
+
+/**
+ * @brief Memory accelerator initialization.
+ */
+static BSP_START_TEXT_SECTION void lpc176x_init_memory_accelerator( void )
+{
+#if ( LPC176X_CCLK <= 20000000U )
+  LPC176X_SCB.flashcfg = LPC176X_SCB_FLASHCFG_FLASHTIM( 0x0U );
+#elif ( LPC176X_CCLK <= 40000000U )
+  LPC176X_SCB.flashcfg = LPC176X_SCB_FLASHCFG_FLASHTIM( 0x1U );
+#elif ( LPC176X_CCLK <= 60000000U )
+  LPC176X_SCB.flashcfg = LPC176X_SCB_FLASHCFG_FLASHTIM( 0x2U );
+#elif ( LPC176X_CCLK <= 80000000U )
+  LPC176X_SCB.flashcfg = LPC176X_SCB_FLASHCFG_FLASHTIM( 0x3U );
+#elif ( LPC176X_CCLK <= 100000000U )
+  LPC176X_SCB.flashcfg = LPC176X_SCB_FLASHCFG_FLASHTIM( 0x4U );
+#else
+  LPC176X_SCB.flashcfg = LPC176X_SCB_FLASHCFG_FLASHTIM( 0x5U );
+#endif
+}
+
+/**
+ * @brief Stops the gpdma device.
+ */
+static BSP_START_TEXT_SECTION void lpc176x_stop_gpdma( void )
+{
+#ifdef LPC176X_STOP_GPDMA
+
+  bool has_power = ( LPC176X_SCB.pconp & LPC176X_SCB_PCONP_GPDMA ) != 0u;
+
+  if ( has_power ) {
+    GPDMA_CONFIG = 0u;
+    LPC176X_SCB.pconp &= ~LPC176X_SCB_PCONP_GPDMA;
+  }
+
+  /* else implies that the current module (gpdma) is turn off. Also,
+     there is nothing to do. */
+
+#endif
+}
+
+/**
+ * @brief Stops the usb device.
+ */
+static BSP_START_TEXT_SECTION void lpc176x_stop_usb( void )
+{
+#ifdef LPC176X_STOP_USB
+
+  bool has_power = ( LPC176X_SCB.pconp & LPC176X_SCB_PCONP_USB ) != 0u;
+
+  if ( has_power ) {
+    OTG_CLK_CTRL = 0u;
+
+    LPC176X_SCB.pconp &= ~LPC176X_SCB_PCONP_USB;
+    LPC176X_SCB.usbclksel = 0u;
+  }
+
+  /* else implies that the current module (usb) is turn off. Also,
+     there is nothing to do. */
+#endif
+}
+
+BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
+{
+  lpc176x_init_main_oscillator();
+  lpc176x_init_pll();
+}
+
+BSP_START_TEXT_SECTION void bsp_start_hook_1( void )
+{
+  lpc176x_init_memory_map();
+  lpc176x_init_memory_accelerator();
+  lpc176x_stop_gpdma();
+  lpc176x_stop_usb();
+  bsp_start_copy_sections();
+  bsp_start_clear_bss();
+
+  /* At this point we can use objects outside the .start section  */
+}
\ No newline at end of file
diff --git a/bsps/arm/lpc176x/start/linkcmds.lpc1768_mbed b/bsps/arm/lpc176x/start/linkcmds.lpc1768_mbed
new file mode 100644
index 0000000000..133d2f487c
--- /dev/null
+++ b/bsps/arm/lpc176x/start/linkcmds.lpc1768_mbed
@@ -0,0 +1,29 @@
+/* LPC1768 OEM Board from Embedded Artists */
+
+MEMORY {
+	ROM_INT (RX)  : ORIGIN = 0x00000000, LENGTH = 512k
+	RAM_INT (AIW) : ORIGIN = 0x10000000, LENGTH = 32k
+}
+
+REGION_ALIAS ("REGION_START", ROM_INT);
+REGION_ALIAS ("REGION_VECTOR", RAM_INT);
+REGION_ALIAS ("REGION_TEXT", ROM_INT);
+REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_RODATA", ROM_INT);
+REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_DATA", RAM_INT);
+REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT", RAM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST_DATA", RAM_INT);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_BSS", RAM_INT);
+REGION_ALIAS ("REGION_WORK", RAM_INT);
+REGION_ALIAS ("REGION_STACK", RAM_INT);
+REGION_ALIAS ("REGION_NOCACHE", RAM_INT);
+REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM_INT);
+
+bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 1024;
+bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align);
+
+INCLUDE linkcmds.armv7m
diff --git a/bsps/arm/lpc176x/start/linkcmds.lpc1768_mbed_ahb_ram b/bsps/arm/lpc176x/start/linkcmds.lpc1768_mbed_ahb_ram
new file mode 100644
index 0000000000..75bdd75d83
--- /dev/null
+++ b/bsps/arm/lpc176x/start/linkcmds.lpc1768_mbed_ahb_ram
@@ -0,0 +1,30 @@
+/* LPC1768 OEM Board from Embedded Artists */
+
+MEMORY {
+	ROM_INT (RX)  : ORIGIN = 0x00000000, LENGTH = 512k
+	RAM_INT (AIW) : ORIGIN = 0x10000000, LENGTH = 32k
+	RAM_AHB (AIW) : ORIGIN = 0x2007C000, LENGTH = 32k
+}
+
+REGION_ALIAS ("REGION_START", ROM_INT);
+REGION_ALIAS ("REGION_VECTOR", RAM_INT);
+REGION_ALIAS ("REGION_TEXT", ROM_INT);
+REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_RODATA", ROM_INT);
+REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_DATA", RAM_INT);
+REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT", RAM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST_DATA", RAM_INT);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_BSS", RAM_INT);
+REGION_ALIAS ("REGION_WORK", RAM_AHB);
+REGION_ALIAS ("REGION_STACK", RAM_AHB);
+REGION_ALIAS ("REGION_NOCACHE", RAM_INT);
+REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM_INT);
+
+bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 1024;
+bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align);
+
+INCLUDE linkcmds.armv7m
diff --git a/bsps/arm/lpc176x/start/linkcmds.lpc1768_mbed_ahb_ram_eth b/bsps/arm/lpc176x/start/linkcmds.lpc1768_mbed_ahb_ram_eth
new file mode 100644
index 0000000000..7d91d8a5ef
--- /dev/null
+++ b/bsps/arm/lpc176x/start/linkcmds.lpc1768_mbed_ahb_ram_eth
@@ -0,0 +1,41 @@
+/* LPC1768 OEM Board from Embedded Artists */
+
+MEMORY {
+	ROM_INT (RX)  : ORIGIN = 0x00000000, LENGTH = 512k
+	RAM_INT (AIW) : ORIGIN = 0x10000000, LENGTH = 32k
+	RAM_AHB1 (AIW) : ORIGIN = 0x2007C000, LENGTH = 16k
+	RAM_AHB2 (AIW) : ORIGIN = 0x20080000, LENGTH = 16k
+}
+
+REGION_ALIAS ("REGION_START", ROM_INT);
+REGION_ALIAS ("REGION_VECTOR", RAM_INT);
+REGION_ALIAS ("REGION_TEXT", ROM_INT);
+REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_RODATA", ROM_INT);
+REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_DATA", RAM_INT);
+REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT", RAM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST_DATA", RAM_INT);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_BSS", RAM_AHB1);
+REGION_ALIAS ("REGION_WORK", RAM_INT);
+REGION_ALIAS ("REGION_STACK", RAM_INT);
+REGION_ALIAS ("REGION_ETH", RAM_AHB2);
+REGION_ALIAS ("REGION_NOCACHE", RAM_INT);
+REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM_INT);
+
+bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 1024;
+bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align);
+
+SECTIONS {
+    .eth (NOLOAD) : ALIGN_WITH_INPUT {
+        bsp_section_eth_begin = .;
+        *(.eth)
+        bsp_section_eth_end = .;
+    } > REGION_ETH AT > REGION_ETH
+    bsp_section_eth_size = bsp_section_eth_end - bsp_section_eth_begin;
+}
+
+INCLUDE linkcmds.armv7m