diff options
| author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2019-08-16 19:14:33 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel@rtems.org> | 2020-01-17 16:17:42 -0600 |
| commit | ebf0f8f13fb2fd7a2f40bf8428f423f6ebbe0860 (patch) | |
| tree | 69eebebde279a6e7595f4c04f8e2f29259e42ed0 /bsps/arm/include/bsp/arm-gic-irq.h | |
| parent | posix_devctl - Add support for SOCKCLOSE (diff) | |
| download | rtems-ebf0f8f13fb2fd7a2f40bf8428f423f6ebbe0860.tar.bz2 | |
bsps/arm/shared: Add GICv3 implementation
This adds support for the GICv3 interrupt controller along with the
redistributor to control SGIs and PPIs which wasn't present in GICv2
implementations. GICv3 implementations only optionally support
memory-mapped GICC interface interaction and require system register
access be implemented, so the GICC interface is accessed only
through system registers.
Diffstat (limited to 'bsps/arm/include/bsp/arm-gic-irq.h')
| -rw-r--r-- | bsps/arm/include/bsp/arm-gic-irq.h | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/bsps/arm/include/bsp/arm-gic-irq.h b/bsps/arm/include/bsp/arm-gic-irq.h index b3e893de72..219c3c7189 100644 --- a/bsps/arm/include/bsp/arm-gic-irq.h +++ b/bsps/arm/include/bsp/arm-gic-irq.h @@ -85,6 +85,12 @@ typedef enum { ARM_GIC_IRQ_SOFTWARE_IRQ_TO_SELF } arm_gic_irq_software_irq_target_filter; +void arm_gic_trigger_sgi( + rtems_vector_number vector, + arm_gic_irq_software_irq_target_filter filter, + uint8_t targets +); + static inline rtems_status_code arm_gic_irq_generate_software_irq( rtems_vector_number vector, arm_gic_irq_software_irq_target_filter filter, @@ -94,14 +100,7 @@ static inline rtems_status_code arm_gic_irq_generate_software_irq( rtems_status_code sc = RTEMS_SUCCESSFUL; if (vector <= ARM_GIC_IRQ_SGI_15) { - volatile gic_dist *dist = ARM_GIC_DIST; - - dist->icdsgir = GIC_DIST_ICDSGIR_TARGET_LIST_FILTER(filter) - | GIC_DIST_ICDSGIR_CPU_TARGET_LIST(targets) -#ifdef BSP_ARM_GIC_ENABLE_FIQ_FOR_GROUP_0 - | GIC_DIST_ICDSGIR_NSATT -#endif - | GIC_DIST_ICDSGIR_SGIINTID(vector); + arm_gic_trigger_sgi(vector, filter, targets); } else { sc = RTEMS_INVALID_ID; } |