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authorChristian Mauderer <christian.mauderer@embedded-brains.de>2020-11-17 10:11:23 +0100
committerChristian Mauderer <christian.mauderer@embedded-brains.de>2020-11-20 08:53:19 +0100
commit57b5b29ce41c093c527e757335c85293b436b366 (patch)
tree476d7cb20793e88f8bb277851e7a6a67bb95d7be /bsps/arm/imxrt/nxp
parent8abf858cf583f535b7e44c63ea40f1d30bbb5e7b (diff)
downloadrtems-57b5b29ce41c093c527e757335c85293b436b366.tar.bz2
bsp/imxrt: Adapt imported files
Update #4180
Diffstat (limited to 'bsps/arm/imxrt/nxp')
-rw-r--r--bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c12
-rw-r--r--bsps/arm/imxrt/nxp/boards/evkbimxrt1050/pin_mux.c6
-rw-r--r--bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpuart.c17
3 files changed, 35 insertions, 0 deletions
diff --git a/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c b/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c
index 2ed6638cbe..c23d5da356 100644
--- a/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c
+++ b/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c
@@ -30,7 +30,11 @@ processor_version: 0.0.0
board: IMXRT1050-EVKB
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+#ifndef __rtems__
#include "clock_config.h"
+#else /* __rtems__ */
+#include "fsl_clock_config.h"
+#endif /* __rtems__ */
#include "fsl_iomuxc.h"
/*******************************************************************************
@@ -41,7 +45,11 @@ board: IMXRT1050-EVKB
* Variables
******************************************************************************/
/* System clock frequency. */
+#ifndef __rtems__
extern uint32_t SystemCoreClock;
+#else /* __rtems__ */
+uint32_t SystemCoreClock;
+#endif /* __rtems__ */
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
@@ -216,6 +224,7 @@ void BOARD_BootClockRUN(void)
CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1);
/* Set Usdhc2 clock source. */
CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
+#ifndef __rtems__
/* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
* With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left
* unchanged.
@@ -242,6 +251,7 @@ void BOARD_BootClockRUN(void)
/* Set Flexspi clock source. */
CLOCK_SetMux(kCLOCK_FlexspiMux, 1);
#endif
+#endif /* __rtems__ */
/* Disable CSI clock gate. */
CLOCK_DisableClock(kCLOCK_Csi);
/* Set CSI_PODF. */
@@ -353,6 +363,7 @@ void BOARD_BootClockRUN(void)
CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
/* Init ARM PLL. */
CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN);
+#ifndef __rtems__
/* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
* With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left
* unchanged. Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as
@@ -389,6 +400,7 @@ void BOARD_BootClockRUN(void)
/* Disable Usb1 PLL output for USBPHY1. */
CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK;
#endif
+#endif /* __rtems__ */
/* DeInit Audio PLL. */
CLOCK_DeinitAudioPll();
/* Bypass Audio PLL. */
diff --git a/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/pin_mux.c b/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/pin_mux.c
index 25ca313926..acb13cfdc2 100644
--- a/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/pin_mux.c
+++ b/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/pin_mux.c
@@ -270,6 +270,9 @@ BOARD_InitDEBUG_UARTPins:
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
+#ifdef __rtems__
+BSP_START_TEXT_SECTION
+#endif /* __rtems__ */
void BOARD_InitDEBUG_UARTPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
@@ -355,6 +358,9 @@ BOARD_InitSDRAMPins:
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
+#ifdef __rtems__
+BSP_START_TEXT_SECTION
+#endif /* __rtems__ */
void BOARD_InitSDRAMPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
diff --git a/bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpuart.c b/bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpuart.c
index 379fd8aec0..2f02aabe16 100644
--- a/bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpuart.c
+++ b/bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpuart.c
@@ -240,7 +240,11 @@ static void LPUART_ReadNonBlocking(LPUART_Type *base, uint8_t *data, size_t leng
* retval kStatus_LPUART_BaudrateNotSupport Baudrate is not support in current clock source.
* retval kStatus_Success LPUART initialize succeed
*/
+#ifndef __rtems__
status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz)
+#else /* __rtems__ */
+status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz, bool do_reset)
+#endif /* __rtems__ */
{
assert(NULL != config);
assert(0U < config->baudRate_Bps);
@@ -286,6 +290,7 @@ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t
}
}
+#ifndef __rtems__
/* Check to see if actual baud rate is within 3% of desired baud rate
* based on the best calculate OSR value */
if (baudDiff > ((config->baudRate_Bps / 100U) * 3U))
@@ -294,6 +299,12 @@ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t
status = kStatus_LPUART_BaudrateNotSupport;
}
else
+#else /* __rtems__ */
+ /*
+ * Better to have any baudrate then none. With this change, the function can
+ * not fail any more.
+ */
+#endif /* __rtems__ */
{
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
@@ -309,7 +320,13 @@ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t
#if defined(FSL_FEATURE_LPUART_HAS_GLOBAL) && FSL_FEATURE_LPUART_HAS_GLOBAL
/*Reset all internal logic and registers, except the Global Register */
+#ifndef __rtems__
LPUART_SoftwareReset(base);
+#else /* __rtems__ */
+ if (do_reset) {
+ LPUART_SoftwareReset(base);
+ }
+#endif /* __rtems__ */
#else
/* Disable LPUART TX RX before setting. */
base->CTRL &= ~(LPUART_CTRL_TE_MASK | LPUART_CTRL_RE_MASK);