bsps: Move interrupt controller support to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

2 files changed, 503 insertions, 0 deletions

diff --git a/bsps/arm/edb7312/irq/bsp_irq_asm.S b/bsps/arm/edb7312/irq/bsp_irq_asm.S
new file mode 100644
index 0000000000..c48466967b
--- /dev/null
+++ b/bsps/arm/edb7312/irq/bsp_irq_asm.S
@@ -0,0 +1,323 @@
+/*
+ * Cirrus EP7312 Intererrupt handler
+ */
+
+/*
+ * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
+ *
+ * Copyright (c) 2002 by Charlie Steader <charlies@poliac.com>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+*/
+
+#define __asm__
+#include <bsp.h>
+#include <bsp/irq.h>
+
+	.extern edb7312_interrupt_dispatch
+
+/*
+ * Function to obtain, execute an IT handler and acknowledge the IT
+ */
+
+	.globl bsp_interrupt_dispatch
+bsp_interrupt_dispatch :
+/*
+ * Look at interrupt status register to determine source.
+ * From source, determine offset into expanded vector table
+ * and load handler address into r0.
+ */
+
+  ldr   r1, =0x80000000 /* close to interrupt status/mask registers 1 */
+  ldr   r2, =0x80001000 /* close to interrupt status/mask registers 2 */
+  ldr   r3, =0x80002000 /* close to interrupt status/mask registers 3 */
+
+  stmdb	  sp!,{r4, r5, r6}
+
+/*
+ * INTSR3
+ */
+check_dai:
+  ldr   r4, [r3, #0x240]
+  ldr   r5, [r3, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+  tst   r6, #0x0001
+  beq   check_extfiq
+  mov   r0, #BSP_DAIINT
+  b     get_handler
+
+/*
+ * INTSR1
+ */
+check_extfiq:
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+  tst   r6, #0x0001
+  beq   check_bl
+  mov   r0, #BSP_EXTFIQ
+  b     get_handler
+
+check_bl:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x0002
+  beq   check_we
+  mov   r0, #BSP_BLINT
+  b     get_handler
+
+check_we:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x0004
+  beq   check_mc
+  mov   r0, #BSP_WEINT
+  b     get_handler
+
+check_mc:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x0008
+  beq   check_cs
+  mov   r0, #BSP_MCINT
+  b     get_handler
+
+check_cs:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x0010
+  beq   check_e1
+  mov   r0, #BSP_CSINT
+  b     get_handler
+
+check_e1:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x0020
+  beq   check_e2
+  mov   r0, #BSP_EINT1
+  b     get_handler
+
+check_e2:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x0040
+  beq   check_e3
+  mov   r0, #BSP_EINT2
+  b     get_handler
+
+check_e3:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x0080
+  beq   check_tc1
+  mov   r0, #BSP_EINT3
+  b     get_handler
+
+check_tc1:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x0100
+  beq   check_tc2
+  mov   r0, #BSP_TC1OI
+  b     get_handler
+
+check_tc2:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x0200
+  beq   check_rtc
+  mov   r0, #BSP_TC2OI
+  b     get_handler
+
+check_rtc:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x0400
+  beq   check_tick
+  mov   r0, #BSP_RTCMI
+  b     get_handler
+
+check_tick:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x0800
+  beq   check_utx1
+  mov   r0, #BSP_TINT
+  b     get_handler
+
+check_utx1:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x1000
+  beq   check_urx1
+  mov   r0, #BSP_UTXINT1
+  b     get_handler
+
+check_urx1:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x2000
+  beq   check_ums
+  mov   r0, #BSP_URXINT1
+  b     get_handler
+
+check_ums:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x4000
+  beq   check_sse
+  mov   r0, #BSP_UMSINT
+  b     get_handler
+
+check_sse:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r1, #0x240]
+  ldr   r5, [r1, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x8000
+  beq   check_kbd
+  mov   r0, #BSP_SSEOTI
+  b     get_handler
+
+/*
+ * INTSR2
+ */
+check_kbd:
+  ldr   r4, [r2, #0x240]
+  ldr   r5, [r2, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+  tst   r6, #0x0001
+  beq   check_ss2rx
+  mov   r0, #BSP_KBDINT
+  b     get_handler
+
+check_ss2rx:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r2, #0x240]
+  ldr   r5, [r2, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x0002
+  beq   check_ss2tx
+  mov   r0, #BSP_SS2RX
+  b     get_handler
+
+check_ss2tx:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r2, #0x240]
+  ldr   r5, [r2, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x0004
+  beq   check_utx2
+  mov   r0, #BSP_SS2TX
+  b     get_handler
+
+check_utx2:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r2, #0x240]
+  ldr   r5, [r2, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x1000
+  beq   check_urx2
+  mov   r0, #BSP_UTXINT2
+  b     get_handler
+
+check_urx2:
+#if 0
+MUST REMEMBER TO UNCOMMENT IF THIS HANDLER MOVES
+  ldr   r4, [r2, #0x240]
+  ldr   r5, [r2, #0x280]
+  and   r6, r4, r5 /* only look at interrupts which are enabled */
+#endif
+  tst   r6, #0x2000
+  beq   IRQ_NoInterrupt
+  mov   r0, #BSP_URXINT2
+  b     get_handler
+
+get_handler:
+
+  ldmia	  sp!,{r4, r5, r6}
+
+  /*
+   * re-enable interrupts at processor level as the current
+   * interrupt source is now masked via VEGA logic
+   */
+/*
+  mrs	r1, cpsr
+  and	r1, r1, #0xFFFFFF3F
+  msr	cpsr, r1
+*/
+
+  stmdb sp!,{lr}
+  bl    edb7312_interrupt_dispatch
+  ldmia sp!,{lr}
+
+IRQ_NoInterrupt:
+  /* return to the "main" interrupt handler */
+  mov pc, lr
diff --git a/bsps/arm/edb7312/irq/irq.c b/bsps/arm/edb7312/irq/irq.c
new file mode 100644
index 0000000000..1d9151a1bd
--- /dev/null
+++ b/bsps/arm/edb7312/irq/irq.c
@@ -0,0 +1,180 @@
+/*
+ * Cirrus EP7312 Intererrupt handler
+ */
+
+/*
+ * Copyright (c) 2010 embedded brains GmbH.
+ *
+ * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
+ *
+ * Copyright (c) 2002 by Charlie Steader <charlies@poliac.com>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+*/
+
+#include <rtems/score/armv4.h>
+
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <bsp/irq-generic.h>
+
+#include <ep7312.h>
+
+void edb7312_interrupt_dispatch(rtems_vector_number vector)
+{
+  bsp_interrupt_handler_dispatch(vector);
+}
+
+void bsp_interrupt_vector_enable(rtems_vector_number vector)
+{
+    bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+
+    if(vector >= BSP_EXTFIQ && vector <= BSP_SSEOTI)
+    {
+        /* interrupt managed by INTMR1 and INTSR1 */
+        *EP7312_INTMR1 |= (1 << vector);
+    }
+    else if(vector >= BSP_KBDINT && vector <= BSP_SS2TX)
+    {
+        /* interrupt managed by INTMR2 and INTSR2 */
+        *EP7312_INTMR2 |= (1 << (vector - 16));
+    }
+    else if(vector >= BSP_UTXINT2 && vector <= BSP_URXINT2)
+    {
+        /* interrupt managed by INTMR2 and INTSR2 */
+        *EP7312_INTMR2 |= (1 << (vector - 7));
+    }
+    else if(vector == BSP_DAIINT)
+    {
+        /* interrupt managed by INTMR3 and INTSR3 */
+        *EP7312_INTMR3 |= (1 << (vector - 21));
+    }
+}
+
+void bsp_interrupt_vector_disable(rtems_vector_number vector)
+{
+    bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+
+    if(vector >= BSP_EXTFIQ && vector <= BSP_SSEOTI)
+    {
+        /* interrupt managed by INTMR1 and INTSR1 */
+        *EP7312_INTMR1 &= ~(1 << vector);
+    }
+    else if(vector >= BSP_KBDINT && vector <= BSP_SS2TX)
+    {
+        /* interrupt managed by INTMR2 and INTSR2 */
+        *EP7312_INTMR2 &= ~(1 << (vector - 16));
+    }
+    else if(vector >= BSP_UTXINT2 && vector <= BSP_URXINT2)
+    {
+        /* interrupt managed by INTMR2 and INTSR2 */
+        *EP7312_INTMR2 &= ~(1 << (vector - 7));
+    }
+    else if(vector == BSP_DAIINT)
+    {
+        /* interrupt managed by INTMR3 and INTSR3 */
+        *EP7312_INTMR3 &= ~(1 << (vector - 21));
+    }
+}
+
+rtems_status_code bsp_interrupt_facility_initialize(void)
+{
+  uint32_t int_stat = 0;
+
+  /* mask all interrupts */
+  *EP7312_INTMR1 = 0x0;
+  *EP7312_INTMR2 = 0x0;
+  *EP7312_INTMR3 = 0x0;
+  
+  /* clear all pending interrupt status' */
+  int_stat = *EP7312_INTSR1;
+  if(int_stat & EP7312_INTR1_EXTFIQ)
+  {
+  }
+  if(int_stat & EP7312_INTR1_BLINT)
+  {
+      *EP7312_BLEOI = 0xFFFFFFFF;
+  }
+  if(int_stat & EP7312_INTR1_WEINT)
+  {
+      *EP7312_TEOI = 0xFFFFFFFF;
+  }
+  if(int_stat & EP7312_INTR1_MCINT)
+  {
+  }
+  if(int_stat & EP7312_INTR1_CSINT)
+  {
+      *EP7312_COEOI = 0xFFFFFFFF;
+  }
+  if(int_stat & EP7312_INTR1_EINT1)
+  {
+  }
+  if(int_stat & EP7312_INTR1_EINT2)
+  {
+  }
+  if(int_stat & EP7312_INTR1_EINT3)
+  {
+  }
+  if(int_stat & EP7312_INTR1_TC1OI)
+  {
+      *EP7312_TC1EOI = 0xFFFFFFFF;
+  }
+  if(int_stat & EP7312_INTR1_TC2OI)
+  {
+      *EP7312_TC2EOI = 0xFFFFFFFF;
+  }
+  if(int_stat & EP7312_INTR1_RTCMI)
+  {
+      *EP7312_RTCEOI = 0xFFFFFFFF;
+  }
+  if(int_stat & EP7312_INTR1_TINT)
+  {
+      *EP7312_TEOI = 0xFFFFFFFF;
+  }
+  if(int_stat & EP7312_INTR1_URXINT1)
+  {
+  }
+  if(int_stat & EP7312_INTR1_UTXINT1)
+  {
+  }
+  if(int_stat & EP7312_INTR1_UMSINT)
+  {
+      *EP7312_UMSEOI = 0xFFFFFFFF;
+  }
+  if(int_stat & EP7312_INTR1_SSEOTI)
+  {
+      *EP7312_SYNCIO;
+  }
+  int_stat = *EP7312_INTSR1;
+  
+  int_stat = *EP7312_INTSR2;
+  if(int_stat & EP7312_INTR2_KBDINT)
+  {
+      *EP7312_KBDEOI = 0xFFFFFFFF;
+  }
+  if(int_stat & EP7312_INTR2_SS2RX)
+  {
+  }
+  if(int_stat & EP7312_INTR2_SS2TX)
+  {
+  }
+  if(int_stat & EP7312_INTR2_URXINT2)
+  {
+  }
+  if(int_stat & EP7312_INTR2_UTXINT2)
+  {
+  }
+  int_stat = *EP7312_INTSR2;
+  
+  int_stat = *EP7312_INTSR3;
+  if(int_stat & EP7312_INTR2_DAIINT)
+  {
+  }
+  int_stat = *EP7312_INTSR3;
+
+  _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ARMV4_Exception_interrupt, NULL);
+
+  return RTEMS_SUCCESSFUL;
+}