bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

8 files changed, 423 insertions, 0 deletions

diff --git a/bsps/arm/csb337/start/bsp_specs b/bsps/arm/csb337/start/bsp_specs
new file mode 100644
index 0000000000..47dd31d46b
--- /dev/null
+++ b/bsps/arm/csb337/start/bsp_specs
@@ -0,0 +1,9 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{!nostdlib: %{qrtems: crti.o%s crtbegin.o%s}}
+
+*endfile:
+%{!qrtems: %(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s}
diff --git a/bsps/arm/csb337/start/bspreset.c b/bsps/arm/csb337/start/bspreset.c
new file mode 100644
index 0000000000..a4605dcaf3
--- /dev/null
+++ b/bsps/arm/csb337/start/bspreset.c
@@ -0,0 +1,31 @@
+/*
+ * Cogent CSB337 - AT91RM9200 Startup code
+ */
+
+/*
+ * Copyright (c) 2004 by Cogent Computer Systems
+ * Written by Jay Monkman <jtm@lopingdog.com>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+*/
+#include <bsp.h>
+#include <bsp/bootcard.h>
+#include <at91rm9200.h>
+#include <at91rm9200_pmc.h>
+#include <at91rm9200_emac.h>
+
+void bsp_reset(void)
+{
+  rtems_interrupt_level level;
+
+  rtems_interrupt_disable(level);
+    (void) level; /* avoid set but not used warning */
+
+    /* Enable the watchdog timer, then wait for the world to end. */
+    ST_REG(ST_WDMR) = ST_WDMR_RSTEN | 1;
+
+    while(1)
+      ;
+}
diff --git a/bsps/arm/csb337/start/bspstart.c b/bsps/arm/csb337/start/bspstart.c
new file mode 100644
index 0000000000..a47198598c
--- /dev/null
+++ b/bsps/arm/csb337/start/bspstart.c
@@ -0,0 +1,158 @@
+/*
+ * Cogent CSB337 - AT91RM9200 Startup Code
+ *
+ *  Copyright (c) 2004 by Cogent Computer Systems
+ *  Written by Jay Monkman <jtm@lopingdog.com>
+ *
+ *  Modified by Joel Sherill 
+ *  from OAR Corporation and 
+ *  Fernando Nicodemos <fgnicodemos@terra.com.br>
+ *  from NCB - Sistemas Embarcados Ltda. (Brazil)
+ * 
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/irq-generic.h>
+#include <at91rm9200.h>
+#include <at91rm9200_pmc.h>
+#include <at91rm9200_emac.h>
+#include <at91rm9200_gpio.h>
+#include <at91rm9200_usart.h>
+
+/* Function prototypes */
+static void fix_mac_addr(void);
+void bsp_usart_init(void);
+
+/*
+ * bsp_start_default - BSP initialization function
+ *
+ * This function is called before RTEMS is initialized and used
+ * adjust the kernel's configuration.
+ *
+ * This function also configures the CPU's memory protection unit.
+ *
+ * RESTRICTIONS/LIMITATIONS:
+ *   Since RTEMS is not configured, no RTEMS functions can be called.
+ */
+static void bsp_start_default( void )
+{
+  /* disable interrupts */
+  AIC_CTL_REG(AIC_IDCR) = 0xffffffff;
+
+  /*
+   * Some versions of the bootloader have the MAC address
+   * reversed. This fixes it, if necessary.
+   */
+  fix_mac_addr();
+
+  /*
+   * Init rtems PIO configuration for USARTs
+   */
+  bsp_usart_init(); 
+
+  /*
+   * Init rtems interrupt management
+   */
+  bsp_interrupt_initialize();
+
+} /* bsp_start */
+
+/*
+ * Some versions of the bootloader shipped with the CSB337
+ * reverse the MAC address. This function tests for that,
+ * and fixes the MAC address.
+ */
+static void fix_mac_addr(void)
+{
+  uint8_t addr[6];
+
+  /* Read the MAC address */
+  addr[0] = (EMAC_REG(EMAC_SA1L) >>  0) & 0xff;
+  addr[1] = (EMAC_REG(EMAC_SA1L) >>  8) & 0xff;
+  addr[2] = (EMAC_REG(EMAC_SA1L) >> 16) & 0xff;
+  addr[3] = (EMAC_REG(EMAC_SA1L) >> 24) & 0xff;
+  addr[4] = (EMAC_REG(EMAC_SA1H) >>  0) & 0xff;
+  addr[5] = (EMAC_REG(EMAC_SA1H) >>  8) & 0xff;
+
+  /* Check which 3 bytes have Cogent's OUI */
+  if ((addr[5] == 0x00) && (addr[4] == 0x23) && (addr[3] == 0x31)) {
+      EMAC_REG(EMAC_SA1L) = ((addr[5] <<  0) |
+                             (addr[4] <<  8) |
+                             (addr[3] << 16) |
+                             (addr[2] << 24));
+
+      EMAC_REG(EMAC_SA1H) = ((addr[1] <<  0) |
+                             (addr[0] <<  8));
+  }
+}
+
+/*
+ *
+ * NAME: bsp_usart_init - Function to setup the PIO in USART mode
+ *       before startup
+ *
+ * DESCRIPTION:
+ *   This function is called before usart driver is initialized and is
+ *   used to setup the proper mode of PIO operation for USART.
+ *
+ * NOTES:
+ *   The initialization could be done smarter by programming only the
+ *   bits you need to program for each USART when the port is ENABLED.
+ *
+ */
+void bsp_usart_init(void)
+{
+  /*
+   * Configure shared pins for USARTs.
+   * Disables the PIO from controlling the corresponding pin.
+   */
+  PIOA_REG(PIO_PDR) |= ( BIT5  |   /* USART3 TXD3  */
+                         BIT6  |   /* USART3 RXD3  */
+                         BIT17 |   /* USART0 TXD0  */
+                         BIT18 |   /* USART0 RXD0  */
+                         BIT22 |   /* USART2 RXD2  */
+                         BIT23 );  /* USART2 TXD2  */
+
+  PIOB_REG(PIO_PDR) |= ( BIT20 |   /* USART1 TXD1  */
+                         BIT21 );  /* USART1 RXD1  */
+
+  /**** PIO Controller A - Pins you want in mode B ****/
+  PIOA_REG(PIO_BSR) |=  ( BIT5 |   /* USART3 TXD3  */ /* add */
+                          BIT6 );  /* USART3 RXD3  */ 
+  PIOA_REG(PIO_ASR) &= ~( BIT5 |   /* USART3 TXD3  */
+                          BIT6 );  /* USART3 RXD3  */
+
+  /**** PIO Controller A - Pins you want in mode A ****/
+  PIOA_REG(PIO_ASR) |=  ( BIT17 |   /* USART0 TXD0  */
+                          BIT18 |   /* USART0 RXD0  */
+                          BIT22 |   /* USART2 RXD2  */
+                          BIT23 );  /* USART2 TXD2  */
+  PIOA_REG(PIO_BSR) &= ~( BIT17 |   /* USART0 TXD0  */ /* add */
+                          BIT18 |   /* USART0 RXD0  */
+                          BIT22 |   /* USART2 RXD2  */
+                          BIT23 );  /* USART2 TXD2  */
+
+  /**** PIO Controller B - Pins you want in mode A ****/
+  PIOB_REG(PIO_ASR) |=  ( BIT20 |   /* USART1 TXD1  */
+                          BIT21 );  /* USART1 RXD1  */
+  PIOB_REG(PIO_BSR) &= ~( BIT20 |   /* USART1 TXD1  */
+                          BIT21 );  /* USART1 RXD1  */
+
+  /**** PIO Controller B - Pins you want in mode B ****/
+  /**** none ****/
+
+  /* Enable the clock to the USARTs */
+  PMC_REG(PMC_PCER) |= ( PMC_PCR_PID_US0 |   /* USART 0 Peripheral Clock */
+                         PMC_PCR_PID_US1 |   /* USART 1 Peripheral Clock */
+                         PMC_PCR_PID_US2 |   /* USART 2 Peripheral Clock */ 
+                         PMC_PCR_PID_US3 );  /* USART 3 Peripheral Clock */
+} 
+
+/*
+ *  By making this a weak alias for bsp_start_default, a brave soul
+ *  can override the actual bsp_start routine used.
+ */
+void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default")));
diff --git a/bsps/arm/csb337/start/linkcmds.csb337 b/bsps/arm/csb337/start/linkcmds.csb337
new file mode 100644
index 0000000000..f59a33c703
--- /dev/null
+++ b/bsps/arm/csb337/start/linkcmds.csb337
@@ -0,0 +1,27 @@
+MEMORY {
+	SDRAM : ORIGIN = 0x20100000, LENGTH = 15M - 16k
+	SDRAM_MMU : ORIGIN = 0x20ffc000, LENGTH = 16k
+	SRAM : ORIGIN = 0x00200000, LENGTH = 16k
+}
+
+REGION_ALIAS ("REGION_START", SDRAM);
+REGION_ALIAS ("REGION_VECTOR", SRAM);
+REGION_ALIAS ("REGION_TEXT", SDRAM);
+REGION_ALIAS ("REGION_TEXT_LOAD", SDRAM);
+REGION_ALIAS ("REGION_RODATA", SDRAM);
+REGION_ALIAS ("REGION_RODATA_LOAD", SDRAM);
+REGION_ALIAS ("REGION_DATA", SDRAM);
+REGION_ALIAS ("REGION_DATA_LOAD", SDRAM);
+REGION_ALIAS ("REGION_FAST_TEXT", SDRAM);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", SDRAM);
+REGION_ALIAS ("REGION_FAST_DATA", SDRAM);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", SDRAM);
+REGION_ALIAS ("REGION_BSS", SDRAM);
+REGION_ALIAS ("REGION_WORK", SDRAM);
+REGION_ALIAS ("REGION_STACK", SDRAM);
+REGION_ALIAS ("REGION_NOCACHE", SDRAM);
+REGION_ALIAS ("REGION_NOCACHE_LOAD", SDRAM);
+
+_ttbl_base = ORIGIN (SDRAM_MMU);
+
+INCLUDE linkcmds.armv4
diff --git a/bsps/arm/csb337/start/linkcmds.csb637 b/bsps/arm/csb337/start/linkcmds.csb637
new file mode 100644
index 0000000000..91a34b7229
--- /dev/null
+++ b/bsps/arm/csb337/start/linkcmds.csb637
@@ -0,0 +1,27 @@
+MEMORY {
+	SDRAM : ORIGIN = 0x20100000, LENGTH = 63M - 16k
+	SDRAM_MMU : ORIGIN = 0x23ffc000, LENGTH = 16k
+	SRAM : ORIGIN = 0x00200000, LENGTH = 16k
+}
+
+REGION_ALIAS ("REGION_START", SDRAM);
+REGION_ALIAS ("REGION_VECTOR", SRAM);
+REGION_ALIAS ("REGION_TEXT", SDRAM);
+REGION_ALIAS ("REGION_TEXT_LOAD", SDRAM);
+REGION_ALIAS ("REGION_RODATA", SDRAM);
+REGION_ALIAS ("REGION_RODATA_LOAD", SDRAM);
+REGION_ALIAS ("REGION_DATA", SDRAM);
+REGION_ALIAS ("REGION_DATA_LOAD", SDRAM);
+REGION_ALIAS ("REGION_FAST_TEXT", SDRAM);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", SDRAM);
+REGION_ALIAS ("REGION_FAST_DATA", SDRAM);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", SDRAM);
+REGION_ALIAS ("REGION_BSS", SDRAM);
+REGION_ALIAS ("REGION_WORK", SDRAM);
+REGION_ALIAS ("REGION_STACK", SDRAM);
+REGION_ALIAS ("REGION_NOCACHE", SDRAM);
+REGION_ALIAS ("REGION_NOCACHE_LOAD", SDRAM);
+
+_ttbl_base = ORIGIN (SDRAM_MMU);
+
+INCLUDE linkcmds.armv4
diff --git a/bsps/arm/csb337/start/memmap.c b/bsps/arm/csb337/start/memmap.c
new file mode 100644
index 0000000000..bdd5487432
--- /dev/null
+++ b/bsps/arm/csb337/start/memmap.c
@@ -0,0 +1,50 @@
+/*
+ * CSB337 and CSB637 (KIT637_V6) Memory map
+ *
+ * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
+ * File from the old CSB337 RTEMS BSP
+ * 
+ *  Modified by Joel Sherill 
+ *  from OAR Corporation and 
+ *  Fernando Nicodemos <fgnicodemos@terra.com.br>
+ *  from NCB - Sistemas Embarcados Ltda. (Brazil)
+ * 
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <libcpu/mmu.h>
+
+#include <bspopts.h>
+
+/* Remember, the ARM920 has 64 TLBs. If you have more 1MB sections than
+ * that, you'll have TLB lookups, which could hurt performance.
+ */
+mmu_sect_map_t mem_map[] = {
+/*  <phys addr>  <virt addr> <size> <flags> */
+    {0x00200000, 0x00000000,   1,    MMU_CACHE_NONE},     /* SRAM */
+    {0x00200000, 0x00200000,   1,    MMU_CACHE_NONE},     /* SRAM */
+    {0x10000000, 0x10000000,   8,    MMU_CACHE_NONE},     /* FLASH */
+#if csb637 /* CSB637 or KIT637_V6 */
+    {0x20000000, 0x20000000,  64,    MMU_CACHE_WTHROUGH}, /* SDRAM */
+#elif kit637_v6 
+    {0x20000000, 0x20000000,  64,    MMU_CACHE_WTHROUGH}, /* SDRAM */
+#else /* CSB337 */
+    {0x20000000, 0x20000000,  32,    MMU_CACHE_WTHROUGH}, /* SDRAM */
+#endif
+#if ENABLE_LCD /* KIT637_V6 Video buffer */
+    {0x30000000, 0x30000000,   8,    MMU_CACHE_NONE},     /* Video buffer - 8MB */
+#else /* CSB337 Video buffer */
+    {0x30000000, 0x30000000,   1,    MMU_CACHE_NONE},     /* Video buffer - 1MB */
+#endif
+    {0x40000000, 0x40000000,   1,    MMU_CACHE_NONE},     /* Expansion CS0 */
+    {0x50000000, 0x50000000,   1,    MMU_CACHE_NONE},     /* CF CE 1 */
+    {0x60000000, 0x60000000,   1,    MMU_CACHE_NONE},     /* CF CE 1 */
+    {0x70000000, 0x70000000,   1,    MMU_CACHE_NONE},     /* CF CE 2 */
+    {0x80000000, 0x80000000,   1,    MMU_CACHE_NONE},     /* Expansion CS0 */
+    {0xfff00000, 0xfff00000,   1,    MMU_CACHE_NONE},     /* Internal regs */
+    {0x00000000, 0x00000000,   0,    0}                   /* The end */
+};
+
diff --git a/bsps/arm/csb337/start/pmc.c b/bsps/arm/csb337/start/pmc.c
new file mode 100644
index 0000000000..a15bf3c075
--- /dev/null
+++ b/bsps/arm/csb337/start/pmc.c
@@ -0,0 +1,96 @@
+/*
+ * Atmel AT91RM9200 PMC functions
+ *
+ * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <at91rm9200.h>
+#include <at91rm9200_pmc.h>
+
+int at91rm9200_get_mainclk(void)
+{
+    return BSP_MAIN_FREQ;
+}
+
+int at91rm9200_get_slck(void)
+{
+    return BSP_SLCK_FREQ;
+}
+
+int at91rm9200_get_mck(void)
+{
+    uint32_t mck_reg;
+    uint32_t mck_freq = 0;  /* to avoid warnings */
+    uint32_t pll_reg;
+    int prescaler = 0;  /* to avoid warnings */
+
+    mck_reg = PMC_REG(PMC_MCKR);
+
+    switch(mck_reg & PMC_MCKR_PRES_MASK) {
+    case PMC_MCKR_PRES_1:
+        prescaler = 1;
+        break;
+    case PMC_MCKR_PRES_2:
+        prescaler = 2;
+        break;
+    case PMC_MCKR_PRES_4:
+        prescaler = 4;
+        break;
+    case PMC_MCKR_PRES_8:
+        prescaler = 8;
+        break;
+    case PMC_MCKR_PRES_16:
+        prescaler = 16;
+        break;
+    case PMC_MCKR_PRES_32:
+        prescaler = 32;
+        break;
+    case PMC_MCKR_PRES_64:
+        prescaler = 64;
+        break;
+    }
+
+    /* Let's find out what MCK's source is */
+    switch (mck_reg & PMC_MCKR_CSS_MASK) {
+    case PMC_MCKR_CSS_SLOW:
+        /* I'm assuming the slow clock is 32.768 MHz */
+        mck_freq = at91rm9200_get_slck() / prescaler;
+        break;
+
+    case PMC_MCKR_CSS_MAIN:
+        mck_freq = at91rm9200_get_mainclk() / prescaler;
+        break;
+
+    case PMC_MCKR_CSS_PLLA:
+        pll_reg = PMC_REG(PMC_PLLAR);
+        mck_freq = at91rm9200_get_mainclk() / prescaler;
+        mck_freq = mck_freq / (pll_reg & PMC_PLLAR_DIV_MASK);
+        mck_freq = mck_freq * (((pll_reg & PMC_PLLAR_MUL_MASK) >> 16) + 1);
+        break;
+
+    case PMC_MCKR_CSS_PLLB:
+        pll_reg = PMC_REG(PMC_PLLBR);
+        mck_freq = at91rm9200_get_mainclk() / prescaler;
+        mck_freq = mck_freq / (pll_reg & PMC_PLLBR_DIV_MASK);
+        mck_freq = mck_freq * (((pll_reg & PMC_PLLBR_MUL_MASK) >> 16) + 1);
+        break;
+    }
+
+    if ((mck_reg & PMC_MCKR_MDIV_MASK) == PMC_MCKR_MDIV_2) {
+        mck_freq = mck_freq / 2;
+    } else if ((mck_reg & PMC_MCKR_MDIV_MASK) == PMC_MCKR_MDIV_3) {
+        mck_freq = mck_freq / 3;
+    } else if ((mck_reg & PMC_MCKR_MDIV_MASK) == PMC_MCKR_MDIV_4) {
+        mck_freq = mck_freq / 4;
+    }
+
+
+    return mck_freq;
+}
+
diff --git a/bsps/arm/csb337/start/umonsupp.c b/bsps/arm/csb337/start/umonsupp.c
new file mode 100644
index 0000000000..d4bf731c5d
--- /dev/null
+++ b/bsps/arm/csb337/start/umonsupp.c
@@ -0,0 +1,25 @@
+/*
+ *  COPYRIGHT (c) 1989-2009.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  Modified by Fernando Nicodemos <fgnicodemos@terra.com.br>
+ *  from NCB - Sistemas Embarcados Ltda. (Brazil)
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <rtems/umon.h>
+
+/*
+ * BSP specific routine to help when calling monConnect().  This
+ * returns the value known to uMon as MONCOMPTR.
+ */
+
+void *rtems_bsp_get_umon_monptr(void)
+{
+  return (void *)0x10000020;
+}
+