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authorKinsey Moore <kinsey.moore@oarcorp.com>2023-02-24 16:25:12 -0600
committerJoel Sherrill <joel@rtems.org>2023-02-27 12:31:48 -0600
commitd08dfc3d63543b0dd2f4a4e26966b22118c207a0 (patch)
tree5703b584e4c7cea32cef0747921e373379a50cf2 /bsps/aarch64
parentwaf: Update to waf 2.0.25 (diff)
downloadrtems-d08dfc3d63543b0dd2f4a4e26966b22118c207a0.tar.bz2
bsps/aarch64: Disable interrupts during MMU remap
Interrupts must be disabled during MMU remapping since the majority of RTEMS including interrupts expects normal memory mapping semantics such as unaligned accesses.
Diffstat (limited to 'bsps/aarch64')
-rw-r--r--bsps/aarch64/shared/mmu/vmsav8-64.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/bsps/aarch64/shared/mmu/vmsav8-64.c b/bsps/aarch64/shared/mmu/vmsav8-64.c
index 190a05f7d5..270b9319ad 100644
--- a/bsps/aarch64/shared/mmu/vmsav8-64.c
+++ b/bsps/aarch64/shared/mmu/vmsav8-64.c
@@ -47,12 +47,16 @@ rtems_status_code aarch64_mmu_map(
)
{
rtems_status_code sc;
+ ISR_Level level;
uint64_t max_mappable = 1LLU << aarch64_mmu_get_cpu_pa_bits();
if ( addr >= max_mappable || (addr + size) > max_mappable ) {
return RTEMS_INVALID_ADDRESS;
}
+ /* Disable interrupts so they don't run while the MMU is disabled */
+ _ISR_Local_disable( level );
+
aarch64_mmu_disable();
sc = aarch64_mmu_map_block(
(uint64_t *) bsp_translation_table_base,
@@ -70,5 +74,7 @@ rtems_status_code aarch64_mmu_map(
_AARCH64_Instruction_synchronization_barrier();
aarch64_mmu_enable();
+ _ISR_Local_enable( level );
+
return sc;
}