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author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2021-03-02 14:11:49 -0600 |
---|---|---|
committer | Joel Sherrill <joel@rtems.org> | 2021-03-05 08:43:15 -0600 |
commit | 2ee12f023de4ac669113c00b04b9a64d4ed99e3d (patch) | |
tree | af472fb389444463998bd5e3bbdbc3d2dcba6d11 /bsps/aarch64 | |
parent | bsps/aarch64: Resolve usage of SUBALIGN() (diff) | |
download | rtems-2ee12f023de4ac669113c00b04b9a64d4ed99e3d.tar.bz2 |
bsps: Allow override of ARM TM27 IRQs
ZynqMP hardware appears to have an odd hard-wired SGI implementation in
which the SGIs are permanently set as enabled or disabled. Allow the
TM27 IRQs to be overridden as necessary.
Diffstat (limited to 'bsps/aarch64')
-rw-r--r-- | bsps/aarch64/xilinx-zynqmp/include/tm27.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/bsps/aarch64/xilinx-zynqmp/include/tm27.h b/bsps/aarch64/xilinx-zynqmp/include/tm27.h index 7598570c64..204748dd9d 100644 --- a/bsps/aarch64/xilinx-zynqmp/include/tm27.h +++ b/bsps/aarch64/xilinx-zynqmp/include/tm27.h @@ -41,6 +41,14 @@ #ifndef __tm27_h #define __tm27_h +/* + * On ZynqMP hardware, SGI0-7 are permanently enabled for IPI usage while + * SGI8-15 are permanently disabled along with PPI16-24. Override tm27's usage + * of SGI12 and SGI13 with SGI6 and SGI7. + */ +#define ARM_GIC_TM27_IRQ_LOW ARM_GIC_IRQ_SGI_6 +#define ARM_GIC_TM27_IRQ_HIGH ARM_GIC_IRQ_SGI_7 + #include <dev/irq/arm-gic-tm27.h> #endif /* __tm27_h */ |