diff options
author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2021-07-26 15:43:00 -0500 |
---|---|---|
committer | Joel Sherrill <joel@rtems.org> | 2021-09-21 08:58:32 -0500 |
commit | 5f652cb27e0134362e0160135124352539315845 (patch) | |
tree | a370df31b31472331566975319b8fc9fa950d4d4 /bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c | |
parent | bsps/gicv2: Allow BSPs to define IRQ attributes (diff) | |
download | rtems-5f652cb27e0134362e0160135124352539315845.tar.bz2 |
cpukit: Add AArch64 SMP Support
This adds SMP support for AArch64 in cpukit and for the ZynqMP BSPs.
Diffstat (limited to 'bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c')
-rw-r--r-- | bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c | 28 |
1 files changed, 20 insertions, 8 deletions
diff --git a/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c b/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c index 8d302e97b5..09012c9db5 100644 --- a/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c +++ b/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c @@ -41,13 +41,6 @@ BSP_START_DATA_SECTION static const aarch64_mmu_config_entry zynqmp_mmu_config_table[] = { AARCH64_MMU_DEFAULT_SECTIONS, -#if defined( RTEMS_SMP ) - { - .begin = 0xffff0000U, - .end = 0xffffffffU, - .flags = AARCH64_MMU_DEVICE - }, -#endif { .begin = 0xf9000000U, .end = 0xf9100000U, @@ -70,8 +63,27 @@ zynqmp_setup_mmu_and_cache( void ) { aarch64_mmu_setup(); - aarch64_mmu_setup_translation_table_and_enable( + aarch64_mmu_setup_translation_table( &zynqmp_mmu_config_table[ 0 ], RTEMS_ARRAY_SIZE( zynqmp_mmu_config_table ) ); + + aarch64_mmu_enable(); +} + +/* + * Make weak and let the user override. + */ +BSP_START_TEXT_SECTION void zynqmp_setup_secondary_cpu_mmu_and_cache( void ) +__attribute__ ( ( weak ) ); + +BSP_START_TEXT_SECTION void zynqmp_setup_secondary_cpu_mmu_and_cache( void ) +{ + /* Perform basic MMU setup */ + aarch64_mmu_setup(); + + /* Use the existing root page table already configured by CPU0 */ + _AArch64_Write_ttbr0_el1( (uintptr_t) bsp_translation_table_base ); + + aarch64_mmu_enable(); } |