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| author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2021-07-26 15:43:00 -0500 |
|---|---|---|
| committer | Joel Sherrill <joel@rtems.org> | 2021-09-21 08:58:32 -0500 |
| commit | 5f652cb27e0134362e0160135124352539315845 (patch) | |
| tree | a370df31b31472331566975319b8fc9fa950d4d4 /bsps/aarch64/xilinx-zynqmp/include/bsp.h | |
| parent | bsps/gicv2: Allow BSPs to define IRQ attributes (diff) | |
| download | rtems-5f652cb27e0134362e0160135124352539315845.tar.bz2 | |
cpukit: Add AArch64 SMP Support
This adds SMP support for AArch64 in cpukit and for the ZynqMP BSPs.
Diffstat (limited to 'bsps/aarch64/xilinx-zynqmp/include/bsp.h')
| -rw-r--r-- | bsps/aarch64/xilinx-zynqmp/include/bsp.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/bsps/aarch64/xilinx-zynqmp/include/bsp.h b/bsps/aarch64/xilinx-zynqmp/include/bsp.h index 6d49b9ad2a..d937a313f2 100644 --- a/bsps/aarch64/xilinx-zynqmp/include/bsp.h +++ b/bsps/aarch64/xilinx-zynqmp/include/bsp.h @@ -60,6 +60,7 @@ extern "C" { #define BSP_ARM_GIC_DIST_BASE 0xf9010000 #define BSP_RESET_SMC +#define BSP_CPU_ON_USES_SMC /** * @brief Zynq UltraScale+ MPSoC specific set up of the MMU. @@ -68,6 +69,14 @@ extern "C" { */ BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void); +/** + * @brief Zynq UltraScale+ MPSoC specific set up of the MMU for non-primary + * cores. + * + * Provide in the application to override the defaults in the BSP. + */ +BSP_START_TEXT_SECTION void zynqmp_setup_secondary_cpu_mmu_and_cache( void ); + void zynqmp_debug_console_flush(void); uint32_t zynqmp_clock_i2c0(void); |