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authorChris Johns <chrisj@rtems.org>2022-07-22 16:27:12 +1000
committerChris Johns <chrisj@rtems.org>2022-07-28 09:04:46 +1000
commit51ffa21011a8f62649af0c98d27a1717eaa1e96d (patch)
tree1e05bf98a9c88667c1ebe31a76832c7d688800c7 /bsps/aarch64/xilinx-versal/include/bsp.h
parentbasp/aarch64: Make the unexpected sections origin address 64bit (diff)
downloadrtems-51ffa21011a8f62649af0c98d27a1717eaa1e96d.tar.bz2
aarch64/versal: Support DDRMC0 region 0 and 1
- Support DDRMC0 region 0 up to 2G in size - Support DDRMC0 region 1 with DDR memory greater than 2G up to the DDRMC0 max amount - Extend the heap with region 1's memory Closes #4684
Diffstat (limited to 'bsps/aarch64/xilinx-versal/include/bsp.h')
-rw-r--r--bsps/aarch64/xilinx-versal/include/bsp.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/bsps/aarch64/xilinx-versal/include/bsp.h b/bsps/aarch64/xilinx-versal/include/bsp.h
index 2017e10ade..0bd93f28bc 100644
--- a/bsps/aarch64/xilinx-versal/include/bsp.h
+++ b/bsps/aarch64/xilinx-versal/include/bsp.h
@@ -47,6 +47,7 @@
#ifndef ASM
#include <bsp/default-initial-extension.h>
+#include <bsp/linker-symbols.h>
#include <bsp/start.h>
#include <rtems.h>
@@ -61,6 +62,14 @@ extern "C" {
#define BSP_RESET_SMC
+/*
+ * DDRMC mapping
+ */
+LINKER_SYMBOL(bsp_r0_ram_base)
+LINKER_SYMBOL(bsp_r0_ram_end)
+LINKER_SYMBOL(bsp_r1_ram_base)
+LINKER_SYMBOL(bsp_r1_ram_end)
+
/**
* @brief Versal specific set up of the MMU.
*