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author | Eric Norum <WENorum@lbl.gov> | 2006-02-28 20:50:03 +0000 |
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committer | Eric Norum <WENorum@lbl.gov> | 2006-02-28 20:50:03 +0000 |
commit | f7842ce207ea410a73130c9fab3da1f63dbd6d8a (patch) | |
tree | 3177532763a0280f30da020e8ff3fc9d65eda3d0 | |
parent | Revert to cd'ing into gcc-%{gcc_version} for gcc_update (diff) | |
download | rtems-f7842ce207ea410a73130c9fab3da1f63dbd6d8a.tar.bz2 |
Just "cc" in the clobbered register list for interrupt enable/disable/flash
operations. The "memory" barrier will move the the generic interrupt
enable/disable/flash macros.
-rw-r--r-- | cpukit/score/cpu/m68k/ChangeLog | 15 | ||||
-rw-r--r-- | cpukit/score/cpu/m68k/rtems/score/m68k.h | 14 |
2 files changed, 24 insertions, 5 deletions
diff --git a/cpukit/score/cpu/m68k/ChangeLog b/cpukit/score/cpu/m68k/ChangeLog index 72d7fbcd6b..18a295456b 100644 --- a/cpukit/score/cpu/m68k/ChangeLog +++ b/cpukit/score/cpu/m68k/ChangeLog @@ -1,3 +1,18 @@ +2006-02-28 Eric Norum <norume@aps.anl.gov> + + PR 904/patch + * rtems/score/m68k.h: Just "cc" in the clobbered register list for + interrupt enable/disable/flash operations. The "memory" barrier will + move the the generic interrupt enable/disable/flash macros. + +2006-02-24 Eric Norum <norume@aps.anl.gov> + + PR 904/patch + * rtems/score/m68k.h: Add "memory" to the clobbered register list for + interrupt enable/disable/flash operations. This is necessary to prevent + the compiler from hoisting/sinking other operations past the interrupt + enable/disable/flash operations. + 2006-01-16 Joel Sherrill <joel@OARcorp.com> * rtems/score/cpu.h: Part of a large patch to improve Doxygen output. diff --git a/cpukit/score/cpu/m68k/rtems/score/m68k.h b/cpukit/score/cpu/m68k/rtems/score/m68k.h index d336b981f8..45277bfc20 100644 --- a/cpukit/score/cpu/m68k/rtems/score/m68k.h +++ b/cpukit/score/cpu/m68k/rtems/score/m68k.h @@ -280,17 +280,19 @@ extern "C" { asm volatile ( "move.w %%sr,%0\n\t" \ "or.l %0,%1\n\t" \ "move.w %1,%%sr" \ - : "=d" (_level), "=d"(_tmpsr) : "1"(_tmpsr) ); \ + : "=d" (_level), "=d"(_tmpsr) : "1"(_tmpsr) \ + : "cc" ); \ } while( 0 ) #else #define m68k_disable_interrupts( _level ) \ asm volatile ( "move.w %%sr,%0\n\t" \ "or.w #0x0700,%%sr" \ - : "=d" (_level)) + : "=d" (_level) \ + : : "cc" ) #endif #define m68k_enable_interrupts( _level ) \ - asm volatile ( "move.w %0,%%sr " : : "d" (_level)); + asm volatile ( "move.w %0,%%sr " : : "d" (_level) : "cc"); #if ( M68K_COLDFIRE_ARCH == 1 ) #define m68k_flash_interrupts( _level ) \ @@ -298,13 +300,15 @@ extern "C" { asm volatile ( "move.w %2,%%sr\n\t" \ "or.l %2,%1\n\t" \ "move.w %1,%%sr" \ - : "=d"(_tmpsr) : "0"(_tmpsr), "d"(_level) ); \ + : "=d"(_tmpsr) : "0"(_tmpsr), "d"(_level) \ + : "cc"); \ } while( 0 ) #else #define m68k_flash_interrupts( _level ) \ asm volatile ( "move.w %0,%%sr\n\t" \ "or.w #0x0700,%%sr" \ - : : "d" (_level)) + : : "d" (_level) \ + : "cc" ) #endif #define m68k_get_interrupt_level( _level ) \ |