Synchronization with RTEMS CVS (HEAD revision).

4 files changed, 27 insertions, 5 deletions

diff --git a/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog b/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
index 23482c0189..da3a93fddf 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
@@ -1,3 +1,10 @@
+2011-02-10	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* configure.ac: Added GEN83XX_ENABLE_INTERRUPT_NESTING BSP option.
+	* irq/irq.c: Use GEN83XX_ENABLE_INTERRUPT_NESTING option.  Disable
+	interrupts to protect critical section.
+	* make/custom/gen83xx.inc: Enable strict aliasing.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/configure.ac b/c/src/lib/libbsp/powerpc/gen83xx/configure.ac
index 972eb07c05..a95442b5f6 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/configure.ac
+++ b/c/src/lib/libbsp/powerpc/gen83xx/configure.ac
@@ -62,6 +62,9 @@ RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[1])
 RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE], [If defined, then the PowerPC specific
  code in RTEMS will use data cache instructions to optimize the context switch code.])
 
+RTEMS_BSPOPTS_SET([GEN83XX_ENABLE_INTERRUPT_NESTING],[*],[1])
+RTEMS_BSPOPTS_HELP([GEN83XX_ENABLE_INTERRUPT_NESTING],[enable interrupt nesting])
+
 RTEMS_CHECK_NETWORKING
 AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
 
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.c b/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.c
index 869bffd65d..fe4d2c84dd 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.c
@@ -379,7 +379,12 @@ rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number irqnum)
 	if (MPC83XX_IPIC_IS_VALID_VECTOR( vecnum)) {
 		rsc_ptr = &mpc83xx_ipic_isrc_rsc [vecnum];
 		if (rsc_ptr->mask_reg != NULL) {
-			*(rsc_ptr->mask_reg) |= 1 << (31 - rsc_ptr->bit_num);
+			uint32_t bit = 1U << (31 - rsc_ptr->bit_num);
+			rtems_interrupt_level level;
+
+			rtems_interrupt_disable(level);
+			*(rsc_ptr->mask_reg) |= bit;
+			rtems_interrupt_enable(level);
 		}
 	}
 
@@ -394,14 +399,18 @@ rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number irqnum)
 	if (MPC83XX_IPIC_IS_VALID_VECTOR( vecnum)) {
 		rsc_ptr = &mpc83xx_ipic_isrc_rsc [vecnum];
 		if (rsc_ptr->mask_reg != NULL) {
-			*(rsc_ptr->mask_reg) &= ~(1 << (31 - rsc_ptr->bit_num));
+			uint32_t bit = 1U << (31 - rsc_ptr->bit_num);
+			rtems_interrupt_level level;
+
+			rtems_interrupt_disable(level);
+			*(rsc_ptr->mask_reg) &= ~bit;
+			rtems_interrupt_enable(level);
 		}
 	}
 
 	return RTEMS_SUCCESSFUL;
 }
 
-
 /*
  *  IRQ Handler: this is called from the primary exception dispatcher
  */
@@ -433,6 +442,7 @@ static int BSP_irq_handle_at_ipic( unsigned excNum)
 	 * exceptions and dispatch the handler.
 	 */
 	if (MPC83XX_IPIC_IS_VALID_VECTOR( vecnum)) {
+#ifdef GEN83XX_ENABLE_INTERRUPT_NESTING
 		mask_ptr = &mpc83xx_ipic_prio2mask [vecnum];
 
 		rtems_interrupt_disable( level);
@@ -455,10 +465,12 @@ static int BSP_irq_handle_at_ipic( unsigned excNum)
 		if (excNum != ASM_E300_CRIT_VECTOR) {
 			msr = ppc_external_exceptions_enable();
 		}
+#endif /* GEN83XX_ENABLE_INTERRUPT_NESTING */
 
 		/* Dispatch interrupt handlers */
 		bsp_interrupt_handler_dispatch( vecnum + BSP_IPIC_IRQ_LOWEST_OFFSET);
 
+#ifdef GEN83XX_ENABLE_INTERRUPT_NESTING
 		/* Restore machine state */
 		if (excNum != ASM_E300_CRIT_VECTOR) {
 			ppc_external_exceptions_disable( msr);
@@ -471,6 +483,7 @@ static int BSP_irq_handle_at_ipic( unsigned excNum)
 		mpc83xx.ipic.semsr = mask_save.semsr_mask;
 		mpc83xx.ipic.sermr = mask_save.sermr_mask;
 		rtems_interrupt_enable( level);
+#endif /* GEN83XX_ENABLE_INTERRUPT_NESTING */
 	} else {
 		bsp_interrupt_handler_default( vecnum);
 	}
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/make/custom/gen83xx.inc b/c/src/lib/libbsp/powerpc/gen83xx/make/custom/gen83xx.inc
index 26bc8c7a7f..b8d6889bcc 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/make/custom/gen83xx.inc
+++ b/c/src/lib/libbsp/powerpc/gen83xx/make/custom/gen83xx.inc
@@ -16,8 +16,7 @@ RTEMS_CPU_MODEL=mpc83xx
 #  This contains the compiler options necessary to select the CPU model
 #  and (hopefully) optimize for it. 
 #
-CPU_CFLAGS = -mcpu=603e -mstrict-align -fno-strict-aliasing \
-             -meabi -msdata -fno-common
+CPU_CFLAGS = -mcpu=603e -meabi -msdata -fno-common -mstrict-align
 
 # optimize flag: typically -O2
 CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions