2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org>

	* sh7032/clock/ckinit.c, sh7750/include/sh/sh4uart.h,
	sh7750/sci/sh4uart.c: Cosmetics.

4 files changed, 25 insertions, 20 deletions

diff --git a/c/src/lib/libcpu/sh/ChangeLog b/c/src/lib/libcpu/sh/ChangeLog
index b1299a3d84..275301176e 100644
--- a/c/src/lib/libcpu/sh/ChangeLog
+++ b/c/src/lib/libcpu/sh/ChangeLog
@@ -1,3 +1,8 @@
+2004-03-31	Ralf Corsepius <ralf_corsepius@rtems.org>
+
+	* sh7032/clock/ckinit.c, sh7750/include/sh/sh4uart.h,
+	sh7750/sci/sh4uart.c: Cosmetics.
+
 2004-03-30	Ralf Corsepius <ralf_corsepius@rtems.org>
 
 	* sh7032/clock/ckinit.c, sh7032/delay/delay.c,
diff --git a/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c b/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c
index 9255c4c262..5548e3a8ef 100644
--- a/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c
+++ b/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c
@@ -103,7 +103,7 @@ static unsigned int sh_clicks_per_tick(
 #else
   double fclicks_per_tick = 
     ((double) clicks_per_sec * (double) usec_per_tick) / 1000000.0 ;
-  return (uint32_t  ) fclicks_per_tick ;
+  return (uint32_t) fclicks_per_tick ;
 #endif
 }
 
diff --git a/c/src/lib/libcpu/sh/sh7750/include/sh/sh4uart.h b/c/src/lib/libcpu/sh/sh7750/include/sh/sh4uart.h
index 04ab955569..f72f5144cd 100644
--- a/c/src/lib/libcpu/sh/sh7750/include/sh/sh4uart.h
+++ b/c/src/lib/libcpu/sh/sh7750/include/sh/sh4uart.h
@@ -35,35 +35,35 @@
 /*
  * Macros to call UART registers
  */
-#define SCRDR(n) (*(volatile uint8_t   *)SH7750_SCRDR(n))
+#define SCRDR(n) (*(volatile uint8_t*)SH7750_SCRDR(n))
 #define SCRDR1 SCRDR(1)
 #define SCRDR2 SCRDR(2)
-#define SCTDR(n) (*(volatile uint8_t   *)SH7750_SCTDR(n))
+#define SCTDR(n) (*(volatile uint8_t*)SH7750_SCTDR(n))
 #define SCTDR1 SCTDR(1)
 #define SCTDR2 SCTDR(2)
-#define SCSMR(n) ((n) == 1 ? *(volatile uint8_t   *)SH7750_SCSMR1 : \
-        *(volatile uint16_t   *)SH7750_SCSMR2)
+#define SCSMR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSMR1 : \
+        *(volatile uint16_t*)SH7750_SCSMR2)
 #define SCSMR1 SCSMR(1)
 #define SCSMR2 SCSMR(2)
-#define SCSCR(n) ((n) == 1 ? *(volatile uint8_t   *)SH7750_SCSCR1 : \
-        *(volatile uint16_t   *)SH7750_SCSCR2)
+#define SCSCR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSCR1 : \
+        *(volatile uint16_t*)SH7750_SCSCR2)
 #define SCSCR1 SCSCR(1)
 #define SCSCR2 SCSCR(2)
-#define SCSSR(n) ((n) == 1 ? *(volatile uint8_t   *)SH7750_SCSSR1 : \
-        *(volatile uint16_t   *)SH7750_SCSSR2)
+#define SCSSR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSSR1 : \
+        *(volatile uint16_t*)SH7750_SCSSR2)
 #define SCSSR1 SCSSR(1)
 #define SCSSR2 SCSSR(2)
-#define SCSPTR1 (*(volatile uint8_t   *)SH7750_SCSPTR1)
-#define SCSPTR2 (*(volatile uint16_t   *)SH7750_SCSPTR2)
-#define SCBRR(n) (*(volatile uint8_t   *)SH7750_SCBRR(n))
+#define SCSPTR1 (*(volatile uint8_t*)SH7750_SCSPTR1)
+#define SCSPTR2 (*(volatile uint16_t*)SH7750_SCSPTR2)
+#define SCBRR(n) (*(volatile uint8_t*)SH7750_SCBRR(n))
 #define SCBRR1 SCBRR(1)
 #define SCBRR2 SCBRR(2)
-#define SCFCR2 (*(volatile uint16_t   *)SH7750_SCFCR2)
-#define SCFDR2 (*(volatile uint16_t   *)SH7750_SCFDR2)
-#define SCLSR2 (*(volatile uint16_t   *)SH7750_SCLSR2)
+#define SCFCR2 (*(volatile uint16_t*)SH7750_SCFCR2)
+#define SCFDR2 (*(volatile uint16_t*)SH7750_SCFDR2)
+#define SCLSR2 (*(volatile uint16_t*)SH7750_SCLSR2)
 
-#define IPRB (*(volatile uint16_t   *)SH7750_IPRB)
-#define IPRC (*(volatile uint16_t   *)SH7750_IPRC)
+#define IPRB (*(volatile uint16_t*)SH7750_IPRB)
+#define IPRC (*(volatile uint16_t*)SH7750_IPRC)
 
 /*
  * The following structure is a descriptor of single UART channel.
diff --git a/c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c b/c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c
index 41ecc044de..c2ce851c94 100644
--- a/c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c
+++ b/c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c
@@ -83,7 +83,7 @@ sh4uart_init(sh4uart *uart, void *tty, int chn, int int_driven)
 uint32_t  
 sh4uart_get_Pph(void)
 {
-    uint16_t   frqcr = *(volatile uint16_t   *)SH7750_FRQCR;
+    uint16_t   frqcr = *(volatile uint16_t*)SH7750_FRQCR;
     uint32_t   Pph = CPU_CLOCK_RATE_HZ;
 
     switch (frqcr & SH7750_FRQCR_IFC)
@@ -360,7 +360,7 @@ sh4uart_set_attributes(sh4uart *uart, const struct termios *t)
     speed_t baud;
     uint16_t   smr;
    
-    smr = (uint16_t  )(*(uint8_t   *)SH7750_SCSMR(uart->chn));
+    smr = (uint16_t)(*(uint8_t*)SH7750_SCSMR(uart->chn));
 
     baud = cfgetospeed(t);
 
@@ -403,7 +403,7 @@ sh4uart_set_attributes(sh4uart *uart, const struct termios *t)
     SCSCR(uart->chn) &= ~(SH7750_SCSCR_TE | SH7750_SCSCR_RE);
 
     sh4uart_set_baudrate(uart, baud);
-    SCSMR(uart->chn) = (uint8_t  )smr;
+    SCSMR(uart->chn) = (uint8_t)smr;
 
     /* enable operations */
     SCSCR(uart->chn) |= SH7750_SCSCR_TE | SH7750_SCSCR_RE;