riscv: Fix fcsr initialization

Update #3433.

2 files changed, 19 insertions, 1 deletions

diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h
index 2bff71567c..9c50be89dd 100644
--- a/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h
+++ b/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h
@@ -286,6 +286,15 @@ typedef struct {
   uintptr_t a1;
 } RTEMS_ALIGNED( CPU_STACK_ALIGNMENT ) CPU_Interrupt_frame;
 
+static inline uint32_t _RISCV_Read_FCSR( void )
+{
+  uint32_t fcsr;
+
+  __asm__ volatile ( "frcsr %0" : "=&r" ( fcsr ) );
+
+  return fcsr;
+}
+
 #ifdef RTEMS_SMP
 
 static inline struct Per_CPU_Control *_RISCV_Get_current_per_CPU_control( void )
diff --git a/cpukit/score/cpu/riscv/riscv-context-initialize.c b/cpukit/score/cpu/riscv/riscv-context-initialize.c
index 9f51d05008..c6bd99ebbd 100644
--- a/cpukit/score/cpu/riscv/riscv-context-initialize.c
+++ b/cpukit/score/cpu/riscv/riscv-context-initialize.c
@@ -33,7 +33,7 @@
 #include "config.h"
 #endif
 
-#include <rtems/score/cpu.h>
+#include <rtems/score/cpuimpl.h>
 #include <rtems/score/address.h>
 #include <rtems/score/tls.h>
 
@@ -56,6 +56,15 @@ void _CPU_Context_Initialize(
   context->sp = (uintptr_t) stack;
   context->isr_dispatch_disable = 0;
 
+#if __riscv_flen > 0
+  /*
+   * According to C11 section 7.6 "Floating-point environment <fenv.h>" the
+   * floating-point environment shall be initialized to the current state of
+   * the creating thread.
+   */
+  context->fcsr = _RISCV_Read_FCSR();
+#endif
+
   if ( tls_area != NULL ) {
     void *tls_block;