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authorJoel Sherrill <joel.sherrill@OARcorp.com>2002-04-17 19:39:16 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2002-04-17 19:39:16 +0000
commitb929c2de1db33aee7ac850f8e3a01cddec1eaf26 (patch)
treeeaaf36260e1d11859831920120ea7e8d3f3f44a0
parentd25d17b2820fd485e058ecf1520492530d3fae5b (diff)
downloadrtems-b929c2de1db33aee7ac850f8e3a01cddec1eaf26.tar.bz2
2001-04-17 Joel Sherrill <joel@OARcorp.com>
* shared/include/cpu.h: Added ifndef ASM.
-rw-r--r--c/src/lib/libcpu/powerpc/ChangeLog4
-rw-r--r--c/src/lib/libcpu/powerpc/mpc8xx/exceptions/raw_exception.c1
-rw-r--r--c/src/lib/libcpu/powerpc/shared/include/cpu.h3
3 files changed, 7 insertions, 1 deletions
diff --git a/c/src/lib/libcpu/powerpc/ChangeLog b/c/src/lib/libcpu/powerpc/ChangeLog
index 5ca295aede..711bbf1617 100644
--- a/c/src/lib/libcpu/powerpc/ChangeLog
+++ b/c/src/lib/libcpu/powerpc/ChangeLog
@@ -1,5 +1,9 @@
2001-04-17 Joel Sherrill <joel@OARcorp.com>
+ * shared/include/cpu.h: Added ifndef ASM.
+
+2001-04-17 Joel Sherrill <joel@OARcorp.com>
+
* ChangeLog: Corrected paths on past few commits.
2002-04-16 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
diff --git a/c/src/lib/libcpu/powerpc/mpc8xx/exceptions/raw_exception.c b/c/src/lib/libcpu/powerpc/mpc8xx/exceptions/raw_exception.c
index d1dfde1f12..c983e5c26d 100644
--- a/c/src/lib/libcpu/powerpc/mpc8xx/exceptions/raw_exception.c
+++ b/c/src/lib/libcpu/powerpc/mpc8xx/exceptions/raw_exception.c
@@ -23,6 +23,7 @@
#include <rtems/score/cpu.h>
#include <libcpu/raw_exception.h>
#include <libcpu/cpu.h>
+#include <libcpu/cpuIdent.h>
static rtems_raw_except_connect_data* raw_except_table;
static rtems_raw_except_connect_data default_raw_except_entry;
diff --git a/c/src/lib/libcpu/powerpc/shared/include/cpu.h b/c/src/lib/libcpu/powerpc/shared/include/cpu.h
index fa68d6604e..7d61aef09b 100644
--- a/c/src/lib/libcpu/powerpc/shared/include/cpu.h
+++ b/c/src/lib/libcpu/powerpc/shared/include/cpu.h
@@ -179,6 +179,7 @@ n:
* Routines to access the time base register
*/
+#ifndef ASM
static inline unsigned long long PPC_Get_timebase_register( void )
{
unsigned long tbr_low;
@@ -209,7 +210,7 @@ static inline void PPC_Set_timebase_register (unsigned long long tbr)
asm volatile( "mtspr 285, %0" : : "r" (tbr_high));
}
-#endif
+#endif /* ASM */
#define _CPU_MSR_GET( _msr_value ) \
do { \