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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2011-06-07 12:59:39 +0000 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2011-06-07 12:59:39 +0000 |
| commit | ae2b1e056a6a275b5454d6368ac159a6e2027c3c (patch) | |
| tree | 65b37aeb70c381243ac4a80d3ecbb96e761479a1 | |
| parent | 2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de> (diff) | |
| download | rtems-ae2b1e056a6a275b5454d6368ac159a6e2027c3c.tar.bz2 | |
2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
* new-exceptions/cpu_asm.S: Use BSP_DATA_CACHE_ENABLED instead of
PPC_USE_DATA_CACHE.
| -rw-r--r-- | c/src/lib/libcpu/powerpc/ChangeLog | 5 | ||||
| -rw-r--r-- | c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S | 18 |
2 files changed, 14 insertions, 9 deletions
diff --git a/c/src/lib/libcpu/powerpc/ChangeLog b/c/src/lib/libcpu/powerpc/ChangeLog index 4202e314a1..f500392c5d 100644 --- a/c/src/lib/libcpu/powerpc/ChangeLog +++ b/c/src/lib/libcpu/powerpc/ChangeLog @@ -1,5 +1,10 @@ 2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de> + * new-exceptions/cpu_asm.S: Use BSP_DATA_CACHE_ENABLED instead of + PPC_USE_DATA_CACHE. + +2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de> + * shared/src/cache_.h: Moved implementation from "cache.c" to here. This avoids the function call overhead. * shared/src/cache.c: Removed file. diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S b/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S index 1bb5b3a35c..cc4ef76f38 100644 --- a/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S +++ b/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S @@ -293,21 +293,21 @@ PROC (_CPU_Context_switch): sync isync /* This assumes that all the registers are in the given order */ -#if ( PPC_USE_DATA_CACHE ) +#if ( BSP_DATA_CACHE_ENABLED ) #if PPC_CACHE_ALIGNMENT != 32 #error "code assumes PPC_CACHE_ALIGNMENT == 32!" #endif li r5, PPC_CACHE_ALIGNMENT #endif addi r9,r3,-4 -#if ( PPC_USE_DATA_CACHE ) +#if ( BSP_DATA_CACHE_ENABLED ) dcbz r5, r9 #endif stw r1, GP_1+4(r9) stw r2, GP_2+4(r9) #if (PPC_USE_MULTIPLE == 1) addi r9, r9, GP_18+4 -#if ( PPC_USE_DATA_CACHE ) +#if ( BSP_DATA_CACHE_ENABLED ) dcbz r5, r9 #endif stmw r13, GP_13-GP_18(r9) @@ -318,7 +318,7 @@ PROC (_CPU_Context_switch): stw r16, GP_16+4(r9) stw r17, GP_17+4(r9) stwu r18, GP_18+4(r9) -#if ( PPC_USE_DATA_CACHE ) +#if ( BSP_DATA_CACHE_ENABLED ) dcbz r5, r9 #endif stw r19, GP_19-GP_18(r9) @@ -335,7 +335,7 @@ PROC (_CPU_Context_switch): stw r30, GP_30-GP_18(r9) stw r31, GP_31-GP_18(r9) #endif -#if ( PPC_USE_DATA_CACHE ) +#if ( BSP_DATA_CACHE_ENABLED ) dcbt r0, r4 #endif mfcr r6 @@ -350,19 +350,19 @@ PROC (_CPU_Context_switch): EXTERN_PROC(_CPU_Context_switch_altivec) bl _CPU_Context_switch_altivec mr r4, r14 -#if ( PPC_USE_DATA_CACHE ) +#if ( BSP_DATA_CACHE_ENABLED ) li r5, PPC_CACHE_ALIGNMENT #endif #endif -#if ( PPC_USE_DATA_CACHE ) +#if ( BSP_DATA_CACHE_ENABLED ) dcbt r5, r4 #endif lwz r1, GP_1(r4) lwz r2, GP_2(r4) #if (PPC_USE_MULTIPLE == 1) addi r4, r4, GP_19 -#if ( PPC_USE_DATA_CACHE ) +#if ( BSP_DATA_CACHE_ENABLED ) dcbt r5, r4 #endif lmw r13, GP_13-GP_19(r4) @@ -374,7 +374,7 @@ PROC (_CPU_Context_switch): lwz r17, GP_17(r4) lwz r18, GP_18(r4) lwzu r19, GP_19(r4) -#if ( PPC_USE_DATA_CACHE ) +#if ( BSP_DATA_CACHE_ENABLED ) dcbt r5, r4 #endif lwz r20, GP_20-GP_19(r4) |