diff options
| author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2011-02-11 09:08:14 +0000 |
|---|---|---|
| committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2011-02-11 09:08:14 +0000 |
| commit | 9f9371f5622052010cf6cbc4409d15bad979b83d (patch) | |
| tree | 4df791c8395e14cff8ece5abc3ee54c504d2ce14 | |
| parent | 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org> (diff) | |
| download | rtems-9f9371f5622052010cf6cbc4409d15bad979b83d.tar.bz2 | |
2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
* cpu.c, rtems/score/cpu.h:
Use "__asm__" instead of "asm" for improved c99-compliance.
| -rw-r--r-- | cpukit/score/cpu/arm/ChangeLog | 5 | ||||
| -rw-r--r-- | cpukit/score/cpu/arm/cpu.c | 4 | ||||
| -rw-r--r-- | cpukit/score/cpu/arm/rtems/score/cpu.h | 14 |
3 files changed, 14 insertions, 9 deletions
diff --git a/cpukit/score/cpu/arm/ChangeLog b/cpukit/score/cpu/arm/ChangeLog index c787dcd2f7..7edf0ce295 100644 --- a/cpukit/score/cpu/arm/ChangeLog +++ b/cpukit/score/cpu/arm/ChangeLog @@ -1,3 +1,8 @@ +2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org> + + * cpu.c, rtems/score/cpu.h: + Use "__asm__" instead of "asm" for improved c99-compliance. + 2010-11-23 Gedare Bloom <giddyup44@yahoo.com> PR 1719/cpukit diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c index 551c80cde3..00ff4aabcd 100644 --- a/cpukit/score/cpu/arm/cpu.c +++ b/cpukit/score/cpu/arm/cpu.c @@ -64,7 +64,7 @@ void _CPU_ISR_Set_level( uint32_t level ) { uint32_t arm_switch_reg; - asm volatile ( + __asm__ volatile ( ARM_SWITCH_TO_ARM "mrs %[arm_switch_reg], cpsr\n" "bic %[arm_switch_reg], #" _CPU_ISR_LEVEL_STRINGOF( CPU_MODES_INTERRUPT_MASK ) "\n" @@ -81,7 +81,7 @@ uint32_t _CPU_ISR_Get_level( void ) ARM_SWITCH_REGISTERS; uint32_t level; - asm volatile ( + __asm__ volatile ( ARM_SWITCH_TO_ARM "mrs %[level], cpsr\n" "and %[level], #" _CPU_ISR_LEVEL_STRINGOF( CPU_MODES_INTERRUPT_MASK ) "\n" diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h index 63ed1e5539..405ccb79bb 100644 --- a/cpukit/score/cpu/arm/rtems/score/cpu.h +++ b/cpukit/score/cpu/arm/rtems/score/cpu.h @@ -242,7 +242,7 @@ static inline uint32_t arm_interrupt_disable( void ) uint32_t arm_switch_reg; uint32_t level; - asm volatile ( + __asm__ volatile ( ARM_SWITCH_TO_ARM "mrs %[level], cpsr\n" "orr %[arm_switch_reg], %[level], #0x80\n" @@ -258,7 +258,7 @@ static inline void arm_interrupt_enable( uint32_t level ) { ARM_SWITCH_REGISTERS; - asm volatile ( + __asm__ volatile ( ARM_SWITCH_TO_ARM "msr cpsr, %[level]\n" ARM_SWITCH_BACK @@ -271,7 +271,7 @@ static inline void arm_interrupt_flash( uint32_t level ) { uint32_t arm_switch_reg; - asm volatile ( + __asm__ volatile ( ARM_SWITCH_TO_ARM "mrs %[arm_switch_reg], cpsr\n" "msr cpsr, %[level]\n" @@ -325,7 +325,7 @@ void _CPU_Context_Initialize( uint32_t _level; \ uint32_t _error = _err; \ _CPU_ISR_Disable( _level ); \ - asm volatile ("mov r0, %0\n" \ + __asm__ volatile ("mov r0, %0\n" \ : "=r" (_error) \ : "0" (_error) \ : "r0" ); \ @@ -367,7 +367,7 @@ static inline uint32_t CPU_swap_u32( uint32_t value ) return swapped; #else uint32_t tmp = value; /* make compiler warnings go away */ - asm volatile ("EOR %1, %0, %0, ROR #16\n" + __asm__ volatile ("EOR %1, %0, %0, ROR #16\n" "BIC %1, %1, #0xff0000\n" "MOV %0, %0, ROR #8\n" "EOR %0, %0, %1, LSR #8\n" @@ -431,7 +431,7 @@ static inline uint32_t arm_status_irq_enable( void ) RTEMS_COMPILER_MEMORY_BARRIER(); - asm volatile ( + __asm__ volatile ( ARM_SWITCH_TO_ARM "mrs %[psr], cpsr\n" "bic %[arm_switch_reg], %[psr], #0x80\n" @@ -447,7 +447,7 @@ static inline void arm_status_restore( uint32_t psr ) { ARM_SWITCH_REGISTERS; - asm volatile ( + __asm__ volatile ( ARM_SWITCH_TO_ARM "msr cpsr, %[psr]\n" ARM_SWITCH_BACK |