smp: Delete bsp_smp_secondary_cpu_initialize()

Do not call bsp_smp_secondary_cpu_initialize() in
rtems_smp_secondary_cpu_initialize().  This allows more flexibilty in
the BSP low-level code.  Specify context requirements for a call to
rtems_smp_secondary_cpu_initialize().

5 files changed, 31 insertions, 29 deletions

diff --git a/c/src/lib/libbsp/i386/shared/smp/smp-imps.c b/c/src/lib/libbsp/i386/shared/smp/smp-imps.c
index 7ea17e594d..62ce8aca27 100644
--- a/c/src/lib/libbsp/i386/shared/smp/smp-imps.c
+++ b/c/src/lib/libbsp/i386/shared/smp/smp-imps.c
@@ -199,6 +199,8 @@ unsigned char imps_apic_cpu_map[IMPS_MAX_CPUS];
 /* now defined in getcpuid.c */
 extern unsigned imps_lapic_addr;
 
+static void secondary_cpu_initialize(void);
+
 /*
  *  MPS checksum function
  *
@@ -269,7 +271,7 @@ boot_cpu(imps_processor *proc)
     (size_t)_binary_appstart_bin_size
   );
 
-  reset[1] = (uint32_t)rtems_smp_secondary_cpu_initialize;
+  reset[1] = (uint32_t)secondary_cpu_initialize;
   reset[2] = (uint32_t)_Per_CPU_Information[apicid].interrupt_stack_high;
 
   /*
@@ -792,7 +794,7 @@ extern void enable_sse(void);
 #endif
 
 /* pc386 specific initialization */
-void bsp_smp_secondary_cpu_initialize(int cpu)
+static void secondary_cpu_initialize(void)
 {
   int apicid;
 
@@ -804,6 +806,8 @@ void bsp_smp_secondary_cpu_initialize(int cpu)
 #ifdef __SSE__
   enable_sse();
 #endif
+
+  rtems_smp_secondary_cpu_initialize();
 }
 
 #include <rtems/bspsmp.h>
diff --git a/c/src/lib/libbsp/shared/smp/smp_stub.c b/c/src/lib/libbsp/shared/smp/smp_stub.c
index f95cad4610..62338b91df 100644
--- a/c/src/lib/libbsp/shared/smp/smp_stub.c
+++ b/c/src/lib/libbsp/shared/smp/smp_stub.c
@@ -15,10 +15,6 @@
 #include <rtems/bspsmp.h>
 #include <stdlib.h>
 
-void bsp_smp_secondary_cpu_initialize(int cpu)
-{
-}
-
 uint32_t bsp_smp_initialize( uint32_t configured_cpu_count )
 {
   /* return the number of CPUs */
diff --git a/c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c b/c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c
index b479ffcdc4..6a9c189ec2 100644
--- a/c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c
+++ b/c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c
@@ -41,11 +41,15 @@ rtems_isr bsp_ap_ipi_isr(
   rtems_smp_process_interrupt();
 }
 
-void bsp_smp_secondary_cpu_initialize(int cpu)
+static void leon3_secondary_cpu_initialize(void)
 {
+  int cpu = bsp_smp_processor_id();
+
   sparc_leon3_set_cctrl( 0x80000F );
   LEON_Unmask_interrupt(LEON3_MP_IRQ);
   LEON3_IrqCtrl_Regs->mask[cpu] |= 1 << LEON3_MP_IRQ;
+
+  rtems_smp_secondary_cpu_initialize();
 }
 
 /*
@@ -89,7 +93,7 @@ uint32_t bsp_smp_initialize( uint32_t configured_cpu_count )
 
     bsp_ap_stack = _Per_CPU_Information[cpu].interrupt_stack_high -
                       CPU_MINIMUM_STACK_FRAME_SIZE;
-    bsp_ap_entry = rtems_smp_secondary_cpu_initialize;
+    bsp_ap_entry = leon3_secondary_cpu_initialize;
 
     LEON3_IrqCtrl_Regs->mpstat = 1 << cpu;
     bsp_smp_delay( 1000000 );
diff --git a/cpukit/score/include/rtems/bspsmp.h b/cpukit/score/include/rtems/bspsmp.h
index 525b8b79a3..240f8200b2 100644
--- a/cpukit/score/include/rtems/bspsmp.h
+++ b/cpukit/score/include/rtems/bspsmp.h
@@ -119,25 +119,26 @@ void bsp_smp_interrupt_cpu(
 int   bsp_smp_processor_id( void );
 
 /**
- *  This method is invoked by @ref rtems_smp_secondary_cpu_initialize
- *  to allow the BSP to perform some intialization.  The @a cpu
- *  parameter indicates the secondary CPU that the code is executing on
- *  and is currently being initialized.
- *
- *  @note This is called by @ref rtems_smp_secondary_cpu_initialize.
- */
-void bsp_smp_secondary_cpu_initialize(int cpu);
-
-/**
- *  @brief Initialize secondary CPU and coordinates.
- *
- *  This method is the C entry point which secondary CPUs should
- *  arrange to call.  It performs OS initialization for the secondary
- *  CPU and coordinates bring it to a useful state.
- *
- *  @note This is provided by RTEMS.
+ * @brief Performs high-level initialization of a secondary CPU and runs the
+ * application threads.
+ *
+ * The low-level initialization code must call this function to hand over the
+ * control of this processor to RTEMS.  Interrupts must be disabled.  It must
+ * be possible to send inter-processor interrupts to this processor.  Since
+ * interrupts are disabled the inter-processor interrupt delivery is postponed
+ * until interrupts are enabled the first time.  This is usually a side-effect
+ * of the context switch to the first thread.
+ *
+ * The pre-requisites for the call to this function are
+ * - disabled interrupts,
+ * - reception of inter-processor interrupts is possible,
+ * - a valid stack pointer and enough stack space,
+ * - a valid code memory, and
+ * - a valid BSS section.
+ *
+ * This function must not be called by the main processor.
  */
-void rtems_smp_secondary_cpu_initialize(void);
+void rtems_smp_secondary_cpu_initialize( void );
 
 /**
  *  @brief Process the incoming interprocessor request.
diff --git a/cpukit/score/src/smp.c b/cpukit/score/src/smp.c
index cd4d2350ba..a06db5ef84 100644
--- a/cpukit/score/src/smp.c
+++ b/cpukit/score/src/smp.c
@@ -56,9 +56,6 @@ void rtems_smp_secondary_cpu_initialize(void)
 
   cpu = bsp_smp_processor_id();
 
-  _ISR_Disable_on_this_core( level );
-  bsp_smp_secondary_cpu_initialize(cpu);
-
   /*
    *  Inform the primary CPU that this secondary CPU is initialized
    *  and ready to dispatch to the first thread it is supposed to