2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>

	* mcf5225x/network/fec.c, mcf5235/cache/cachepd.c,
	mcf532x/cache/cachepd.c, shared/cache/cache.c, shared/misc/m68kidle.c:
	Use "__asm__" instead of "asm" for improved c99-compliance.

6 files changed, 34 insertions, 28 deletions

diff --git a/c/src/lib/libcpu/m68k/ChangeLog b/c/src/lib/libcpu/m68k/ChangeLog
index 407ef4acdd..80f4c0a785 100644
--- a/c/src/lib/libcpu/m68k/ChangeLog
+++ b/c/src/lib/libcpu/m68k/ChangeLog
@@ -1,3 +1,9 @@
+2011-02-11	Ralf Corsépius <ralf.corsepius@rtems.org>
+
+	* mcf5225x/network/fec.c, mcf5235/cache/cachepd.c,
+	mcf532x/cache/cachepd.c, shared/cache/cache.c, shared/misc/m68kidle.c:
+	Use "__asm__" instead of "asm" for improved c99-compliance.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.
diff --git a/c/src/lib/libcpu/m68k/mcf5225x/network/fec.c b/c/src/lib/libcpu/m68k/mcf5225x/network/fec.c
index f408396e6f..903e336d21 100644
--- a/c/src/lib/libcpu/m68k/mcf5225x/network/fec.c
+++ b/c/src/lib/libcpu/m68k/mcf5225x/network/fec.c
@@ -175,7 +175,7 @@ mcf5225xif_init(struct netif *netif)
 	
   MCF_FEC_ECR |= MCF_FEC_ECR_RESET;
   
-  while (MCF_FEC_ECR&MCF_FEC_ECR_RESET) asm("nop");
+  while (MCF_FEC_ECR&MCF_FEC_ECR_RESET) __asm__ ("nop");
   
   if (if_config->phy_init) if_config->phy_init();  /* call application specific optional extern phy initialization function */
   
@@ -233,7 +233,7 @@ void smi_write(u8_t phy_addr,u8_t reg_addr,u16_t data)
 {
 	MCF_FEC_MMFR = MCF_FEC_MMFR_ST(0x1) | MCF_FEC_MMFR_OP_WRITE | (MCF_FEC_MMFR_PA(phy_addr)) | MCF_FEC_MMFR_RA(reg_addr) | MCF_FEC_MMFR_TA_10 | data;
 	smi_init(bsp_get_CPU_clock_speed()); /* enable MII clock speed after MMFR is written */
-	while ((MCF_FEC_EIR & MCF_FEC_EIR_MII) == 0) { asm("nop"); }
+	while ((MCF_FEC_EIR & MCF_FEC_EIR_MII) == 0) { __asm__ ("nop"); }
 	smi_init(0); /* MII frame sent, disable clock until next operation */
 	MCF_FEC_EIR |= MCF_FEC_EIR_MII;
 }
@@ -242,7 +242,7 @@ u16_t smi_read(u8_t phy_addr,u8_t reg_addr)
 {
 	MCF_FEC_MMFR = MCF_FEC_MMFR_ST(0x1) | MCF_FEC_MMFR_OP_READ | (MCF_FEC_MMFR_PA(phy_addr)) | MCF_FEC_MMFR_RA(reg_addr) | MCF_FEC_MMFR_TA_10;
 	smi_init(bsp_get_CPU_clock_speed()); /* enable MII clock speed after MMFR is written */
-	while ((MCF_FEC_EIR & MCF_FEC_EIR_MII) == 0) { asm("nop"); }
+	while ((MCF_FEC_EIR & MCF_FEC_EIR_MII) == 0) { __asm__ ("nop"); }
 	smi_init(0); /* MII frame sent, disable clock until next operation */
 	MCF_FEC_EIR |= MCF_FEC_EIR_MII;
 	
diff --git a/c/src/lib/libcpu/m68k/mcf5235/cache/cachepd.c b/c/src/lib/libcpu/m68k/mcf5235/cache/cachepd.c
index e806bdd733..ee7ebae139 100644
--- a/c/src/lib/libcpu/m68k/mcf5235/cache/cachepd.c
+++ b/c/src/lib/libcpu/m68k/mcf5235/cache/cachepd.c
@@ -63,7 +63,7 @@ void _CPU_cache_invalidate_1_instruction_line(const void *addr)
      * Top half of cache is I-space
      */
     addr = (void *)((int)addr | 0x400);
-    asm volatile ("cpushl %%bc,(%0)" :: "a" (addr));
+    __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (addr));
 }
 
 void _CPU_cache_enable_data(void)
@@ -97,5 +97,5 @@ void _CPU_cache_invalidate_1_data_line(const void *addr)
      * Bottom half of cache is D-space
      */
     addr = (void *)((int)addr & ~0x400);
-    asm volatile ("cpushl %%bc,(%0)" :: "a" (addr));
+    __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (addr));
 }
diff --git a/c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c b/c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c
index acf88ab4ee..2384d3c3ae 100644
--- a/c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c
+++ b/c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c
@@ -7,7 +7,7 @@
 #include <rtems.h>
 #include <mcf532x/mcf532x.h>
 
-#define m68k_set_cacr(_cacr) asm volatile ("movec %0,%%cacr" : : "d" (_cacr))
+#define m68k_set_cacr(_cacr) __asm__ volatile ("movec %0,%%cacr" : : "d" (_cacr))
 
 /*
  * Read/write copy of common cache
@@ -41,13 +41,13 @@ void _CPU_cache_flush_1_data_line(const void *d_addr)
 {
   register unsigned long adr = (((unsigned long) d_addr >> 4) & 0xff) << 4;
 
-  asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+  __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
   adr += 1;
-  asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+  __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
   adr += 1;
-  asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+  __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
   adr += 1;
-  asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+  __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
 }
 
 void _CPU_cache_flush_entire_data(void)
@@ -56,13 +56,13 @@ void _CPU_cache_flush_entire_data(void)
 
   for(set = 0; set < 256; ++set) {
     adr = (set << 4);
-    asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+    __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
     adr += 1;
-    asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+    __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
     adr += 1;
-    asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+    __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
     adr += 1;
-    asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+    __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
   }
 }
 
@@ -101,13 +101,13 @@ void _CPU_cache_invalidate_1_instruction_line(const void *addr)
 {
   register unsigned long adr = (((unsigned long) addr >> 4) & 0xff) << 4;
 
-  asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+  __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
   adr += 1;
-  asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+  __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
   adr += 1;
-  asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+  __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
   adr += 1;
-  asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+  __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
 }
 
 void _CPU_cache_enable_data(void)
diff --git a/c/src/lib/libcpu/m68k/shared/cache/cache.c b/c/src/lib/libcpu/m68k/shared/cache/cache.c
index 3ba8d7f1a0..06b2fe6b13 100644
--- a/c/src/lib/libcpu/m68k/shared/cache/cache.c
+++ b/c/src/lib/libcpu/m68k/shared/cache/cache.c
@@ -19,7 +19,7 @@
   {                                                                \
   register unsigned long _value = mask;                            \
   register unsigned long _ctl = 0;                                 \
-  asm volatile ( "movec %%cacr, %0;           /* read the cacr */  \
+  __asm__ volatile ( "movec %%cacr, %0;           /* read the cacr */  \
                   andl %2, %0;                /* and with _val */  \
                   movec %1, %%cacr"           /* write the cacr */ \
    : "=d" (_ctl) : "0" (_ctl), "d" (_value) : "%%cc" );            \
@@ -33,7 +33,7 @@
 	{                                                                \
   register unsigned long _value = mask;                            \
   register unsigned long _ctl = 0;                                 \
-  asm volatile ( "movec %%cacr, %0;           /* read the cacr */  \
+  __asm__ volatile ( "movec %%cacr, %0;           /* read the cacr */  \
                   orl %2, %0;                 /* or with _val */   \
                   movec %1, %%cacr"           /* write the cacr */ \
    : "=d" (_ctl) : "0" (_ctl), "d" (_value) : "%%cc" );            \
@@ -59,7 +59,7 @@ void _CPU_cache_invalidate_1_data_line (
   const void * d_addr )
 {
   void * p_address = (void *) _CPU_virtual_to_physical( d_addr );
-  asm volatile ( "movec %0, %%caar" :: "a" (p_address) );      /* write caar */
+  __asm__ volatile ( "movec %0, %%caar" :: "a" (p_address) );      /* write caar */
   _CPU_CACR_OR(0x00000400);
 }
 
@@ -95,7 +95,7 @@ void _CPU_cache_invalidate_1_instruction_line (
   const void * d_addr )
 {
   void * p_address = (void *) _CPU_virtual_to_physical( d_addr );
-  asm volatile ( "movec %0, %%caar" :: "a" (p_address) );      /* write caar */
+  __asm__ volatile ( "movec %0, %%caar" :: "a" (p_address) );      /* write caar */
   _CPU_CACR_OR( 0x00000004 );
 }
 
@@ -137,14 +137,14 @@ void _CPU_cache_flush_1_data_line (
   const void * d_addr )
 {
   void * p_address = (void *) _CPU_virtual_to_physical( d_addr );
-  asm volatile ( "cpushl %%dc,(%0)" :: "a" (p_address) );
+  __asm__ volatile ( "cpushl %%dc,(%0)" :: "a" (p_address) );
 }
 
 void _CPU_cache_invalidate_1_data_line (
   const void * d_addr )
 {
   void * p_address = (void *) _CPU_virtual_to_physical( d_addr );
-  asm volatile ( "cinvl %%dc,(%0)" :: "a" (p_address) );
+  __asm__ volatile ( "cinvl %%dc,(%0)" :: "a" (p_address) );
 }
 
 void _CPU_cache_flush_entire_data ( void )
@@ -171,7 +171,7 @@ void _CPU_cache_invalidate_1_instruction_line (
   const void * i_addr )
 {
   void * p_address = (void *)  _CPU_virtual_to_physical( i_addr );
-  asm volatile ( "cinvl %%ic,(%0)" :: "a" (p_address) );
+  __asm__ volatile ( "cinvl %%ic,(%0)" :: "a" (p_address) );
 }
 
 void _CPU_cache_invalidate_entire_instruction ( void )
diff --git a/c/src/lib/libcpu/m68k/shared/misc/m68kidle.c b/c/src/lib/libcpu/m68k/shared/misc/m68kidle.c
index 3ceb6639dd..05e52dbb07 100644
--- a/c/src/lib/libcpu/m68k/shared/misc/m68kidle.c
+++ b/c/src/lib/libcpu/m68k/shared/misc/m68kidle.c
@@ -33,11 +33,11 @@ void *_CPU_Thread_Idle_body( uintptr_t ignored )
 {
 #if defined(mcf5272)
   for( ; ; ) {
-    asm volatile( "nop" );
-    asm volatile( "nop" );
+    __asm__ volatile( "nop" );
+    __asm__ volatile( "nop" );
   }
 #else
   for( ; ; )
-    asm volatile( "stop #0x3000":::"cc" );  /* supervisor mode, all interrupts on */
+    __asm__ volatile( "stop #0x3000":::"cc" );  /* supervisor mode, all interrupts on */
 #endif
 }