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| author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2005-11-07 06:26:37 +0000 |
|---|---|---|
| committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2005-11-07 06:26:37 +0000 |
| commit | 71a7ed0ae71eee96de992c8d02531a25fc6ba5a2 (patch) | |
| tree | f2ef01c2c72afd36b3f8a6d69fd63e104a198426 | |
| parent | Eliminate unsigned32, unsigned8. (diff) | |
| download | rtems-71a7ed0ae71eee96de992c8d02531a25fc6ba5a2.tar.bz2 | |
Eliminate unsigned32.
| -rw-r--r-- | c/src/lib/libbsp/m68k/av5282/include/bsp.h | 2 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/av5282/startup/bspstart.c | 8 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mcf5235/include/bsp.h | 2 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mcf5235/startup/bspstart.c | 8 |
4 files changed, 10 insertions, 10 deletions
diff --git a/c/src/lib/libbsp/m68k/av5282/include/bsp.h b/c/src/lib/libbsp/m68k/av5282/include/bsp.h index bc9387d1a5..0d3413e578 100644 --- a/c/src/lib/libbsp/m68k/av5282/include/bsp.h +++ b/c/src/lib/libbsp/m68k/av5282/include/bsp.h @@ -67,7 +67,7 @@ extern rtems_configuration_table BSP_Configuration; /* functions */ -unsigned32 get_CPU_clock_speed(void); +uint32_t get_CPU_clock_speed(void); void bsp_cleanup(void); m68k_isr_entry set_vector( diff --git a/c/src/lib/libbsp/m68k/av5282/startup/bspstart.c b/c/src/lib/libbsp/m68k/av5282/startup/bspstart.c index ccafc32492..9e38e141cb 100644 --- a/c/src/lib/libbsp/m68k/av5282/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/av5282/startup/bspstart.c @@ -65,7 +65,7 @@ char *rtems_progname; * No burst transfers on non-cacheable accesses * Default cache mode is *disabled* (cache only ACRx areas) */ -static unsigned32 cacr_mode = MCF5XXX_CACR_CENB | +static uint32_t cacr_mode = MCF5XXX_CACR_CENB | MCF5XXX_CACR_DBWE | MCF5XXX_CACR_DCM; /* @@ -155,7 +155,7 @@ void _CPU_cache_invalidate_1_data_line(const void *addr) * Use the shared implementations of the following routines */ void bsp_postdriver_hook(void); -void bsp_libc_init( void *, unsigned32, int ); +void bsp_libc_init( void *, uint32_t, int ); void bsp_pretasking_hook(void); /* m68k version */ /* @@ -220,8 +220,8 @@ void bsp_start( void ) } -unsigned32 get_CPU_clock_speed(void) +uint32_t get_CPU_clock_speed(void) { extern char _CPUClockSpeed[]; - return( (unsigned32)_CPUClockSpeed); + return( (uint32_t)_CPUClockSpeed); } diff --git a/c/src/lib/libbsp/m68k/mcf5235/include/bsp.h b/c/src/lib/libbsp/m68k/mcf5235/include/bsp.h index 122be187fa..2b17b0c7b6 100644 --- a/c/src/lib/libbsp/m68k/mcf5235/include/bsp.h +++ b/c/src/lib/libbsp/m68k/mcf5235/include/bsp.h @@ -67,7 +67,7 @@ extern rtems_configuration_table BSP_Configuration; /* functions */ -unsigned32 get_CPU_clock_speed(void); +uint32_t get_CPU_clock_speed(void); void bsp_cleanup(void); m68k_isr_entry set_vector( rtems_isr_entry handler, diff --git a/c/src/lib/libbsp/m68k/mcf5235/startup/bspstart.c b/c/src/lib/libbsp/m68k/mcf5235/startup/bspstart.c index e16d4c0ee0..22cfb951bb 100644 --- a/c/src/lib/libbsp/m68k/mcf5235/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/mcf5235/startup/bspstart.c @@ -58,7 +58,7 @@ char *rtems_progname; * No burst transfers on non-cacheable accesses * Default cache mode is *disabled* (cache only ACRx areas) */ -static unsigned32 cacr_mode = MCF5XXX_CACR_CENB | +static uint32_t cacr_mode = MCF5XXX_CACR_CENB | MCF5XXX_CACR_DBWE | MCF5XXX_CACR_DCM; /* @@ -148,7 +148,7 @@ void _CPU_cache_invalidate_1_data_line(const void *addr) * Use the shared implementations of the following routines */ void bsp_postdriver_hook(void); -void bsp_libc_init( void *, unsigned32, int ); +void bsp_libc_init( void *, uint32_t, int ); void bsp_pretasking_hook(void); /* m68k version */ /* @@ -213,8 +213,8 @@ void bsp_start( void ) } -unsigned32 get_CPU_clock_speed(void) +uint32_t get_CPU_clock_speed(void) { extern char _CPUClockSpeed[]; - return( (unsigned32)_CPUClockSpeed); + return( (uint32_t)_CPUClockSpeed); } |