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authorSebastian Huber <sebastian.huber@embedded-brains.de>2019-01-08 09:53:26 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2019-01-09 10:35:33 +0100
commit3bd3999936cfa8a77a545e513669e61877f9ccb6 (patch)
treefedf8ff5eb9a41a659f856b88df92e60fc65986a
parentrtems: Allow to set ISR level 0 in SMP config (diff)
downloadrtems-3bd3999936cfa8a77a545e513669e61877f9ccb6.tar.bz2
Adjust interrupt mode tests for some CPU ports
In case the robust thread dispatch is enabled by the CPU port, then the interrupt level must not be changed through the task mode. Update #3000.
-rw-r--r--cpukit/rtems/src/taskmode.c4
-rw-r--r--cpukit/score/src/threaddispatch.c2
-rw-r--r--cpukit/score/src/threadinitialize.c4
-rw-r--r--testsuites/sptests/sp08/init.c23
-rw-r--r--testsuites/sptests/sp37/init.c10
5 files changed, 36 insertions, 7 deletions
diff --git a/cpukit/rtems/src/taskmode.c b/cpukit/rtems/src/taskmode.c
index 1767d7be84..906f86bdcd 100644
--- a/cpukit/rtems/src/taskmode.c
+++ b/cpukit/rtems/src/taskmode.c
@@ -53,11 +53,13 @@ rtems_status_code rtems_task_mode(
}
#endif
-#if defined(RTEMS_SMP)
+#if defined(RTEMS_SMP) || CPU_ENABLE_ROBUST_THREAD_DISPATCH == TRUE
if (
( mask & RTEMS_INTERRUPT_MASK ) != 0
&& _Modes_Get_interrupt_level( mode_set ) != 0
+#if CPU_ENABLE_ROBUST_THREAD_DISPATCH == FALSE
&& rtems_configuration_is_smp_enabled()
+#endif
) {
return RTEMS_NOT_IMPLEMENTED;
}
diff --git a/cpukit/score/src/threaddispatch.c b/cpukit/score/src/threaddispatch.c
index b82fe539c1..fc6a172080 100644
--- a/cpukit/score/src/threaddispatch.c
+++ b/cpukit/score/src/threaddispatch.c
@@ -261,7 +261,7 @@ void _Thread_Do_dispatch( Per_CPU_Control *cpu_self, ISR_Level level )
#if defined(RTEMS_SCORE_ROBUST_THREAD_DISPATCH)
if (
!_ISR_Is_enabled( level )
-#if defined(RTEMS_SMP)
+#if defined(RTEMS_SMP) && CPU_ENABLE_ROBUST_THREAD_DISPATCH == FALSE
&& rtems_configuration_is_smp_enabled()
#endif
) {
diff --git a/cpukit/score/src/threadinitialize.c b/cpukit/score/src/threadinitialize.c
index 2ad4ccd9ed..e2bb694f18 100644
--- a/cpukit/score/src/threadinitialize.c
+++ b/cpukit/score/src/threadinitialize.c
@@ -64,10 +64,12 @@ bool _Thread_Initialize(
}
#endif
-#if defined(RTEMS_SMP)
+#if defined(RTEMS_SMP) || CPU_ENABLE_ROBUST_THREAD_DISPATCH == TRUE
if (
isr_level != 0
+#if CPU_ENABLE_ROBUST_THREAD_DISPATCH == FALSE
&& rtems_configuration_is_smp_enabled()
+#endif
) {
return false;
}
diff --git a/testsuites/sptests/sp08/init.c b/testsuites/sptests/sp08/init.c
index 98a7fccdcf..2ed585ddd7 100644
--- a/testsuites/sptests/sp08/init.c
+++ b/testsuites/sptests/sp08/init.c
@@ -175,7 +175,7 @@ rtems_task Init(
/* END OF RTEMS_PREEMPT */
/* BEGINNING OF RTEMS_INTERRUPT_LEVEL */
-#if !defined(RTEMS_SMP)
+#if CPU_ENABLE_ROBUST_THREAD_DISPATCH == FALSE
status = rtems_task_mode(
RTEMS_INTERRUPT_LEVEL(3),
RTEMS_INTERRUPT_MASK,
@@ -197,13 +197,25 @@ rtems_task Init(
"TA1 - rtems_task_mode - RTEMS_INTERRUPT_LEVEL( 5 ) - previous mode: ",
previous_mode
);
+#else
+ status = rtems_task_mode(
+ RTEMS_INTERRUPT_LEVEL( 1 ),
+ RTEMS_INTERRUPT_MASK,
+ &previous_mode
+ );
+ fatal_directive_status( status, RTEMS_NOT_IMPLEMENTED, "rtems_task_mode" );
#endif
/* END OF RTEMS_INTERRUPT_LEVEL */
/* BEGINNING OF COMBINATIONS */
status = rtems_task_mode(
- RTEMS_INTERRUPT_LEVEL(3) | RTEMS_NO_ASR |
+#if CPU_ENABLE_ROBUST_THREAD_DISPATCH == TRUE
+ RTEMS_INTERRUPT_LEVEL(0) |
+#else
+ RTEMS_INTERRUPT_LEVEL(3) |
+#endif
+ RTEMS_NO_ASR |
RTEMS_TIMESLICE | RTEMS_NO_PREEMPT,
RTEMS_INTERRUPT_MASK | RTEMS_ASR_MASK |
RTEMS_TIMESLICE_MASK | RTEMS_PREEMPT_MASK,
@@ -216,7 +228,12 @@ rtems_task Init(
);
status = rtems_task_mode(
- RTEMS_INTERRUPT_LEVEL(3) | RTEMS_NO_ASR |
+#if CPU_ENABLE_ROBUST_THREAD_DISPATCH == TRUE
+ RTEMS_INTERRUPT_LEVEL(0) |
+#else
+ RTEMS_INTERRUPT_LEVEL(3) |
+#endif
+ RTEMS_NO_ASR |
RTEMS_TIMESLICE | RTEMS_NO_PREEMPT,
RTEMS_INTERRUPT_MASK | RTEMS_ASR_MASK |
RTEMS_TIMESLICE_MASK | RTEMS_PREEMPT_MASK,
diff --git a/testsuites/sptests/sp37/init.c b/testsuites/sptests/sp37/init.c
index dc4867c55c..b050d7f7d1 100644
--- a/testsuites/sptests/sp37/init.c
+++ b/testsuites/sptests/sp37/init.c
@@ -76,11 +76,19 @@ static void test_isr_level_for_new_threads( ISR_Level last_proper_level )
};
for ( current = 0 ; current <= mask ; ++current ) {
- rtems_mode initial_modes = RTEMS_INTERRUPT_LEVEL(current);
+ rtems_mode initial_modes;
rtems_id id;
rtems_status_code sc;
rtems_event_set events;
+ initial_modes = RTEMS_INTERRUPT_LEVEL(current);
+
+#if CPU_ENABLE_ROBUST_THREAD_DISPATCH == TRUE
+ if ( initial_modes != 0 ) {
+ break;
+ }
+#endif
+
ctx.actual_level = 0xffffffff;
sc = rtems_task_create(