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authorAun-Ali Zaidi <admin@kodeit.net>2015-12-08 22:01:15 -0600
committerSebastian Huber <sebastian.huber@embedded-brains.de>2015-12-09 07:27:28 +0100
commit05d09f44fc298db02043cb6e21783cfb129b1c85 (patch)
treeadda7bcee66661674f08ed37710d814161f911ec
parentpowerpc/score603e: Remove (obselete). (diff)
downloadrtems-05d09f44fc298db02043cb6e21783cfb129b1c85.tar.bz2
powerpc/ep1a: Remove
updates #2457.
Diffstat
-rw-r--r--c/src/lib/libbsp/powerpc/acinclude.m42
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/Makefile.am100
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/bsp_specs14
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/configure.ac46
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/console/alloc360.c110
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/console/config.c439
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/console/console.h20
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/console/init68360.c35
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/console/m68360.h978
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/console/mc68360_scc.c904
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/console/ns16550cfg.c53
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/console/ns16550cfg.h43
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/console/polled_io.c1026
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/console/printk_support.c49
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/console/rsPMCQ1.c402
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/console/rsPMCQ1.h163
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/include/bsp.h209
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/include/tm27.h64
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c216
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c234
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/make/custom/ep1a.cfg17
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/pci/no_host_bridge.c28
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/preinstall.am143
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/start/start.S146
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c353
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/startup/linkcmds208
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/vme/VMEConfig.h113
27 files changed, 0 insertions, 6115 deletions
diff --git a/c/src/lib/libbsp/powerpc/acinclude.m4 b/c/src/lib/libbsp/powerpc/acinclude.m4
index 4dfb84d3ea..cddd9a7309 100644
--- a/c/src/lib/libbsp/powerpc/acinclude.m4
+++ b/c/src/lib/libbsp/powerpc/acinclude.m4
@@ -4,8 +4,6 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR],
case "$1" in
beatnik )
AC_CONFIG_SUBDIRS([beatnik]);;
- ep1a )
- AC_CONFIG_SUBDIRS([ep1a]);;
gen5200 )
AC_CONFIG_SUBDIRS([gen5200]);;
gen83xx )
diff --git a/c/src/lib/libbsp/powerpc/ep1a/Makefile.am b/c/src/lib/libbsp/powerpc/ep1a/Makefile.am
deleted file mode 100644
index b1d0394798..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/Makefile.am
+++ /dev/null
@@ -1,100 +0,0 @@
-ACLOCAL_AMFLAGS = -I ../../../../aclocal
-
-include $(top_srcdir)/../../../../automake/compile.am
-
-include_bspdir = $(includedir)/bsp
-
-dist_project_lib_DATA = bsp_specs
-
-include_HEADERS = include/bsp.h
-include_HEADERS += include/tm27.h
-
-nodist_include_HEADERS = include/bspopts.h
-nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
-DISTCLEANFILES = include/bspopts.h
-nodist_include_HEADERS += ../../shared/include/coverhd.h
-
-###
-dist_project_lib_DATA += startup/linkcmds
-
-noinst_LIBRARIES = libbspstart.a
-libbspstart_a_SOURCES = start/start.S
-project_lib_DATA = start.$(OBJEXT)
-
-libbspstart_a_SOURCES += ../../powerpc/shared/start/rtems_crti.S
-project_lib_DATA += rtems_crti.$(OBJEXT)
-
-noinst_LIBRARIES += libbsp.a
-libbsp_a_SOURCES =
-
-# startup
-libbsp_a_SOURCES += startup/bspstart.c ../../shared/bootcard.c \
- ../../shared/bsppost.c ../../shared/bsppredriverhook.c \
- ../../powerpc/shared/startup/bspgetworkarea.c ../../shared/bsplibc.c \
- ../../powerpc/shared/startup/sbrk.c \
- ../../shared/bspclean.c ../../shared/gnatinstallhandler.c \
- ../../powerpc/shared/startup/pgtbl_setup.c \
- ../../powerpc/shared/startup/pgtbl_activate.c \
- ../../powerpc/shared/showbats.c
-
-# pclock
-libbsp_a_SOURCES += ../../powerpc/shared/clock/p_clock.c
-
-include_bsp_HEADERS = ../../powerpc/shared/console/uart.h \
- ../../powerpc/shared/motorola/motorola.h \
- ../../powerpc/shared/residual/residual.h \
- ../../powerpc/shared/residual/pnp.h \
- ../../powerpc/shared/console/consoleIo.h console/rsPMCQ1.h \
- ../../shared/console_private.h
-
-# console
-libbsp_a_SOURCES += console/ns16550cfg.c \
- console/mc68360_scc.c console/rsPMCQ1.c console/alloc360.c \
- console/init68360.c console/config.c console/printk_support.c \
- ../../shared/console.c ../../shared/console_select.c \
- ../../shared/console_read.c ../../shared/console_write.c \
- ../../shared/console_control.c
-
-include_bsp_HEADERS += ../../powerpc/shared/openpic/openpic.h
-# openpic
-libbsp_a_SOURCES += ../../powerpc/shared/openpic/openpic.h \
- ../../powerpc/shared/openpic/openpic.c
-
-include_bsp_HEADERS += ../../powerpc/shared/pci/pci.h
-# pci
-libbsp_a_SOURCES += pci/no_host_bridge.c ../../powerpc/shared/pci/pci.c \
- ../../powerpc/shared/pci/pcifinddevice.c
-
-include_bsp_HEADERS += ../../powerpc/shared/irq/irq.h \
- ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
-# irq
-libbsp_a_SOURCES += irq/irq_init.c irq/openpic_xxx_irq.c ../../powerpc/shared/irq/i8259.c
-
-include_bsp_HEADERS += ../../shared/vmeUniverse/vmeUniverse.h \
- vme/VMEConfig.h \
- ../../shared/vmeUniverse/vme_am_defs.h \
- ../../shared/vmeUniverse/VME.h \
- ../../shared/vmeUniverse/vmeUniverseDMA.h\
- ../../shared/vmeUniverse/bspVmeDmaList.h\
- ../../shared/vmeUniverse/VMEDMA.h
-
-# vme
-libbsp_a_SOURCES += ../../shared/vmeUniverse/vmeUniverse.c \
- ../../shared/vmeUniverse/bspVmeDmaList.c \
- ../shared/vme/vmeconfig.c \
- ../shared/vme/vme_universe.c \
- ../../shared/vmeUniverse/vme_am_defs.h
-
-libbsp_a_LIBADD = \
- ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
- ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
- ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
- ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
- ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
- ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
- ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
- ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
- ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel
-
-include $(srcdir)/preinstall.am
-include $(top_srcdir)/../../../../automake/local.am
diff --git a/c/src/lib/libbsp/powerpc/ep1a/bsp_specs b/c/src/lib/libbsp/powerpc/ep1a/bsp_specs
deleted file mode 100644
index d11921e011..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/bsp_specs
+++ /dev/null
@@ -1,14 +0,0 @@
-%rename endfile old_endfile
-%rename startfile old_startfile
-%rename link old_link
-
-*startfile:
-%{!qrtems: %(old_startfile)} \
-%{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s start.o%s \
- -e __rtems_entry_point -u __vectors}}
-
-*link:
-%{!qrtems: %(old_link)} %{qrtems: -dp -Bstatic}
-
-*endfile:
-%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s ecrtn.o%s}
diff --git a/c/src/lib/libbsp/powerpc/ep1a/configure.ac b/c/src/lib/libbsp/powerpc/ep1a/configure.ac
deleted file mode 100644
index c76623d7a2..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/configure.ac
+++ /dev/null
@@ -1,46 +0,0 @@
-## Process this file with autoconf to produce a configure script.
-
-AC_PREREQ([2.69])
-AC_INIT([rtems-c-src-lib-libbsp-powerpc-ep1a],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
-AC_CONFIG_SRCDIR([bsp_specs])
-RTEMS_TOP(../../../../../..)
-
-RTEMS_CANONICAL_TARGET_CPU
-AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2])
-RTEMS_BSP_CONFIGURE
-
-RTEMS_PROG_CC_FOR_TARGET
-RTEMS_CANONICALIZE_TOOLS
-RTEMS_PROG_CCAS
-
-RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[])
-RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED
-
-RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[])
-RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED
-
-RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[0])
-RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS],
-[whether using console interrupts])
-
-RTEMS_BSPOPTS_SET([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [*], [1])
-RTEMS_BSPOPTS_HELP([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK],
-[If defined then the BSP may reduce the available memory size
-initially. This can be useful for debugging (reduce the core
-size) or dynamic loading (std gcc text offsets/jumps are < +/-32M).
-Note that the policy can still be defined by the application
-(see sbrk.c, BSP_sbrk_policy). By undefining
-CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK this feature is removed
-and a little memory is saved.])
-
-RTEMS_CHECK_NETWORKING
-AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
-
-RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
-
-# Explicitly list all Makefiles here
-AC_CONFIG_FILES([Makefile])
-
-RTEMS_PPC_EXCEPTIONS
-
-AC_OUTPUT
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/alloc360.c b/c/src/lib/libbsp/powerpc/ep1a/console/alloc360.c
deleted file mode 100644
index edc13ff1d8..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/console/alloc360.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * MC68360 buffer descriptor allocation routines
- *
- * W. Eric Norum
- * Saskatchewan Accelerator Laboratory
- * University of Saskatchewan
- * Saskatoon, Saskatchewan, CANADA
- * eric@skatter.usask.ca
- *
- * COPYRIGHT (c) 2008.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <rtems.h>
-#include <bsp.h>
-#include "m68360.h"
-#include <rtems/error.h>
-#include "rsPMCQ1.h"
-#include <rtems/bspIo.h>
-
-
-#define DEBUG_PRINT 1
-
-void M360SetupMemory( M68360_t ptr )
-{
- volatile m360_t *m360;
-
- m360 = ptr->m360;
-
-#if DEBUG_PRINT
-printk("m360->mcr:0x%08x Q1_360_SIM_MCR:0x%08x\n",
- (unsigned int)&(m360->mcr), ((unsigned int)m360+Q1_360_SIM_MCR));
-#endif
- ptr->bdregions[0].base = &m360->dpram1[0];
- ptr->bdregions[0].size = sizeof m360->dpram1;
- ptr->bdregions[0].used = 0;
-
- ptr->bdregions[1].base = &m360->dpram3[0];
- ptr->bdregions[1].size = sizeof m360->dpram3;
- ptr->bdregions[1].used = 0;
-
- ptr->bdregions[2].base = &m360->dpram0[0];
- ptr->bdregions[2].size = sizeof m360->dpram0;
- ptr->bdregions[2].used = 0;
-
- ptr->bdregions[3].base = &m360->dpram2[0];
- ptr->bdregions[3].size = sizeof m360->dpram2;
- ptr->bdregions[3].used = 0;
-}
-
-
-/*
- * Send a command to the CPM RISC processer
- */
-void *
-M360AllocateBufferDescriptors (M68360_t ptr, int count)
-{
- unsigned int i;
- rtems_interrupt_level level;
- volatile unsigned char *bdp = NULL;
- unsigned int want = count * sizeof(m360BufferDescriptor_t);
- int have;
-
- /*
- * Running with interrupts disabled is usually considered bad
- * form, but this routine is probably being run as part of an
- * initialization sequence so the effect shouldn't be too severe.
- */
- rtems_interrupt_disable(level);
-
- for (i = 0 ; i < M360_NUM_DPRAM_REAGONS ; i++) {
-
- /*
- * Verify that the region exists.
- * This test is necessary since some chips have
- * less dual-port RAM.
- */
- if (ptr->bdregions[i].used == 0) {
- volatile unsigned char *cp = ptr->bdregions[i].base;
- *cp = 0xAA;
- if (*cp != 0xAA) {
- ptr->bdregions[i].used = ptr->bdregions[i].size;
- continue;
- }
- *cp = 0x55;
- if (*cp != 0x55) {
- ptr->bdregions[i].used = ptr->bdregions[i].size;
- continue;
- }
- *cp = 0x0;
- }
-
- have = ptr->bdregions[i].size - ptr->bdregions[i].used;
- if (have >= want) {
- bdp = ptr->bdregions[i].base + ptr->bdregions[i].used;
- ptr->bdregions[i].used += want;
- break;
- }
- }
- rtems_interrupt_enable(level);
- if (bdp == NULL){
- printk("rtems_panic can't allocate %d buffer descriptor(s).\n");
- rtems_panic ("Can't allocate %d buffer descriptor(s).\n", count);
- }
- return (void *)bdp;
-}
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/config.c b/c/src/lib/libbsp/powerpc/ep1a/console/config.c
deleted file mode 100644
index 8253c69b0d..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/console/config.c
+++ /dev/null
@@ -1,439 +0,0 @@
-/*
- * This file contains the TTY driver table for the EP1A
- *
- * COPYRIGHT (c) 1989-2008.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <libchip/serial.h>
-#include <libchip/ns16550.h>
-#include "ns16550cfg.h"
-#include <bsp.h>
-#include <libcpu/io.h>
-#include "m68360.h"
-
-/*
- * Based on BSP configuration information decide whether to do polling IO
- * or interrupt driven IO.
- */
-#define NS16550_FUNCTIONS &ns16550_fns_polled
-#define MC68360_SCC_FUNCTIONS &mc68360_scc_fns
-
-/*
- * Configuration specific probe routines
- */
-static bool config_68360_scc_base_probe_1(int minor);
-static bool config_68360_scc_base_probe_2(int minor);
-static bool config_68360_scc_base_probe_3(int minor);
-static bool config_68360_scc_base_probe_4(int minor);
-static bool config_68360_scc_base_probe_5(int minor);
-static bool config_68360_scc_base_probe_6(int minor);
-static bool config_68360_scc_base_probe_7(int minor);
-static bool config_68360_scc_base_probe_8(int minor);
-static bool config_68360_scc_base_probe_9(int minor);
-static bool config_68360_scc_base_probe_10(int minor);
-static bool config_68360_scc_base_probe_11(int minor);
-static bool config_68360_scc_base_probe_12(int minor);
-
-extern const console_fns mc68360_scc_fns;
-
-/*
- * The following table configures the console drivers used in this BSP.
- *
- * The first entry which, when probed, is available, will be named /dev/console,
- * all others being given the name indicated.
- *
- * Each field is interpreted thus:
- *
- * sDeviceName This is the name of the device.
- * pDeviceFns This is a pointer to the set of driver routines to use.
- * pDeviceFlow This is a pointer to the set of flow control routines to
- * use. Serial device drivers will typically supply RTSCTS
- * and DTRCTS handshake routines for DCE to DCE communication,
- * however for DCE to DTE communication, no such routines
- * should be necessary as RTS will be driven automatically
- * when the transmitter is active.
- * ulMargin The high water mark in the input buffer is set to the buffer
- * size less ulMargin. Once this level is reached, the driver's
- * flow control routine used to stop the remote transmitter will
- * be called. This figure should be greater than or equal to
- * the number of stages of FIFO between the transmitter and
- * receiver.
- * ulHysteresis After the high water mark specified by ulMargin has been
- * reached, the driver's routine to re-start the remote
- * transmitter will be called once the level in the input
- * buffer has fallen by ulHysteresis bytes.
- * pDeviceParams This contains either device specific data or a pointer to a
- * device specific structure containing additional information
- * not provided in this table.
- * ulCtrlPort1 This is the primary control port number for the device. This
- * may be used to specify different instances of the same device
- * type.
- * ulCtrlPort2 This is the secondary control port number, of use when a given
- * device has more than one available channel.
- * ulDataPort This is the port number for the data port of the device
- * ulIntVector This encodes the interrupt vector of the device.
- *
- */
-console_tbl Console_Configuration_Ports[] = {
- /*
- * NS16550 Chips provide first COM1 and COM2 Ports.
- */
- {
- "/dev/com1", /* sDeviceName */
- SERIAL_NS16550, /* deviceType */
- NS16550_FUNCTIONS, /* pDeviceFns */
- NULL, /* deviceProbe */
- &ns16550_flow_RTSCTS, /* pDeviceFlow */
- 16, /* ulMargin */
- 8, /* ulHysteresis */
- (void *)9600, /* baud rate */ /* pDeviceParams */
- UART_BASE_COM1, /* ulCtrlPort1 */
- 0, /* ulCtrlPort2 */
- UART_BASE_COM1, /* ulDataPort */
- Read_ns16550_register, /* getRegister */
- Write_ns16550_register, /* setRegister */
- NULL, /* getData */
- NULL, /* setData */
- 7372800, /* ulClock */
- 0 /* ulIntVector */
- },
- {
- "/dev/com2", /* sDeviceName */
- SERIAL_NS16550, /* deviceType */
- NS16550_FUNCTIONS, /* pDeviceFns */
- NULL, /* deviceProbe */
- &ns16550_flow_RTSCTS, /* pDeviceFlow */
- 16, /* ulMargin */
- 8, /* ulHysteresis */
- (void *)9600, /* baud rate */ /* pDeviceParams */
- UART_BASE_COM2, /* ulCtrlPort1-Filled in at runtime */
- 0, /* ulCtrlPort2 */
- UART_BASE_COM2, /* ulDataPort-Filled in at runtime*/
- Read_ns16550_register, /* getRegister */
- Write_ns16550_register, /* setRegister */
- NULL, /* getData */
- NULL, /* setData */
- 7372800, /* ulClock */
- 0 /* ulIntVector */
- },
- /*
- * Up to 12 serial ports are provided by MC68360 SCC ports.
- * EP1A may have one MC68360 providing 4 ports (A,B,C,D).
- */
- {
- "/dev/rs232_2", /* sDeviceName */
- SERIAL_CUSTOM, /* deviceType */
- MC68360_SCC_FUNCTIONS, /* pDeviceFns */
- config_68360_scc_base_probe_1, /* deviceProbe */
- NULL, /* pDeviceFlow */
- 16, /* ulMargin */
- 8, /* ulHysteresis */
- (void *)9600, /* baud rate */ /* pDeviceParams */
- 0, /* ulCtrlPort1 */
- 0, /* ulCtrlPort2 */
- 0, /* ulDataPort */
- NULL, /* getRegister */
- NULL, /* setRegister */
- NULL, /* getData */
- NULL, /* setData */
- 0, /* ulClock */
- 0 /* ulIntVector */
- },
- {
- "/dev/rs422_1", /* sDeviceName */
- SERIAL_CUSTOM, /* deviceType */
- MC68360_SCC_FUNCTIONS, /* pDeviceFns */
- config_68360_scc_base_probe_2, /* deviceProbe */
- NULL, /* pDeviceFlow */
- 16, /* ulMargin */
- 8, /* ulHysteresis */
- (void *)9600, /* baud rate */ /* pDeviceParams */
- 0, /* ulCtrlPort1 */
- 0, /* ulCtrlPort2 */
- 0, /* ulDataPort */
- NULL, /* getRegister */
- NULL, /* setRegister */
- NULL, /* getData */
- NULL, /* setData */
- 0, /* ulClock */
- 0 /* ulIntVector */
- },
- {
- "/dev/rs422_2", /* sDeviceName */
- SERIAL_CUSTOM, /* deviceType */
- MC68360_SCC_FUNCTIONS, /* pDeviceFns */
- config_68360_scc_base_probe_3, /* deviceProbe */
- NULL, /* pDeviceFlow */
- 16, /* ulMargin */
- 8, /* ulHysteresis */
- (void *)9600, /* baud rate */ /* pDeviceParams */
- 0, /* ulCtrlPort1 */
- 0, /* ulCtrlPort2 */
- 0, /* ulDataPort */
- NULL, /* getRegister */
- NULL, /* setRegister */
- NULL, /* getData */
- NULL, /* setData */
- 0, /* ulClock */
- 0 /* ulIntVector */
- },
- {
- "/dev/ep1a_d", /* sDeviceName */
- SERIAL_CUSTOM, /* deviceType */
- MC68360_SCC_FUNCTIONS, /* pDeviceFns */
- config_68360_scc_base_probe_4, /* deviceProbe */
- NULL, /* pDeviceFlow */
- 16, /* ulMargin */
- 8, /* ulHysteresis */
- (void *)9600, /* baud rate */ /* pDeviceParams */
- 0, /* ulCtrlPort1 */
- 0, /* ulCtrlPort2 */
- 0, /* ulDataPort */
- NULL, /* getRegister */
- NULL, /* setRegister */
- NULL, /* getData */
- NULL, /* setData */
- 0, /* ulClock */
- 0 /* ulIntVector */
- },
- /*
- * PMC1 may have one MC16550 providing 4 ports (A,B,C,D).
- */
- {
- "/dev/rs422_3", /* sDeviceName */
- SERIAL_CUSTOM, /* deviceType */
- MC68360_SCC_FUNCTIONS, /* pDeviceFns */
- config_68360_scc_base_probe_5, /* deviceProbe */
- NULL, /* pDeviceFlow */
- 16, /* ulMargin */
- 8, /* ulHysteresis */
- (void *)9600, /* baud rate */ /* pDeviceParams */
- 0, /* ulCtrlPort1 */
- 0, /* ulCtrlPort2 */
- 0, /* ulDataPort */
- NULL, /* getRegister */
- NULL, /* setRegister */
- NULL, /* getData */
- NULL, /* setData */
- 0, /* ulClock */
- 0 /* ulIntVector */
- },
- {
- "/dev/rs422_4", /* sDeviceName */
- SERIAL_CUSTOM, /* deviceType */
- MC68360_SCC_FUNCTIONS, /* pDeviceFns */
- config_68360_scc_base_probe_6, /* deviceProbe */
- NULL, /* pDeviceFlow */
- 16, /* ulMargin */
- 8, /* ulHysteresis */
- (void *)9600, /* baud rate */ /* pDeviceParams */
- 0, /* ulCtrlPort1 */
- 0, /* ulCtrlPort2 */
- 0, /* ulDataPort */
- NULL, /* getRegister */
- NULL, /* setRegister */
- NULL, /* getData */
- NULL, /* setData */
- 0, /* ulClock */
- 0 /* ulIntVector */
- },
- {
- "/dev/rs422_5", /* sDeviceName */
- SERIAL_CUSTOM, /* deviceType */
- MC68360_SCC_FUNCTIONS, /* pDeviceFns */
- config_68360_scc_base_probe_7, /* deviceProbe */
- NULL, /* pDeviceFlow */
- 16, /* ulMargin */
- 8, /* ulHysteresis */
- (void *)9600, /* baud rate */ /* pDeviceParams */
- 0, /* ulCtrlPort1 */
- 0, /* ulCtrlPort2 */
- 0, /* ulDataPort */
- NULL, /* getRegister */
- NULL, /* setRegister */
- NULL, /* getData */
- NULL, /* setData */
- 0, /* ulClock */
- 0 /* ulIntVector */
- },
- {
- "/dev/rs422_6", /* sDeviceName */
- SERIAL_CUSTOM, /* deviceType */
- MC68360_SCC_FUNCTIONS, /* pDeviceFns */
- config_68360_scc_base_probe_8, /* deviceProbe */
- NULL, /* pDeviceFlow */
- 16, /* ulMargin */
- 8, /* ulHysteresis */
- (void *)9600, /* baud rate */ /* pDeviceParams */
- 0, /* ulCtrlPort1 */
- 0, /* ulCtrlPort2 */
- 0, /* ulDataPort */
- NULL, /* getRegister */
- NULL, /* setRegister */
- NULL, /* getData */
- NULL, /* setData */
- 0, /* ulClock */
- 0 /* ulIntVector */
- },
- /*
- * PMC2 may have one MC16550 providing 4 ports (A,B,C,D).
- */
- {
- "/dev/rs232_3", /* sDeviceName */
- SERIAL_CUSTOM, /* deviceType */
- MC68360_SCC_FUNCTIONS, /* pDeviceFns */
- config_68360_scc_base_probe_9, /* deviceProbe */
- NULL, /* pDeviceFlow */
- 16, /* ulMargin */
- 8, /* ulHysteresis */
- (void *)9600, /* baud rate */ /* pDeviceParams */
- 0, /* ulCtrlPort1 */
- 0, /* ulCtrlPort2 */
- 0, /* ulDataPort */
- NULL, /* getRegister */
- NULL, /* setRegister */
- NULL, /* getData */
- NULL, /* setData */
- 0, /* ulClock */
- 0 /* ulIntVector */
- },
- {
- "/dev/rs232_4", /* sDeviceName */
- SERIAL_CUSTOM, /* deviceType */
- MC68360_SCC_FUNCTIONS, /* pDeviceFns */
- config_68360_scc_base_probe_10, /* deviceProbe */
- NULL, /* pDeviceFlow */
- 16, /* ulMargin */
- 8, /* ulHysteresis */
- (void *)9600, /* baud rate */ /* pDeviceParams */
- 0, /* ulCtrlPort1 */
- 0, /* ulCtrlPort2 */
- 0, /* ulDataPort */
- NULL, /* getRegister */
- NULL, /* setRegister */
- NULL, /* getData */
- NULL, /* setData */
- 0, /* ulClock */
- 0 /* ulIntVector */
- },
- {
- "/dev/rs232_5", /* sDeviceName */
- SERIAL_CUSTOM, /* deviceType */
- MC68360_SCC_FUNCTIONS, /* pDeviceFns */
- config_68360_scc_base_probe_11, /* deviceProbe */
- NULL, /* pDeviceFlow */
- 16, /* ulMargin */
- 8, /* ulHysteresis */
- (void *)9600, /* baud rate */ /* pDeviceParams */
- 0, /* ulCtrlPort1 */
- 0, /* ulCtrlPort2 */
- 0, /* ulDataPort */
- NULL, /* getRegister */
- NULL, /* setRegister */
- NULL, /* getData */
- NULL, /* setData */
- 0, /* ulClock */
- 0 /* ulIntVector */
- },
- {
- "/dev/rs232_6", /* sDeviceName */
- SERIAL_CUSTOM, /* deviceType */
- MC68360_SCC_FUNCTIONS, /* pDeviceFns */
- config_68360_scc_base_probe_12, /* deviceProbe */
- NULL, /* pDeviceFlow */
- 16, /* ulMargin */
- 8, /* ulHysteresis */
- (void *)9600, /* baud rate */ /* pDeviceParams */
- 0, /* ulCtrlPort1 */
- 0, /* ulCtrlPort2 */
- 0, /* ulDataPort */
- NULL, /* getRegister */
- NULL, /* setRegister */
- NULL, /* getData */
- NULL, /* setData */
- 0, /* ulClock */
- 0 /* ulIntVector */
- }
-};
-
-/*
- * Define a variable that contains the number of statically configured
- * console devices.
- */
-unsigned long Console_Configuration_Count = \
- (sizeof(Console_Configuration_Ports)/sizeof(console_tbl));
-
-static bool config_68360_scc_base_probe(int minor, unsigned long busNo, unsigned long slotNo, int channel)
-{
- M68360_t chip = M68360_chips;
-
- /*
- * Find out if the chip is installed.
- */
- while (chip) {
- if ((chip->board_data->slotNo == slotNo) && (chip->board_data->busNo == busNo))
- break;
- chip = chip->next;
- }
-
- if (!chip)
- return false;
-
- Console_Port_Tbl[minor]->pDeviceParams = &chip->port[ channel-1 ];
- chip->port[ channel-1 ].minor = minor;
- return true;
-}
-
-static bool config_68360_scc_base_probe_1( int minor ) {
- return config_68360_scc_base_probe(minor, 0, 11, 1);
-}
-
-static bool config_68360_scc_base_probe_2( int minor ) {
- return config_68360_scc_base_probe(minor, 0, 11, 2);
-}
-
-static bool config_68360_scc_base_probe_3( int minor ) {
- return config_68360_scc_base_probe( minor, 0, 11, 3);
-}
-
-static bool config_68360_scc_base_probe_4( int minor ) {
- return config_68360_scc_base_probe( minor, 0, 11, 4);
-}
-
-static bool config_68360_scc_base_probe_5( int minor ) {
- return config_68360_scc_base_probe( minor, 0, 16, 1);
-}
-
-static bool config_68360_scc_base_probe_6( int minor ) {
- return config_68360_scc_base_probe( minor, 0, 16, 2);
-}
-
-static bool config_68360_scc_base_probe_7( int minor ) {
- return config_68360_scc_base_probe( minor, 0, 16, 3);
-}
-
-static bool config_68360_scc_base_probe_8( int minor ) {
- return config_68360_scc_base_probe( minor, 0, 16, 4);
-}
-
-static bool config_68360_scc_base_probe_9( int minor ) {
- return config_68360_scc_base_probe( minor, 0, 15, 1);
-}
-
-static bool config_68360_scc_base_probe_10( int minor ) {
- return config_68360_scc_base_probe( minor, 0, 15, 2);
-}
-
-static bool config_68360_scc_base_probe_11( int minor ) {
- return config_68360_scc_base_probe( minor, 0, 15, 3);
-}
-
-static bool config_68360_scc_base_probe_12( int minor ) {
- return config_68360_scc_base_probe( minor, 0, 15, 4);
-}
-
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/console.h b/c/src/lib/libbsp/powerpc/ep1a/console/console.h
deleted file mode 100644
index c2354d293e..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/console/console.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * This driver uses the termios pseudo driver.
- *
- * COPYRIGHT (c) 1989-2008.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <rtems/ringbuf.h>
-#include <libchip/serial.h>
-#include <libchip/ns16550.h>
-
-extern console_tbl Console_Port_Tbl[];
-extern console_data Console_Port_Data[];
-extern unsigned long Console_Port_Count;
-
-bool Console_Port_Tbl_Init_ppc8245(int minor);
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/init68360.c b/c/src/lib/libbsp/powerpc/ep1a/console/init68360.c
deleted file mode 100644
index bafcf8d8fa..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/console/init68360.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * MC68360 support routines - reduced from gen68360 BSP
- *
- * W. Eric Norum
- * Saskatchewan Accelerator Laboratory
- * University of Saskatchewan
- * Saskatoon, Saskatchewan, CANADA
- * eric@skatter.usask.ca
- *
- * COPYRIGHT (c) 1989-1999.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <rtems.h>
-#include <bsp.h>
-#include "m68360.h"
-
-/*
- * Send a command to the CPM RISC processer
- */
-
-void M360ExecuteRISC( volatile m360_t *m360, uint16_t command)
-{
- uint16_t sr;
-
- rtems_interrupt_disable(sr);
- while (m360->cr & M360_CR_FLG)
- continue;
- m360->cr = command | M360_CR_FLG;
- rtems_interrupt_enable(sr);
-}
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/m68360.h b/c/src/lib/libbsp/powerpc/ep1a/console/m68360.h
deleted file mode 100644
index 3645486857..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/console/m68360.h
+++ /dev/null
@@ -1,978 +0,0 @@
-/*
- * MOTOROLA MC68360 QUAD INTEGRATED COMMUNICATIONS CONTROLLER (QUICC)
- *
- * HARDWARE DECLARATIONS
- *
- *
- * Submitted By:
- *
- * W. Eric Norum
- * Saskatchewan Accelerator Laboratory
- * University of Saskatchewan
- * 107 North Road
- * Saskatoon, Saskatchewan, CANADA
- * S7N 5C6
- *
- * eric@skatter.usask.ca
- *
- *
- * COPYRIGHT (c) 1989-1999.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef __MC68360_h
-#define __MC68360_h
-
-#include "rsPMCQ1.h"
-
-/*
- *************************************************************************
- * REGISTER SUBBLOCKS *
- *************************************************************************
- */
-
-/*
- * Memory controller registers
- */
-typedef struct m360MEMCRegisters_ {
- uint32_t br;
- uint32_t or;
- uint32_t _pad[2];
-} m360MEMCRegisters_t;
-
-
-#define M360_GSMR_RFW 0x00000020
-
-#define M360_GSMR_RINV 0x02000000
-#define M360_GSMR_TINV 0x01000000
-#define M360_GSMR_TDCR_16X 0x00020000
-#define M360_GSMR_RDCR_16X 0x00008000
-#define M360_GSMR_DIAG_LLOOP 0x00000040
-#define M360_GSMR_ENR 0x00000020
-#define M360_GSMR_ENT 0x00000010
-#define M360_GSMR_MODE_UART 0x00000004
-
-#define M360_PSMR_FLC 0x8000
-#define M360_PSMR_SL_1 0x0000
-#define M360_PSMR_SL_2 0x4000
-#define M360_PSMR_CL5 0x0000
-#define M360_PSMR_CL6 0x1000
-#define M360_PSMR_CL7 0x2000
-#define M360_PSMR_CL8 0x3000
-#define M360_PSMR_UM_NORMAL 0x0000
-#define M360_PSMR_FRZ 0x0200
-#define M360_PSMR_RZS 0x0100
-#define M360_PSMR_SYN 0x0080
-#define M360_PSMR_DRT 0x0040
-#define M360_PSMR_PEN 0x0010
-#define M360_PSMR_RPM_ODD 0x0000
-#define M360_PSMR_RPM_LOW 0x0004
-#define M360_PSMR_RPM_EVEN 0x0008
-#define M360_PSMR_RPM_HI 0x000c
-#define M360_PSMR_TPM_ODD 0x0000
-#define M360_PSMR_TPM_LOW 0x0001
-#define M360_PSMR_TPM_EVEN 0x0002
-#define M360_PSMR_TPM_HI 0x0003
-
-/*
- * Serial Communications Controller registers
- */
-typedef struct m360SCCRegisters_ {
- uint32_t gsmr_l;
- uint32_t gsmr_h;
- uint16_t psmr;
- uint16_t _pad0;
- uint16_t todr;
- uint16_t dsr;
- uint16_t scce;
- uint16_t _pad1;
- uint16_t sccm;
- uint8_t _pad2;
- uint8_t sccs;
- uint32_t _pad3[2];
-} m360SCCRegisters_t;
-
-/*
- * Serial Management Controller registers
- */
-typedef struct m360SMCRegisters_ {
- uint16_t _pad0;
- uint16_t smcmr;
- uint16_t _pad1;
- uint8_t smce;
- uint8_t _pad2;
- uint16_t _pad3;
- uint8_t smcm;
- uint8_t _pad4;
- uint32_t _pad5;
-} m360SMCRegisters_t;
-
-
-/*
- *************************************************************************
- * Miscellaneous Parameters *
- *************************************************************************
- */
-typedef struct m360MiscParms_ {
- uint16_t rev_num;
- uint16_t _res1;
- uint32_t _res2;
- uint32_t _res3;
-} m360MiscParms_t;
-
-/*
- *************************************************************************
- * RISC Timers *
- *************************************************************************
- */
-typedef struct m360TimerParms_ {
- uint16_t tm_base;
- uint16_t _tm_ptr;
- uint16_t _r_tmr;
- uint16_t _r_tmv;
- uint32_t tm_cmd;
- uint32_t tm_cnt;
-} m360TimerParms_t;
-
-/*
- * RISC Controller Configuration Register (RCCR)
- * All other bits in this register are either reserved or
- * used only with a Motorola-supplied RAM microcode packge.
- */
-#define M360_RCCR_TIME (1<<15) /* Enable timer */
-#define M360_RCCR_TIMEP(x) ((x)<<8) /* Timer period */
-
-/*
- * Command register
- * Set up this register before issuing a M360_CR_OP_SET_TIMER command.
- */
-#define M360_TM_CMD_V (1<<31) /* Set to enable timer */
-#define M360_TM_CMD_R (1<<30) /* Set for automatic restart */
-#define M360_TM_CMD_TIMER(x) ((x)<<16) /* Select timer */
-#define M360_TM_CMD_PERIOD(x) (x) /* Timer period (16 bits) */
-
-/*
- *************************************************************************
- * DMA Controllers *
- *************************************************************************
- */
-typedef struct m360IDMAparms_ {
- uint16_t ibase;
- uint16_t ibptr;
- uint32_t _istate;
- uint32_t _itemp;
-} m360IDMAparms_t;
-
-/*
- *************************************************************************
- * Serial Communication Controllers *
- *************************************************************************
- */
-typedef struct m360SCCparms_ {
- uint16_t rbase;
- uint16_t tbase;
- uint8_t rfcr;
- uint8_t tfcr;
- uint16_t mrblr;
- uint32_t _rstate;
- uint32_t _pad0;
- uint16_t _rbptr;
- uint16_t _pad1;
- uint32_t _pad2;
- uint32_t _tstate;
- uint32_t _pad3;
- uint16_t _tbptr;
- uint16_t _pad4;
- uint32_t _pad5;
- uint32_t _rcrc;
- uint32_t _tcrc;
- union {
- struct {
- uint32_t _res0;
- uint32_t _res1;
- uint16_t max_idl;
- uint16_t _idlc;
- uint16_t brkcr;
- uint16_t parec;
- uint16_t frmec;
- uint16_t nosec;
- uint16_t brkec;
- uint16_t brklen;
- uint16_t uaddr[2];
- uint16_t _rtemp;
- uint16_t toseq;
- uint16_t character[8];
- uint16_t rccm;
- uint16_t rccr;
- uint16_t rlbc;
- } uart;
- struct {
- uint32_t crc_p;
- uint32_t crc_c;
- } transparent;
-
- } un;
-} m360SCCparms_t;
-
-typedef struct m360SCCENparms_ {
- uint16_t rbase;
- uint16_t tbase;
- uint8_t rfcr;
- uint8_t tfcr;
- uint16_t mrblr;
- uint32_t _rstate;
- uint32_t _pad0;
- uint16_t _rbptr;
- uint16_t _pad1;
- uint32_t _pad2;
- uint32_t _tstate;
- uint32_t _pad3;
- uint16_t _tbptr;
- uint16_t _pad4;
- uint32_t _pad5;
- uint32_t _rcrc;
- uint32_t _tcrc;
- union {
- struct {
- uint32_t _res0;
- uint32_t _res1;
- uint16_t max_idl;
- uint16_t _idlc;
- uint16_t brkcr;
- uint16_t parec;
- uint16_t frmec;
- uint16_t nosec;
- uint16_t brkec;
- uint16_t brklen;
- uint16_t uaddr[2];
- uint16_t _rtemp;
- uint16_t toseq;
- uint16_t character[8];
- uint16_t rccm;
- uint16_t rccr;
- uint16_t rlbc;
- } uart;
- struct {
- uint32_t c_pres;
- uint32_t c_mask;
- uint32_t crcec;
- uint32_t alec;
- uint32_t disfc;
- uint16_t pads;
- uint16_t ret_lim;
- uint16_t _ret_cnt;
- uint16_t mflr;
- uint16_t minflr;
- uint16_t maxd1;
- uint16_t maxd2;
- uint16_t _maxd;
- uint16_t dma_cnt;
- uint16_t _max_b;
- uint16_t gaddr1;
- uint16_t gaddr2;
- uint16_t gaddr3;
- uint16_t gaddr4;
- uint32_t _tbuf0data0;
- uint32_t _tbuf0data1;
- uint32_t _tbuf0rba0;
- uint32_t _tbuf0crc;
- uint16_t _tbuf0bcnt;
- uint16_t paddr_h;
- uint16_t paddr_m;
- uint16_t paddr_l;
- uint16_t p_per;
- uint16_t _rfbd_ptr;
- uint16_t _tfbd_ptr;
- uint16_t _tlbd_ptr;
- uint32_t _tbuf1data0;
- uint32_t _tbuf1data1;
- uint32_t _tbuf1rba0;
- uint32_t _tbuf1crc;
- uint16_t _tbuf1bcnt;
- uint16_t _tx_len;
- uint16_t iaddr1;
- uint16_t iaddr2;
- uint16_t iaddr3;
- uint16_t iaddr4;
- uint16_t _boff_cnt;
- uint16_t taddr_h;
- uint16_t taddr_m;
- uint16_t taddr_l;
- } ethernet;
- struct {
- uint32_t crc_p;
- uint32_t crc_c;
- } transparent;
- } un;
-} m360SCCENparms_t;
-
-/*
- * Receive and transmit function code register bits
- * These apply to the function code registers of all devices, not just SCC.
- */
-#define M360_RFCR_MOT (1<<4)
-#define M360_RFCR_DMA_SPACE 0x8
-#define M360_TFCR_MOT (1<<4)
-#define M360_TFCR_DMA_SPACE 0x8
-
-/*
- *************************************************************************
- * Serial Management Controllers *
- *************************************************************************
- */
-typedef struct m360SMCparms_ {
- uint16_t rbase;
- uint16_t tbase;
- uint8_t rfcr;
- uint8_t tfcr;
- uint16_t mrblr;
- uint32_t _rstate;
- uint32_t _pad0;
- uint16_t _rbptr;
- uint16_t _pad1;
- uint32_t _pad2;
- uint32_t _tstate;
- uint32_t _pad3;
- uint16_t _tbptr;
- uint16_t _pad4;
- uint32_t _pad5;
- union {
- struct {
- uint16_t max_idl;
- uint16_t _pad0;
- uint16_t brklen;
- uint16_t brkec;
- uint16_t brkcr;
- uint16_t _r_mask;
- } uart;
- struct {
- uint16_t _pad0[5];
- } transparent;
- } un;
-} m360SMCparms_t;
-
-/*
- * Mode register
- */
-#define M360_SMCMR_CLEN(x) ((x)<<11) /* Character length */
-#define M360_SMCMR_2STOP (1<<10) /* 2 stop bits */
-#define M360_SMCMR_PARITY (1<<9) /* Enable parity */
-#define M360_SMCMR_EVEN (1<<8) /* Even parity */
-#define M360_SMCMR_SM_GCI (0<<4) /* GCI Mode */
-#define M360_SMCMR_SM_UART (2<<4) /* UART Mode */
-#define M360_SMCMR_SM_TRANSPARENT (3<<4) /* Transparent Mode */
-#define M360_SMCMR_DM_LOOPBACK (1<<2) /* Local loopback mode */
-#define M360_SMCMR_DM_ECHO (2<<2) /* Echo mode */
-#define M360_SMCMR_TEN (1<<1) /* Enable transmitter */
-#define M360_SMCMR_REN (1<<0) /* Enable receiver */
-
-/*
- * Event and mask registers (SMCE, SMCM)
- */
-#define M360_SMCE_BRK (1<<4)
-#define M360_SMCE_BSY (1<<2)
-#define M360_SMCE_TX (1<<1)
-#define M360_SMCE_RX (1<<0)
-
-/*
- *************************************************************************
- * Serial Peripheral Interface *
- *************************************************************************
- */
-typedef struct m360SPIparms_ {
- uint16_t rbase;
- uint16_t tbase;
- uint8_t rfcr;
- uint8_t tfcr;
- uint16_t mrblr;
- uint32_t _rstate;
- uint32_t _pad0;
- uint16_t _rbptr;
- uint16_t _pad1;
- uint32_t _pad2;
- uint32_t _tstate;
- uint32_t _pad3;
- uint16_t _tbptr;
- uint16_t _pad4;
- uint32_t _pad5;
-} m360SPIparms_t;
-
-/*
- * Mode register (SPMODE)
- */
-#define M360_SPMODE_LOOP (1<<14) /* Local loopback mode */
-#define M360_SPMODE_CI (1<<13) /* Clock invert */
-#define M360_SPMODE_CP (1<<12) /* Clock phase */
-#define M360_SPMODE_DIV16 (1<<11) /* Divide BRGCLK by 16 */
-#define M360_SPMODE_REV (1<<10) /* Reverse data */
-#define M360_SPMODE_MASTER (1<<9) /* SPI is master */
-#define M360_SPMODE_EN (1<<8) /* Enable SPI */
-#define M360_SPMODE_CLEN(x) ((x)<<4) /* Character length */
-#define M360_SPMODE_PM(x) (x) /* Prescaler modulus */
-
-/*
- * Mode register (SPCOM)
- */
-#define M360_SPCOM_STR (1<<7) /* Start transmit */
-
-/*
- * Event and mask registers (SPIE, SPIM)
- */
-#define M360_SPIE_MME (1<<5) /* Multi-master error */
-#define M360_SPIE_TXE (1<<4) /* Tx error */
-#define M360_SPIE_BSY (1<<2) /* Busy condition*/
-#define M360_SPIE_TXB (1<<1) /* Tx buffer */
-#define M360_SPIE_RXB (1<<0) /* Rx buffer */
-
-/*
- *************************************************************************
- * SDMA (SCC, SMC, SPI) Buffer Descriptors *
- *************************************************************************
- */
-typedef struct m360BufferDescriptor_ {
- uint16_t status;
- uint16_t length;
- uint32_t buffer; /* this is a void * to the 360 */
-} m360BufferDescriptor_t;
-
-/*
- * Bits in receive buffer descriptor status word
- */
-#define M360_BD_EMPTY (1<<15) /* Ethernet, SCC UART, SMC UART, SPI */
-#define M360_BD_WRAP (1<<13) /* Ethernet, SCC UART, SMC UART, SPI */
-#define M360_BD_INTERRUPT (1<<12) /* Ethernet, SCC UART, SMC UART, SPI */
-#define M360_BD_LAST (1<<11) /* Ethernet, SPI */
-#define M360_BD_CONTROL_CHAR (1<<11) /* SCC UART */
-#define M360_BD_FIRST_IN_FRAME (1<<10) /* Ethernet */
-#define M360_BD_ADDRESS (1<<10) /* SCC UART */
-#define M360_BD_CONTINUOUS (1<<9) /* SCC UART, SMC UART, SPI */
-#define M360_BD_MISS (1<<8) /* Ethernet */
-#define M360_BD_IDLE (1<<8) /* SCC UART, SMC UART */
-#define M360_BD_ADDRSS_MATCH (1<<7) /* SCC UART */
-#define M360_BD_LONG (1<<5) /* Ethernet */
-#define M360_BD_BREAK (1<<5) /* SCC UART, SMC UART */
-#define M360_BD_NONALIGNED (1<<4) /* Ethernet */
-#define M360_BD_FRAMING_ERROR (1<<4) /* SCC UART, SMC UART */
-#define M360_BD_SHORT (1<<3) /* Ethernet */
-#define M360_BD_PARITY_ERROR (1<<3) /* SCC UART, SMC UART */
-#define M360_BD_CRC_ERROR (1<<2) /* Ethernet */
-#define M360_BD_OVERRUN (1<<1) /* Ethernet, SCC UART, SMC UART, SPI */
-#define M360_BD_COLLISION (1<<0) /* Ethernet */
-#define M360_BD_CARRIER_LOST (1<<0) /* SCC UART */
-#define M360_BD_MASTER_ERROR (1<<0) /* SPI */
-
-/*
- * Bits in transmit buffer descriptor status word
- * Many bits have the same meaning as those in receiver buffer descriptors.
- */
-#define M360_BD_READY (1<<15) /* Ethernet, SCC UART, SMC UART, SPI */
-#define M360_BD_PAD (1<<14) /* Ethernet */
-#define M360_BD_CTS_REPORT (1<<11) /* SCC UART */
-#define M360_BD_TX_CRC (1<<10) /* Ethernet */
-#define M360_BD_DEFER (1<<9) /* Ethernet */
-#define M360_BD_HEARTBEAT (1<<8) /* Ethernet */
-#define M360_BD_PREAMBLE (1<<8) /* SCC UART, SMC UART */
-#define M360_BD_LATE_COLLISION (1<<7) /* Ethernet */
-#define M360_BD_NO_STOP_BIT (1<<7) /* SCC UART */
-#define M360_BD_RETRY_LIMIT (1<<6) /* Ethernet */
-#define M360_BD_RETRY_COUNT(x) (((x)&0x3C)>>2) /* Ethernet */
-#define M360_BD_UNDERRUN (1<<1) /* Ethernet, SPI */
-#define M360_BD_CARRIER_LOST (1<<0) /* Ethernet */
-#define M360_BD_CTS_LOST (1<<0) /* SCC UART */
-
-/*
- *************************************************************************
- * IDMA Buffer Descriptors *
- *************************************************************************
- */
-typedef struct m360IDMABufferDescriptor_ {
- uint16_t status;
- uint16_t _pad;
- uint32_t length;
- void *source;
- void *destination;
-} m360IDMABufferDescriptor_t;
-
-/*
- *************************************************************************
- * RISC Communication Processor Module Command Register (CR) *
- *************************************************************************
- */
-#define M360_CR_RST (1<<15) /* Reset communication processor */
-#define M360_CR_OP_INIT_RX_TX (0<<8) /* SCC, SMC UART, SMC GCI, SPI */
-#define M360_CR_OP_INIT_RX (1<<8) /* SCC, SMC UART, SPI */
-#define M360_CR_OP_INIT_TX (2<<8) /* SCC, SMC UART, SPI */
-#define M360_CR_OP_INIT_HUNT (3<<8) /* SCC, SMC UART */
-#define M360_CR_OP_STOP_TX (4<<8) /* SCC, SMC UART */
-#define M360_CR_OP_GR_STOP_TX (5<<8) /* SCC */
-#define M360_CR_OP_INIT_IDMA (5<<8) /* IDMA */
-#define M360_CR_OP_RESTART_TX (6<<8) /* SCC, SMC UART */
-#define M360_CR_OP_CLOSE_RX_BD (7<<8) /* SCC, SMC UART, SPI */
-#define M360_CR_OP_SET_GRP_ADDR (8<<8) /* SCC */
-#define M360_CR_OP_SET_TIMER (8<<8) /* Timer */
-#define M360_CR_OP_GCI_TIMEOUT (9<<8) /* SMC GCI */
-#define M360_CR_OP_RESERT_BCS (10<<8) /* SCC */
-#define M360_CR_OP_GCI_ABORT (10<<8) /* SMC GCI */
-#define M360_CR_CHAN_SCC1 (0<<4) /* Channel selection */
-#define M360_CR_CHAN_SCC2 (4<<4)
-#define M360_CR_CHAN_SPI (5<<4)
-#define M360_CR_CHAN_TIMER (5<<4)
-#define M360_CR_CHAN_SCC3 (8<<4)
-#define M360_CR_CHAN_SMC1 (9<<4)
-#define M360_CR_CHAN_IDMA1 (9<<4)
-#define M360_CR_CHAN_SCC4 (12<<4)
-#define M360_CR_CHAN_SMC2 (13<<4)
-#define M360_CR_CHAN_IDMA2 (13<<4)
-#define M360_CR_FLG (1<<0) /* Command flag */
-
-/*
- *************************************************************************
- * System Protection Control Register (SYPCR) *
- *************************************************************************
- */
-#define M360_SYPCR_SWE (1<<7) /* Software watchdog enable */
-#define M360_SYPCR_SWRI (1<<6) /* Software watchdog reset select */
-#define M360_SYPCR_SWT1 (1<<5) /* Software watchdog timing bit 1 */
-#define M360_SYPCR_SWT0 (1<<4) /* Software watchdog timing bit 0 */
-#define M360_SYPCR_DBFE (1<<3) /* Double bus fault monitor enable */
-#define M360_SYPCR_BME (1<<2) /* Bus monitor external enable */
-#define M360_SYPCR_BMT1 (1<<1) /* Bus monitor timing bit 1 */
-#define M360_SYPCR_BMT0 (1<<0) /* Bus monitor timing bit 0 */
-
-/*
- *************************************************************************
- * Memory Control Registers *
- *************************************************************************
- */
-#define M360_GMR_RCNT(x) ((x)<<24) /* Refresh count */
-#define M360_GMR_RFEN (1<<23) /* Refresh enable */
-#define M360_GMR_RCYC(x) ((x)<<21) /* Refresh cycle length */
-#define M360_GMR_PGS(x) ((x)<<18) /* Page size */
-#define M360_GMR_DPS_32BIT (0<<16) /* DRAM port size */
-#define M360_GMR_DPS_16BIT (1<<16)
-#define M360_GMR_DPS_8BIT (2<<16)
-#define M360_GMR_DPS_DSACK (3<<16)
-#define M360_GMR_WBT40 (1<<15) /* Wait between 040 transfers */
-#define M360_GMR_WBTQ (1<<14) /* Wait between 360 transfers */
-#define M360_GMR_SYNC (1<<13) /* Synchronous external access */
-#define M360_GMR_EMWS (1<<12) /* External master wait state */
-#define M360_GMR_OPAR (1<<11) /* Odd parity */
-#define M360_GMR_PBEE (1<<10) /* Parity bus error enable */
-#define M360_GMR_TSS40 (1<<9) /* TS* sample for 040 */
-#define M360_GMR_NCS (1<<8) /* No CPU space */
-#define M360_GMR_DWQ (1<<7) /* Delay write for 360 */
-#define M360_GMR_DW40 (1<<6) /* Delay write for 040 */
-#define M360_GMR_GAMX (1<<5) /* Global address mux enable */
-
-#define M360_MEMC_BR_FC(x) ((x)<<7) /* Function code limit */
-#define M360_MEMC_BR_TRLXQ (1<<6) /* Relax timing requirements */
-#define M360_MEMC_BR_BACK40 (1<<5) /* Burst acknowledge to 040 */
-#define M360_MEMC_BR_CSNT40 (1<<4) /* CS* negate timing for 040 */
-#define M360_MEMC_BR_CSNTQ (1<<3) /* CS* negate timing for 360 */
-#define M360_MEMC_BR_PAREN (1<<2) /* Enable parity checking */
-#define M360_MEMC_BR_WP (1<<1) /* Write Protect */
-#define M360_MEMC_BR_V (1<<0) /* Base/Option register are valid */
-
-#define M360_MEMC_OR_TCYC(x) ((x)<<28) /* Cycle length (clocks) */
-#define M360_MEMC_OR_WAITS(x) M360_MEMC_OR_TCYC((x)+1)
-#define M360_MEMC_OR_2KB 0x0FFFF800 /* Address range */
-#define M360_MEMC_OR_4KB 0x0FFFF000
-#define M360_MEMC_OR_8KB 0x0FFFE000
-#define M360_MEMC_OR_16KB 0x0FFFC000
-#define M360_MEMC_OR_32KB 0x0FFF8000
-#define M360_MEMC_OR_64KB 0x0FFF0000
-#define M360_MEMC_OR_128KB 0x0FFE0000
-#define M360_MEMC_OR_256KB 0x0FFC0000
-#define M360_MEMC_OR_512KB 0x0FF80000
-#define M360_MEMC_OR_1MB 0x0FF00000
-#define M360_MEMC_OR_2MB 0x0FE00000
-#define M360_MEMC_OR_4MB 0x0FC00000
-#define M360_MEMC_OR_8MB 0x0F800000
-#define M360_MEMC_OR_16MB 0x0F000000
-#define M360_MEMC_OR_32MB 0x0E000000
-#define M360_MEMC_OR_64MB 0x0C000000
-#define M360_MEMC_OR_128MB 0x08000000
-#define M360_MEMC_OR_256MB 0x00000000
-#define M360_MEMC_OR_FCMC(x) ((x)<<7) /* Function code mask */
-#define M360_MEMC_OR_BCYC(x) ((x)<<5) /* Burst cycle length (clocks) */
-#define M360_MEMC_OR_PGME (1<<3) /* Page mode enable */
-#define M360_MEMC_OR_32BIT (0<<1) /* Port size */
-#define M360_MEMC_OR_16BIT (1<<1)
-#define M360_MEMC_OR_8BIT (2<<1)
-#define M360_MEMC_OR_DSACK (3<<1)
-#define M360_MEMC_OR_DRAM (1<<0) /* Dynamic RAM select */
-
-/*
- *************************************************************************
- * SI Mode Register (SIMODE) *
- *************************************************************************
- */
-#define M360_SI_SMC2_BITS 0xFFFF0000 /* All SMC2 bits */
-#define M360_SI_SMC2_TDM (1<<31) /* Multiplexed SMC2 */
-#define M360_SI_SMC2_BRG1 (0<<28) /* SMC2 clock souce */
-#define M360_SI_SMC2_BRG2 (1<<28)
-#define M360_SI_SMC2_BRG3 (2<<28)
-#define M360_SI_SMC2_BRG4 (3<<28)
-#define M360_SI_SMC2_CLK5 (0<<28)
-#define M360_SI_SMC2_CLK6 (1<<28)
-#define M360_SI_SMC2_CLK7 (2<<28)
-#define M360_SI_SMC2_CLK8 (3<<28)
-#define M360_SI_SMC1_BITS 0x0000FFFF /* All SMC1 bits */
-#define M360_SI_SMC1_TDM (1<<15) /* Multiplexed SMC1 */
-#define M360_SI_SMC1_BRG1 (0<<12) /* SMC1 clock souce */
-#define M360_SI_SMC1_BRG2 (1<<12)
-#define M360_SI_SMC1_BRG3 (2<<12)
-#define M360_SI_SMC1_BRG4 (3<<12)
-#define M360_SI_SMC1_CLK1 (0<<12)
-#define M360_SI_SMC1_CLK2 (1<<12)
-#define M360_SI_SMC1_CLK3 (2<<12)
-#define M360_SI_SMC1_CLK4 (3<<12)
-
-/*
- *************************************************************************
- * SDMA Configuration Register (SDMA) *
- *************************************************************************
- */
-#define M360_SDMA_FREEZE (2<<13) /* Freeze on next bus cycle */
-#define M360_SDMA_SISM_7 (7<<8) /* Normal interrupt service mask */
-#define M360_SDMA_SAID_4 (4<<4) /* Normal arbitration ID */
-#define M360_SDMA_INTE (1<<1) /* SBER interrupt enable */
-#define M360_SDMA_INTB (1<<0) /* SBKP interrupt enable */
-
-/*
- *************************************************************************
- * Baud (sic) Rate Generators *
- *************************************************************************
- */
-#define M360_BRG_RST (1<<17) /* Reset generator */
-#define M360_BRG_EN (1<<16) /* Enable generator */
-#define M360_BRG_EXTC_BRGCLK (0<<14) /* Source is BRGCLK */
-#define M360_BRG_EXTC_CLK2 (1<<14) /* Source is CLK2 pin */
-#define M360_BRG_EXTC_CLK6 (2<<14) /* Source is CLK6 pin */
-#define M360_BRG_ATB (1<<13) /* Autobaud */
-#define M360_BRG_115200 (13<<1) /* Assume 25 MHz clock */
-#define M360_BRG_57600 (26<<1)
-#define M360_BRG_38400 (40<<1)
-#define M360_BRG_19200 (80<<1)
-#define M360_BRG_9600 (162<<1)
-#define M360_BRG_4800 (324<<1)
-#define M360_BRG_2400 (650<<1)
-#define M360_BRG_1200 (1301<<1)
-#define M360_BRG_600 (2603<<1)
-#define M360_BRG_300 ((324<<1) | 1)
-#define M360_BRG_150 ((650<<1) | 1)
-#define M360_BRG_75 ((1301<<1) | 1)
-
-/*
- *************************************************************************
- * sccm Bit Settings *
- *************************************************************************
- */
-#define M360_SCCE_TX 0x02
-#define M360_SCCE_RX 0x01
-
-#define M360_CR_INIT_TX_RX_PARAMS 0x0000
-#define M360_CR_CH_NUM 0x0040
-
-#define M360_NUM_DPRAM_REAGONS 4
-/*
- *************************************************************************
- * MC68360 DUAL-PORT RAM AND REGISTERS *
- *************************************************************************
- */
-typedef struct m360_ {
- /*
- * Dual-port RAM
- */
- volatile uint8_t dpram0[0x400]; /* Microcode program */
- volatile uint8_t dpram1[0x200];
- volatile uint8_t dpram2[0x100]; /* Microcode scratch */
- volatile uint8_t dpram3[0x100]; /* Not on REV A or B masks */
- volatile uint8_t _rsv0[0xC00-0x800];
- volatile m360SCCENparms_t scc1p;
- volatile uint8_t _rsv1[0xCB0-0xC00-sizeof(m360SCCENparms_t)];
- volatile m360MiscParms_t miscp;
- volatile uint8_t _rsv2[0xD00-0xCB0-sizeof(m360MiscParms_t)];
- volatile m360SCCparms_t scc2p;
- volatile uint8_t _rsv3[0xD80-0xD00-sizeof(m360SCCparms_t)];
- volatile m360SPIparms_t spip;
- volatile uint8_t _rsv4[0xDB0-0xD80-sizeof(m360SPIparms_t)];
- volatile m360TimerParms_t tmp;
- volatile uint8_t _rsv5[0xE00-0xDB0-sizeof(m360TimerParms_t)];
- volatile m360SCCparms_t scc3p;
- volatile uint8_t _rsv6[0xE70-0xE00-sizeof(m360SCCparms_t)];
- volatile m360IDMAparms_t idma1p;
- volatile uint8_t _rsv7[0xE80-0xE70-sizeof(m360IDMAparms_t)];
- volatile m360SMCparms_t smc1p;
- volatile uint8_t _rsv8[0xF00-0xE80-sizeof(m360SMCparms_t)];
- volatile m360SCCparms_t scc4p;
- volatile uint8_t _rsv9[0xF70-0xF00-sizeof(m360SCCparms_t)];
- volatile m360IDMAparms_t idma2p;
- volatile uint8_t _rsv10[0xF80-0xF70-sizeof(m360IDMAparms_t)];
- volatile m360SMCparms_t smc2p;
- volatile uint8_t _rsv11[0x1000-0xF80-sizeof(m360SMCparms_t)];
-
- /*
- * SIM Block
- */
- volatile uint32_t mcr;
- volatile uint32_t _pad00;
- volatile uint8_t avr;
- volatile uint8_t rsr;
- volatile uint16_t _pad01;
- volatile uint8_t clkocr;
- volatile uint8_t _pad02;
- volatile uint16_t _pad03;
- volatile uint16_t pllcr;
- volatile uint16_t _pad04;
- volatile uint16_t cdvcr;
- volatile uint16_t pepar;
- volatile uint32_t _pad05[2];
- volatile uint16_t _pad06;
- volatile uint8_t sypcr;
- volatile uint8_t swiv;
- volatile uint16_t _pad07;
- volatile uint16_t picr;
- volatile uint16_t _pad08;
- volatile uint16_t pitr;
- volatile uint16_t _pad09;
- volatile uint8_t _pad10;
- volatile uint8_t swsr;
- volatile uint32_t bkar;
- volatile uint32_t bcar;
- volatile uint32_t _pad11[2];
-
- /*
- * MEMC Block
- */
- volatile uint32_t gmr;
- volatile uint16_t mstat;
- volatile uint16_t _pad12;
- volatile uint32_t _pad13[2];
- volatile m360MEMCRegisters_t memc[8];
- volatile uint8_t _pad14[0xF0-0xD0];
- volatile uint8_t _pad15[0x100-0xF0];
- volatile uint8_t _pad16[0x500-0x100];
-
- /*
- * IDMA1 Block
- */
- volatile uint16_t iccr;
- volatile uint16_t _pad17;
- volatile uint16_t cmr1;
- volatile uint16_t _pad18;
- volatile uint32_t sapr1;
- volatile uint32_t dapr1;
- volatile uint32_t bcr1;
- volatile uint8_t fcr1;
- volatile uint8_t _pad19;
- volatile uint8_t cmar1;
- volatile uint8_t _pad20;
- volatile uint8_t csr1;
- volatile uint8_t _pad21;
- volatile uint16_t _pad22;
-
- /*
- * SDMA Block
- */
- volatile uint8_t sdsr;
- volatile uint8_t _pad23;
- volatile uint16_t sdcr;
- volatile uint32_t sdar;
-
- /*
- * IDMA2 Block
- */
- volatile uint16_t _pad24;
- volatile uint16_t cmr2;
- volatile uint32_t sapr2;
- volatile uint32_t dapr2;
- volatile uint32_t bcr2;
- volatile uint8_t fcr2;
- volatile uint8_t _pad26;
- volatile uint8_t cmar2;
- volatile uint8_t _pad27;
- volatile uint8_t csr2;
- volatile uint8_t _pad28;
- volatile uint16_t _pad29;
- volatile uint32_t _pad30;
-
- /*
- * CPIC Block
- */
- volatile uint32_t cicr;
- volatile uint32_t cipr;
- volatile uint32_t cimr;
- volatile uint32_t cisr;
-
- /*
- * Parallel I/O Block
- */
- volatile uint16_t padir;
- volatile uint16_t papar;
- volatile uint16_t paodr;
- volatile uint16_t padat;
- volatile uint32_t _pad31[2];
- volatile uint16_t pcdir;
- volatile uint16_t pcpar;
- volatile uint16_t pcso;
- volatile uint16_t pcdat;
- volatile uint16_t pcint;
- volatile uint16_t _pad32;
- volatile uint32_t _pad33[5];
-
- /*
- * TIMER Block
- */
- volatile uint16_t tgcr;
- volatile uint16_t _pad34;
- volatile uint32_t _pad35[3];
- volatile uint16_t tmr1;
- volatile uint16_t tmr2;
- volatile uint16_t trr1;
- volatile uint16_t trr2;
- volatile uint16_t tcr1;
- volatile uint16_t tcr2;
- volatile uint16_t tcn1;
- volatile uint16_t tcn2;
- volatile uint16_t tmr3;
- volatile uint16_t tmr4;
- volatile uint16_t trr3;
- volatile uint16_t trr4;
- volatile uint16_t tcr3;
- volatile uint16_t tcr4;
- volatile uint16_t tcn3;
- volatile uint16_t tcn4;
- volatile uint16_t ter1;
- volatile uint16_t ter2;
- volatile uint16_t ter3;
- volatile uint16_t ter4;
- volatile uint32_t _pad36[2];
-
- /*
- * CP Block
- */
- volatile uint16_t cr;
- volatile uint16_t _pad37;
- volatile uint16_t rccr;
- volatile uint16_t _pad38;
- volatile uint32_t _pad39[3];
- volatile uint16_t _pad40;
- volatile uint16_t rter;
- volatile uint16_t _pad41;
- volatile uint16_t rtmr;
- volatile uint32_t _pad42[5];
-
- /*
- * BRG Block
- */
- volatile uint32_t brgc1;
- volatile uint32_t brgc2;
- volatile uint32_t brgc3;
- volatile uint32_t brgc4;
-
- /*
- * SCC Block
- */
- volatile m360SCCRegisters_t scc1;
- volatile m360SCCRegisters_t scc2;
- volatile m360SCCRegisters_t scc3;
- volatile m360SCCRegisters_t scc4;
-
- /*
- * SMC Block
- */
- volatile m360SMCRegisters_t smc1;
- volatile m360SMCRegisters_t smc2;
-
- /*
- * SPI Block
- */
- volatile uint16_t spmode;
- volatile uint16_t _pad43[2];
- volatile uint8_t spie;
- volatile uint8_t _pad44;
- volatile uint16_t _pad45;
- volatile uint8_t spim;
- volatile uint8_t _pad46[2];
- volatile uint8_t spcom;
- volatile uint16_t _pad47[2];
-
- /*
- * PIP Block
- */
- volatile uint16_t pipc;
- volatile uint16_t _pad48;
- volatile uint16_t ptpr;
- volatile uint32_t pbdir;
- volatile uint32_t pbpar;
- volatile uint16_t _pad49;
- volatile uint16_t pbodr;
- volatile uint32_t pbdat;
- volatile uint32_t _pad50[6];
-
- /*
- * SI Block
- */
- volatile uint32_t simode;
- volatile uint8_t sigmr;
- volatile uint8_t _pad51;
- volatile uint8_t sistr;
- volatile uint8_t sicmr;
- volatile uint32_t _pad52;
- volatile uint32_t sicr;
- volatile uint16_t _pad53;
- volatile uint16_t sirp[2];
- volatile uint16_t _pad54;
- volatile uint32_t _pad55[2];
- volatile uint8_t siram[256];
-} m360_t;
-
-struct bdregions_t {
- volatile unsigned char *base;
- unsigned int size;
- unsigned int used;
-};
-
-#define M68360_RX_BUF_SIZE 1
-#define M68360_TX_BUF_SIZE 0x100
-
-struct _m68360_per_chip;
-typedef struct _m68360_per_chip *M68360_t;
-
-typedef struct _m68360_per_port {
- uint32_t channel;
- M68360_t chip;
- volatile uint32_t *pBRGC; /* m360->brgc# */
- volatile m360SCCparms_t *pSCCB; /* m360->scc#p */
- volatile m360SCCRegisters_t *pSCCR; /* m360->scc# */
- uint32_t baud;
- int minor;
- volatile uint8_t *rxBuf;
- volatile uint8_t *txBuf;
- volatile m360BufferDescriptor_t *sccRxBd;
- volatile m360BufferDescriptor_t *sccTxBd;
-}m68360_per_port_t, *M68360_serial_ports_t;
-
-typedef struct _m68360_per_chip {
- struct _m68360_per_chip *next;
- struct bdregions_t bdregions[4];
- volatile m360_t *m360; /* Pointer to base Address */
- int m360_interrupt;
- int m360_clock_rate;
- PPMCQ1BoardData board_data;
- m68360_per_port_t port[4];
-} m68360_per_chip_t;
-
-extern M68360_t M68360_chips;
-
-void M360SetupMemory( M68360_t ptr );
-void *M360AllocateBufferDescriptors (M68360_t ptr, int count);
-void M360ExecuteRISC( volatile m360_t *m360, uint16_t command);
-int mc68360_scc_create_chip( PPMCQ1BoardData BoardData, uint8_t int_vector );
-
-#endif /* __MC68360_h */
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/mc68360_scc.c b/c/src/lib/libbsp/powerpc/ep1a/console/mc68360_scc.c
deleted file mode 100644
index b2dab2ba17..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/console/mc68360_scc.c
+++ /dev/null
@@ -1,904 +0,0 @@
-/* This file contains the termios TTY driver for the
- * Motorola MC68360 SCC ports.
- */
-
-/*
- * COPYRIGHT (c) 1989-2008.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <stdio.h>
-#include <termios.h>
-#include <bsp.h>
-#include <libcpu/io.h>
-#include <rtems/libio.h>
-#include <bsp/pci.h>
-#include <bsp/irq.h>
-#include <libchip/serial.h>
-#include "m68360.h"
-#include <libchip/sersupp.h>
-#include <stdlib.h>
-#include <rtems/bspIo.h>
-#include <string.h>
-
-/* #define DEBUG_360 */
-
-#if 1 /* XXX */
-int EP1A_READ_LENGTH_GREATER_THAN_1 = 0;
-
-#define MC68360_LENGTH_SIZE 400
-int mc68360_length_array[ MC68360_LENGTH_SIZE ];
-int mc68360_length_count=0;
-#endif
-
-
-M68360_t M68360_chips = NULL;
-
-#define SYNC eieio
-#define mc68360_scc_Is_422( _minor ) \
- (Console_Port_Tbl[minor]->sDeviceName[7] == '4' )
-
-static void scc_write8(
- const char *name,
- volatile uint8_t *address,
- uint8_t value
-)
-{
-#ifdef DEBUG_360
- printk( "WR8 %s 0x%08x 0x%02x\n", name, address, value );
-#endif
- *address = value;
-}
-
-static uint16_t scc_read16(
- const char *name,
- volatile uint16_t *address
-)
-{
- uint16_t value;
-
-#ifdef DEBUG_360
- printk( "RD16 %s 0x%08x ", name, address );
-#endif
- value = *address;
-#ifdef DEBUG_360
- printk( "0x%04x\n", value );
-#endif
-
- return value;
-}
-
-static void scc_write16(
- const char *name,
- volatile uint16_t *address,
- uint16_t value
-)
-{
-#ifdef DEBUG_360
- printk( "WR16 %s 0x%08x 0x%04x\n", name, address, value );
-#endif
- *address = value;
-}
-
-static uint32_t scc_read32(
- const char *name,
- volatile uint32_t *address
-)
-{
- uint32_t value;
-
-#ifdef DEBUG_360
- printk( "RD32 %s 0x%08x ", name, address );
-#endif
- value = *address;
-#ifdef DEBUG_360
- printk( "0x%08x\n", value );
-#endif
-
- return value;
-}
-
-static void scc_write32(
- const char *name,
- volatile uint32_t *address,
- uint32_t value
-)
-{
-#ifdef DEBUG_360
- printk( "WR32 %s 0x%08x 0x%08x\n", name, address, value );
-#endif
- *address = value;
-}
-
-#define TX_BUFFER_ADDRESS( _ptr ) \
- ((char *)ptr->txBuf - (char *)ptr->chip->board_data->baseaddr)
-#define RX_BUFFER_ADDRESS( _ptr ) \
- ((char *)ptr->rxBuf - (char *)ptr->chip->board_data->baseaddr)
-
-
-/**************************************************************************
- * Function: mc68360_sccBRGC *
- **************************************************************************
- * Description: *
- * *
- * This function is called to compute the divisor register values for *
- * a given baud rate. *
- * *
- * *
- * Inputs: *
- * *
- * int baud - Baud rate (in bps). *
- * *
- * Output: *
- * *
- * int - baud rate generator configuration. *
- * *
- **************************************************************************/
-static int
-mc68360_sccBRGC(int baud, int m360_clock_rate)
-{
- int data;
-
- /*
- * configure baud rate generator for 16x bit rate, where.....
- * b = desired baud rate
- * clk = system clock (33mhz)
- * d = clock dividor value
- *
- * for b > 300 : d = clk/(b*16)
- * for b<= 300 : d = (clk/ (b*16*16))-1)
- */
-
- SYNC();
- if( baud > 300 ) data = 33333333 / (baud * 16 );
- else data = (33333333 / (baud * 16 * 16) ) - 1;
- data *= 2;
- data &= 0x00001ffe ;
-
- /* really data = 0x010000 | data | ((baud>300)? 0 : 1 ) ; */
- data |= ((baud>300)? 0 : 1 ) ;
- data |= 0x010000 ;
-
- return data;
-}
-
-
-/*
- * sccInterruptHandler
- *
- * This is the interrupt service routine for the console UART. It
- * handles both receive and transmit interrupts. The bulk of the
- * work is done by termios.
- *
- */
-static void mc68360_sccInterruptHandler( M68360_t chip )
-{
- volatile m360_t *m360;
- int port;
- uint16_t status;
- uint16_t length;
- int i;
- char data;
- int clear_isr;
-
-
-#ifdef DEBUG_360
- printk("mc68360_sccInterruptHandler\n");
-#endif
- for (port=0; port<4; port++) {
-
- clear_isr = FALSE;
- m360 = chip->m360;
-
- /*
- * XXX - Can we add something here to check if this is our interrupt.
- * XXX - We need a parameter here so that we know which 360 instead of
- * looping through them all!
- */
-
- /*
- * Handle a RX interrupt.
- */
- if ( scc_read16("scce", &chip->port[port].pSCCR->scce) & 0x1)
- {
- clear_isr = TRUE;
- scc_write16("scce", &chip->port[port].pSCCR->scce, 0x1 );
- status =scc_read16( "sccRxBd->status", &chip->port[port].sccRxBd->status);
- while ((status & M360_BD_EMPTY) == 0)
- {
- length= scc_read16("sccRxBd->length",&chip->port[port].sccRxBd->length);
-if (length > 1)
- EP1A_READ_LENGTH_GREATER_THAN_1 = length;
-
- for (i=0;i<length;i++) {
- data= chip->port[port].rxBuf[i];
- rtems_termios_enqueue_raw_characters(
- Console_Port_Data[ chip->port[port].minor ].termios_data,
- &data,
- 1);
- }
- scc_write16( "sccRxBd->status", &chip->port[port].sccRxBd->status,
- M360_BD_EMPTY | M360_BD_WRAP | M360_BD_INTERRUPT );
- status =scc_read16( "sccRxBd->status", &chip->port[port].sccRxBd->status);
- }
- }
-
- /*
- * Handle a TX interrupt.
- */
- if (scc_read16("scce", &chip->port[port].pSCCR->scce) & 0x2)
- {
- clear_isr = TRUE;
- scc_write16("scce", &chip->port[port].pSCCR->scce, 0x2);
- status = scc_read16("sccTxBd->status", &chip->port[port].sccTxBd->status);
- if ((status & M360_BD_EMPTY) == 0)
- {
- scc_write16("sccTxBd->status",&chip->port[port].sccTxBd->status,0);
-#if 1
- rtems_termios_dequeue_characters(
- Console_Port_Data[chip->port[port].minor].termios_data,
- chip->port[port].sccTxBd->length);
-#else
- mc68360_scc_write_support_int(chip->port[port].minor,"*****", 5);
-#endif
- }
- }
-
- /*
- * Clear SCC interrupt-in-service bit.
- */
- if ( clear_isr )
- scc_write32( "cisr", &m360->cisr, (0x80000000 >> chip->port[port].channel) );
- }
-}
-
-/*
- * mc68360_scc_open
- *
- * This function opens a port for communication.
- *
- * Default state is 9600 baud, 8 bits, No parity, and 1 stop bit.
- */
-static int mc68360_scc_open(
- int major,
- int minor,
- void * arg
-)
-{
- M68360_serial_ports_t ptr;
- uint32_t data;
-
-#ifdef DEBUG_360
- printk("mc68360_scc_open %d\n", minor);
-#endif
-
- ptr = Console_Port_Tbl[minor]->pDeviceParams;
-
- /*
- * Enable the receiver and the transmitter.
- */
- SYNC();
- data = scc_read32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l);
- scc_write32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l,
- (data | M360_GSMR_ENR | M360_GSMR_ENT) );
-
- data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_MASK );
- data &= (~PMCQ1_INT_MASK_QUICC);
- PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_MASK, data );
-
- data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_STATUS );
- data &= (~PMCQ1_INT_STATUS_QUICC);
- PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_STATUS, data );
-
- return RTEMS_SUCCESSFUL;
-}
-
-static uint32_t mc68360_scc_calculate_pbdat( M68360_t chip )
-{
- uint32_t i;
- uint32_t pbdat_data;
- int minor;
- uint32_t type422data[4] = {
- 0x00440, 0x00880, 0x10100, 0x20200
- };
-
- pbdat_data = 0x3;
- for (i=0; i<4; i++) {
- minor = chip->port[i].minor;
- if mc68360_scc_Is_422( minor )
- pbdat_data |= type422data[i];
- }
-
- return pbdat_data;
-}
-
-/*
- * mc68360_scc_initialize_interrupts
- *
- * This routine initializes the console's receive and transmit
- * ring buffers and loads the appropriate vectors to handle the interrupts.
- */
-static void mc68360_scc_initialize_interrupts(int minor)
-{
- M68360_serial_ports_t ptr;
- volatile m360_t *m360;
- uint32_t data;
- uint32_t buffers_start;
- uint32_t tmp_u32;
-
-#ifdef DEBUG_360
- printk("mc68360_scc_initialize_interrupts: minor %d\n", minor );
- printk("Console_Port_Tbl[minor]->pDeviceParams 0x%08x\n",
- Console_Port_Tbl[minor]->pDeviceParams );
-#endif
-
- ptr = Console_Port_Tbl[minor]->pDeviceParams;
- m360 = ptr->chip->m360;
-
-#ifdef DEBUG_360
- printk("m360 0x%08x baseaddr 0x%08x\n",
- m360, ptr->chip->board_data->baseaddr);
-#endif
-
- buffers_start = ptr->chip->board_data->baseaddr + 0x00200000 +
- ( (M68360_RX_BUF_SIZE + M68360_TX_BUF_SIZE) * (ptr->channel-1));
- ptr->rxBuf = (uint8_t *) buffers_start;
- ptr->txBuf = (uint8_t *)(buffers_start + M68360_RX_BUF_SIZE);
-#ifdef DEBUG_360
- printk("rxBuf 0x%08x txBuf 0x%08x\n", ptr->rxBuf, ptr->txBuf );
-#endif
- /*
- * Set Channel Drive Enable bits in EPLD
- */
- data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_DRIVER_ENABLE );
- SYNC();
- data = data & ~(PMCQ1_DRIVER_ENABLE_3 | PMCQ1_DRIVER_ENABLE_2 |
- PMCQ1_DRIVER_ENABLE_1 | PMCQ1_DRIVER_ENABLE_0);
- PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_DRIVER_ENABLE, data);
- data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_DRIVER_ENABLE );
- SYNC();
-
- /*
- * Disable the receiver and the transmitter.
- */
-
- SYNC();
- tmp_u32 = scc_read32( "gsmr_l", &ptr->pSCCR->gsmr_l );
- tmp_u32 &= (~(M360_GSMR_ENR | M360_GSMR_ENT ) ) ;
- scc_write32( "gsmr_l", &ptr->pSCCR->gsmr_l, tmp_u32 );
-
- /*
- * Disable Interrupt Error and Interrupt Breakpoint
- * Set SAID to 4 XXX - Shouldn't it be 7 for slave mode
- * Set SAISM to 7
- */
- SYNC();
- scc_write16( "sdcr", &m360->sdcr, 0x0740 );
-
- /*
- * Clear status -- reserved interrupt, SDMA channel error, SDMA breakpoint
- */
- scc_write8( "sdsr", &m360->sdsr, 0x07 );
- SYNC();
-
- /*
- * Initialize timer information in RISC Controller Configuration Register
- */
- scc_write16( "rccr", &m360->rccr, 0x8100 );
- SYNC();
-
- /*
- * XXX
- */
- scc_write16( "papar", &m360->papar, 0xffff );
- scc_write16( "padir", &m360->padir, 0x5500 ); /* From Memo */
- scc_write16( "paodr", &m360->paodr, 0x0000 );
- SYNC();
-
- /*
- * XXX
- */
-
-#if 0
- scc_write32( "pbpar", &m360->pbpar, 0x00000000 );
- scc_write32( "pbdir", &m360->pbdir, 0x0003ffff );
- scc_write32( "pbdat", &m360->pbdat, 0x0000003f );
- SYNC();
-#else
- data = mc68360_scc_calculate_pbdat( ptr->chip );
- scc_write32( "pbpar", &m360->pbpar, 0x00000000 );
- scc_write32( "pbdat", &m360->pbdat, data );
- SYNC();
- scc_write32( "pbdir", &m360->pbdir, 0x0003fc3 );
- SYNC();
-#endif
-
-
- /*
- * XXX
- */
- scc_write16( "pcpar", &m360->pcpar, 0x0000 );
- scc_write16( "pcdir", &m360->pcdir, 0x0000 );
- scc_write16( "pcso", &m360->pcso, 0x0000 );
- SYNC();
-
- /*
- * configure baud rate generator for 16x bit rate, where.....
- * b = desired baud rate
- * clk = system clock (33mhz)
- * d = clock dividor value
- *
- * for b > 300 : d = clk/(b*16)
- * for b<= 300 : d = (clk/ (b*16*16))-1)
- */
- SYNC();
- if( ptr->baud > 300 ) data = 33333333 / (ptr->baud * 16 );
- else data = (33333333 / (ptr->baud * 16 * 16) ) - 1;
- data *= 2 ;
- data &= 0x00001ffe ;
-
- /* really data = 0x010000 | data | ((baud>300)? 0 : 1 ) ; */
- data |= ((ptr->baud>300)? 0 : 1 ) ;
- data |= 0x010000 ;
-
- scc_write32( "pBRGC", ptr->pBRGC, data );
-
- data = (((ptr->channel-1)*8) | (ptr->channel-1)) ;
- data = data << ((ptr->channel-1)*8) ;
- data |= scc_read32( "sicr", &m360->sicr );
- scc_write32( "sicr", &m360->sicr, data );
-
- /*
- * initialise SCC parameter ram
- */
- SYNC();
- scc_write16( "pSCCB->rbase", &ptr->pSCCB->rbase,
- (char *)(ptr->sccRxBd) - (char *)m360 );
- scc_write16( "pSCCB->tbase", &ptr->pSCCB->tbase,
- (char *)(ptr->sccTxBd) - (char *)m360 );
-
- scc_write8( "pSCCB->rfcr", &ptr->pSCCB->rfcr, 0x15 ); /* 0x15 0x18 */
- scc_write8( "pSCCB->tfcr", &ptr->pSCCB->tfcr, 0x15 ); /* 0x15 0x18 */
-
- scc_write16( "pSCCB->mrblr", &ptr->pSCCB->mrblr, M68360_RX_BUF_SIZE );
-
- /*
- * initialise tx and rx scc parameters
- */
- SYNC();
- data = M360_CR_INIT_TX_RX_PARAMS | 0x01;
- data |= (M360_CR_CH_NUM * (ptr->channel-1) );
- scc_write16( "CR", &m360->cr, data );
-
- /*
- * initialise uart specific parameter RAM
- */
- SYNC();
- scc_write16( "pSCCB->un.uart.max_idl", &ptr->pSCCB->un.uart.max_idl, 15000 );
- scc_write16( "pSCCB->un.uart.brkcr", &ptr->pSCCB->un.uart.brkcr, 0x0001 );
- scc_write16( "pSCCB->un.uart.parec", &ptr->pSCCB->un.uart.parec, 0x0000 );
-
- scc_write16( "pSCCB->un,uart.frmec", &ptr->pSCCB->un.uart.frmec, 0x0000 );
-
- scc_write16( "pSCCB->un.uart.nosec", &ptr->pSCCB->un.uart.nosec, 0x0000 );
- scc_write16( "pSCCB->un.uart.brkec", &ptr->pSCCB->un.uart.brkec, 0x0000 );
- scc_write16( "pSCCB->un.uart.uaddr0", &ptr->pSCCB->un.uart.uaddr[0], 0x0000 );
- scc_write16( "pSCCB->un.uart.uaddr1", &ptr->pSCCB->un.uart.uaddr[1], 0x0000 );
- scc_write16( "pSCCB->un.uart.toseq", &ptr->pSCCB->un.uart.toseq, 0x0000 );
- scc_write16( "pSCCB->un.uart.char0",
- &ptr->pSCCB->un.uart.character[0], 0x0039 );
- scc_write16( "pSCCB->un.uart.char1",
- &ptr->pSCCB->un.uart.character[1], 0x8000 );
- scc_write16( "pSCCB->un.uart.char2",
- &ptr->pSCCB->un.uart.character[2], 0x8000 );
- scc_write16( "pSCCB->un.uart.char3",
- &ptr->pSCCB->un.uart.character[3], 0x8000 );
- scc_write16( "pSCCB->un.uart.char4",
- &ptr->pSCCB->un.uart.character[4], 0x8000 );
- scc_write16( "pSCCB->un.uart.char5",
- &ptr->pSCCB->un.uart.character[5], 0x8000 );
- scc_write16( "pSCCB->un.uart.char6",
- &ptr->pSCCB->un.uart.character[6], 0x8000 );
- scc_write16( "pSCCB->un.uart.char7",
- &ptr->pSCCB->un.uart.character[7], 0x8000 );
-
- scc_write16( "pSCCB->un.uart.rccm", &ptr->pSCCB->un.uart.rccm, 0xc0ff );
-
- /*
- * setup buffer descriptor stuff
- */
- SYNC();
- scc_write16( "sccRxBd->status", &ptr->sccRxBd->status, 0x0000 );
- SYNC();
- scc_write16( "sccRxBd->length", &ptr->sccRxBd->length, 0x0000 );
- scc_write16( "sccRxBd->status", &ptr->sccRxBd->status,
- M360_BD_EMPTY | M360_BD_WRAP | M360_BD_INTERRUPT );
- /* XXX Radstone Example writes RX buffer ptr as two u16's */
- scc_write32( "sccRxBd->buffer", &ptr->sccRxBd->buffer,
- RX_BUFFER_ADDRESS( ptr ) );
-
- SYNC();
- scc_write16( "sccTxBd->status", &ptr->sccTxBd->status, 0x0000 );
- SYNC();
- scc_write16( "sccTxBd->length", &ptr->sccTxBd->length, 0x0000 );
- /* XXX Radstone Example writes TX buffer ptr as two u16's */
- scc_write32( "sccTxBd->buffer", &ptr->sccTxBd->buffer,
- TX_BUFFER_ADDRESS( ptr ) );
-
- /*
- * clear previous events and set interrupt priorities
- */
- scc_write16( "pSCCR->scce", &ptr->pSCCR->scce, 0x1bef ); /* From memo */
- SYNC();
- SYNC();
- scc_write32( "cicr", &m360->cicr, 0x001b9f40 );
- SYNC();
-
- /* scc_write32( "cicr", &m360->cicr, scc_read32( "cicr", &m360->cicr ) ); */
-
- scc_write16( "pSCCR->sccm", &ptr->pSCCR->sccm, M360_SCCE_TX | M360_SCCE_RX );
-
- data = scc_read32("cimr", &m360->cimr);
- data |= (0x80000000 >> ptr->channel);
- scc_write32( "cimr", &m360->cimr, data );
- SYNC();
- scc_write32( "cipr", &m360->cipr, scc_read32( "cipr", &m360->cipr ) );
-
- scc_write32( "pSCCR->gsmr_h", &ptr->pSCCR->gsmr_h, M360_GSMR_RFW );
- scc_write32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l,
- (M360_GSMR_TDCR_16X | M360_GSMR_RDCR_16X | M360_GSMR_MODE_UART) );
-
- scc_write16( "pSCCR->dsr", &ptr->pSCCR->dsr, 0x7e7e );
- SYNC();
-
- scc_write16( "pSCCR->psmr", &ptr->pSCCR->psmr,
- (M360_PSMR_CL8 | M360_PSMR_UM_NORMAL | M360_PSMR_TPM_ODD) );
- SYNC();
-
-#if 0 /* XXX - ??? */
- /*
- * Enable the receiver and the transmitter.
- */
-
- SYNC();
- data = scc_read32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l);
- scc_write32( "pSCCR->gsmr_l", &ptr->pSCCR->gsmr_l,
- (data | M360_GSMR_ENR | M360_GSMR_ENT) );
-
- data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_MASK );
- data &= (~PMCQ1_INT_MASK_QUICC);
- PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_MASK, data );
-
- data = PMCQ1_Read_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_STATUS );
- data &= (~PMCQ1_INT_STATUS_QUICC);
- PMCQ1_Write_EPLD(ptr->chip->board_data->baseaddr, PMCQ1_INT_STATUS, data );
-#endif
-}
-
-/*
- * mc68360_scc_write_support_int
- *
- * Console Termios output entry point when using interrupt driven output.
- */
-static ssize_t mc68360_scc_write_support_int(
- int minor,
- const char *buf,
- size_t len
-)
-{
- rtems_interrupt_level Irql;
- M68360_serial_ports_t ptr;
-
-#if 1
- mc68360_length_array[ mc68360_length_count ] = len;
- mc68360_length_count++;
- if ( mc68360_length_count >= MC68360_LENGTH_SIZE )
- mc68360_length_count=0;
-#endif
-
- ptr = Console_Port_Tbl[minor]->pDeviceParams;
-
- /*
- * We are using interrupt driven output and termios only sends us
- * one character at a time.
- */
-
- if ( !len )
- return 0;
-
- /*
- *
- */
-#ifdef DEBUG_360
- printk("mc68360_scc_write_support_int: char 0x%x length %d\n",
- (unsigned int)*buf, len );
-#endif
- /*
- * We must copy the data from the global memory space to MC68360 space
- */
-
- rtems_interrupt_disable(Irql);
-
- scc_write16( "sccTxBd->status", &ptr->sccTxBd->status, 0 );
- memcpy((void *) ptr->txBuf, buf, len);
- scc_write32( "sccTxBd->buffer", &ptr->sccTxBd->buffer,
- TX_BUFFER_ADDRESS(ptr->txBuf) );
- scc_write16( "sccTxBd->length", &ptr->sccTxBd->length, len );
- scc_write16( "sccTxBd->status", &ptr->sccTxBd->status,
- (M360_BD_READY | M360_BD_WRAP | M360_BD_INTERRUPT) );
-
- rtems_interrupt_enable(Irql);
-
- return len;
-}
-
-/*
- * mc68360_scc_write_polled
- *
- * This routine polls out the requested character.
- */
-static void mc68360_scc_write_polled(
- int minor,
- char cChar
-)
-{
-#ifdef DEBUG_360
- printk("mc68360_scc_write_polled: %c\n", cChar);
-#endif
-}
-
-/*
- * mc68681_set_attributes
- *
- * This function sets the DUART channel to reflect the requested termios
- * port settings.
- */
-static int mc68360_scc_set_attributes(
- int minor,
- const struct termios *t
-)
-{
- int baud;
- M68360_serial_ports_t ptr;
- uint16_t value;
-
-#ifdef DEBUG_360
-printk("mc68360_scc_set_attributes\n");
-#endif
-
- ptr = Console_Port_Tbl[minor]->pDeviceParams;
-
- switch (t->c_cflag & CBAUD) {
- case B50: baud = 50; break;
- case B75: baud = 75; break;
- case B110: baud = 110; break;
- case B134: baud = 134; break;
- case B150: baud = 150; break;
- case B200: baud = 200; break;
- case B300: baud = 300; break;
- case B600: baud = 600; break;
- case B1200: baud = 1200; break;
- case B1800: baud = 1800; break;
- case B2400: baud = 2400; break;
- case B4800: baud = 4800; break;
- case B9600: baud = 9600; break;
- case B19200: baud = 19200; break;
- case B38400: baud = 38400; break;
- case B57600: baud = 57600; break;
- case B115200: baud = 115200; break;
- case B230400: baud = 230400; break;
- case B460800: baud = 460800; break;
- default: baud = -1; break;
- }
-
- if (baud > 0) {
- scc_write32(
- "pBRGC",
- ptr->pBRGC,
- mc68360_sccBRGC(baud, ptr->chip->m360_clock_rate)
- );
- }
-
- /* Initial value of PSMR should be 0 */
- value = M360_PSMR_UM_NORMAL;
-
- /* set the number of data bits, 8 is most common */
- if (t->c_cflag & CSIZE) { /* was it specified? */
- switch (t->c_cflag & CSIZE) {
- case CS5: value |= M360_PSMR_CL5; break;
- case CS6: value |= M360_PSMR_CL6; break;
- case CS7: value |= M360_PSMR_CL7; break;
- case CS8: value |= M360_PSMR_CL8; break;
- }
- } else {
- value |= M360_PSMR_CL8; /* default to 8 data bits */
- }
-
- /* the number of stop bits */
- if (t->c_cflag & CSTOPB)
- value |= M360_PSMR_SL_2; /* Two stop bits */
- else
- value |= M360_PSMR_SL_1; /* One stop bit */
-
- /* Set Parity M360_PSMR_PEN bit should be clear on no parity so
- * do nothing in that case
- */
- if (t->c_cflag & PARENB) { /* enable parity detection? */
- value |= M360_PSMR_PEN;
- if (t->c_cflag & PARODD){
- value |= M360_PSMR_RPM_ODD; /* select odd parity */
- value |= M360_PSMR_TPM_ODD;
- } else {
- value |= M360_PSMR_RPM_EVEN; /* select even parity */
- value |= M360_PSMR_TPM_EVEN;
- }
- }
-
- SYNC();
- scc_write16( "pSCCR->psmr", &ptr->pSCCR->psmr, value );
- SYNC();
-
- return 0;
-}
-
-/*
- * mc68360_scc_close
- *
- * This function shuts down the requested port.
- */
-static int mc68360_scc_close(
- int major,
- int minor,
- void *arg
-)
-{
- return RTEMS_SUCCESSFUL;
-}
-
-/*
- * mc68360_scc_inbyte_nonblocking_polled
- *
- * Console Termios polling input entry point.
- */
-static int mc68360_scc_inbyte_nonblocking_polled(
- int minor
-)
-{
- return -1;
-}
-
-/*
- * mc68360_scc_write_support_polled
- *
- * Console Termios output entry point when using polled output.
- *
- */
-static ssize_t mc68360_scc_write_support_polled(
- int minor,
- const char *buf,
- size_t len
-)
-{
- printk("mc68360_scc_write_support_polled: minor %d char %c len %d\n",
- minor, buf, len );
- return len;
-}
-
-/*
- * mc68360_scc_init
- *
- * This function initializes the DUART to a quiecsent state.
- */
-static void mc68360_scc_init(int minor)
-{
-#ifdef DEBUG_360
- printk("mc68360_scc_init\n");
-#endif
-}
-
-int mc68360_scc_create_chip( PPMCQ1BoardData BoardData, uint8_t int_vector )
-{
- M68360_t chip;
- int i;
-
-#ifdef DEBUG_360
- printk("mc68360_scc_create_chip\n");
-#endif
-
- /*
- * Create console structure for this card
- * XXX - Note Does this need to be moved up to if a QUICC is fitted
- * section?
- */
- if ((chip = malloc(sizeof(struct _m68360_per_chip))) == NULL)
- {
- printk("Error Unable to allocate memory for _m68360_per_chip\n");
- return RTEMS_IO_ERROR;
- }
-
- chip->next = M68360_chips;
- chip->m360 = (void *)BoardData->baseaddr;
- chip->m360_interrupt = int_vector;
- chip->m360_clock_rate = 25000000;
- chip->board_data = BoardData;
- M68360_chips = chip;
-
- for (i=1; i<=4; i++) {
- chip->port[i-1].channel = i;
- chip->port[i-1].chip = chip;
- chip->port[i-1].baud = 9600;
-
- switch( i ) {
- case 1:
- chip->port[i-1].pBRGC = &chip->m360->brgc1;
- chip->port[i-1].pSCCB = (m360SCCparms_t *) &chip->m360->scc1p;
- chip->port[i-1].pSCCR = &chip->m360->scc1;
- M360SetupMemory( chip ); /* Do this first time through */
- break;
- case 2:
- chip->port[i-1].pBRGC = &chip->m360->brgc2;
- chip->port[i-1].pSCCB = &chip->m360->scc2p;
- chip->port[i-1].pSCCR = &chip->m360->scc2;
- break;
- case 3:
- chip->port[i-1].pBRGC = &chip->m360->brgc3;
- chip->port[i-1].pSCCB = &chip->m360->scc3p;
- chip->port[i-1].pSCCR = &chip->m360->scc3;
- break;
- case 4:
- chip->port[i-1].pBRGC = &chip->m360->brgc4;
- chip->port[i-1].pSCCB = &chip->m360->scc4p;
- chip->port[i-1].pSCCR = &chip->m360->scc4;
- break;
- default:
- printk("Invalid mc68360 channel %d\n", i);
- return RTEMS_IO_ERROR;
- }
-
- /*
- * Allocate buffer descriptors.
- */
-
- chip->port[i-1].sccRxBd = M360AllocateBufferDescriptors(chip, 1);
- chip->port[i-1].sccTxBd = M360AllocateBufferDescriptors(chip, 1);
- }
-
- rsPMCQ1QuiccIntConnect(
- chip->board_data->busNo,
- chip->board_data->slotNo,
- chip->board_data->funcNo,
- (FUNCTION_PTR) &mc68360_sccInterruptHandler,
- (uintptr_t) chip
- );
-
- return RTEMS_SUCCESSFUL;
-}
-
-const console_fns mc68360_scc_fns = {
- libchip_serial_default_probe, /* deviceProbe */
- mc68360_scc_open, /* deviceFirstOpen */
- NULL, /* deviceLastClose */
- NULL, /* deviceRead */
- mc68360_scc_write_support_int, /* deviceWrite */
- mc68360_scc_initialize_interrupts, /* deviceInitialize */
- mc68360_scc_write_polled, /* deviceWritePolled */
- mc68360_scc_set_attributes, /* deviceSetAttributes */
- TRUE /* deviceOutputUsesInterrupts */
-};
-
-const console_fns mc68360_scc_polled = {
- libchip_serial_default_probe, /* deviceProbe */
- mc68360_scc_open, /* deviceFirstOpen */
- mc68360_scc_close, /* deviceLastClose */
- mc68360_scc_inbyte_nonblocking_polled, /* deviceRead */
- mc68360_scc_write_support_polled, /* deviceWrite */
- mc68360_scc_init, /* deviceInitialize */
- mc68360_scc_write_polled, /* deviceWritePolled */
- mc68360_scc_set_attributes, /* deviceSetAttributes */
- FALSE /* deviceOutputUsesInterrupts */
-};
-
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/ns16550cfg.c b/c/src/lib/libbsp/powerpc/ep1a/console/ns16550cfg.c
deleted file mode 100644
index 12a423bfeb..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/console/ns16550cfg.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * This include file contains all console driver definitions for the ns16550.
- */
-
-/*
- * COPYRIGHT (c) 1989-2008.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <bsp.h>
-#include <libchip/serial.h>
-#include <libchip/ns16550.h>
-
-#include "ns16550cfg.h"
-
-typedef struct uart_reg
-{
- unsigned char reg;
- unsigned char pad[7];
-} uartReg;
-
-uint8_t Read_ns16550_register(
- uintptr_t ulCtrlPort,
- uint8_t ucRegNum
-)
-{
- volatile struct uart_reg *p = (volatile struct uart_reg *)ulCtrlPort;
- uint8_t ucData;
-
- ucData = p[ucRegNum].reg;
- __asm__ volatile("sync");
- return ucData;
-}
-
-void Write_ns16550_register(
- uintptr_t ulCtrlPort,
- uint8_t ucRegNum,
- uint8_t ucData
-)
-{
- volatile struct uart_reg *p = (volatile struct uart_reg *)ulCtrlPort;
- volatile int i;
- p[ucRegNum].reg = ucData;
- __asm__ volatile("sync");
- __asm__ volatile("isync");
- __asm__ volatile("eieio");
- for (i=0;i<0x08ff;i++)
- __asm__ volatile("isync");
-}
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/ns16550cfg.h b/c/src/lib/libbsp/powerpc/ep1a/console/ns16550cfg.h
deleted file mode 100644
index 45d520895a..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/console/ns16550cfg.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * This include file contains all console driver definitions for the ns16550.
- */
-
-/*
- * COPYRIGHT (c) 1989-2008.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef __NS16550_CONFIG_H
-#define __NS16550_CONFIG_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*
- * Board specific register access routines
- */
-
-uint8_t Read_ns16550_register(
- uintptr_t ulCtrlPort,
- uint8_t ucRegNum
-);
-
-void Write_ns16550_register(
- uintptr_t ulCtrlPort,
- uint8_t ucRegNum,
- uint8_t ucData
-);
-
-extern const console_fns ns16550_fns_8245;
-extern const console_fns ns16550_fns_polled_8245;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/polled_io.c b/c/src/lib/libbsp/powerpc/ep1a/console/polled_io.c
deleted file mode 100644
index e0ae919c2e..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/console/polled_io.c
+++ /dev/null
@@ -1,1026 +0,0 @@
-/*
- * polled_io.c -- Basic input/output for early boot
- *
- * Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
- *
- * Modified to compile in RTEMS development environment
- * by Eric Valette
- *
- * Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <rtems/system.h>
-#include <sys/types.h>
-#include <libcpu/byteorder.h>
-#include <libcpu/page.h>
-#include <libcpu/mmu.h>
-#include <libcpu/io.h>
-#include <string.h>
-#include <stdarg.h>
-#include <bsp/consoleIo.h>
-#include <bsp.h>
-#include <libcpu/spr.h>
-
-#if 0
-#ifdef BSP_KBD_IOBASE
-#define USE_KBD_SUPPORT
-#endif
-#ifdef BSP_VGA_IOBASE
-#define USE_VGA_SUPPORT
-#endif
-
-#ifdef USE_KBD_SUPPORT
-#include "keyboard.h"
-#endif
-#include "console.inl"
-
-#ifdef __BOOT__
-extern void boot_udelay();
-void * __palloc(u_long);
-void pfree(void *);
-#else
-#include <rtems/bspIo.h>
-#endif
-
-typedef unsigned long long u64;
-typedef long long s64;
-typedef unsigned int u32;
-
-#ifndef __BOOT__
-BSP_output_char_function_type BSP_output_char = debug_putc_onlcr;
-BSP_polling_getchar_function_type BSP_poll_char = NULL;
-#endif
-
-#ifdef USE_KBD_SUPPORT
-unsigned short plain_map[NR_KEYS] = {
- 0xf200, 0xf01b, 0xf031, 0xf032, 0xf033, 0xf034, 0xf035, 0xf036,
- 0xf037, 0xf038, 0xf039, 0xf030, 0xf02d, 0xf03d, 0xf07f, 0xf009,
- 0xfb71, 0xfb77, 0xfb65, 0xfb72, 0xfb74, 0xfb79, 0xfb75, 0xfb69,
- 0xfb6f, 0xfb70, 0xf05b, 0xf05d, 0xf201, 0xf702, 0xfb61, 0xfb73,
- 0xfb64, 0xfb66, 0xfb67, 0xfb68, 0xfb6a, 0xfb6b, 0xfb6c, 0xf03b,
- 0xf027, 0xf060, 0xf700, 0xf05c, 0xfb7a, 0xfb78, 0xfb63, 0xfb76,
- 0xfb62, 0xfb6e, 0xfb6d, 0xf02c, 0xf02e, 0xf02f, 0xf700, 0xf30c,
- 0xf703, 0xf020, 0xf207, 0xf100, 0xf101, 0xf102, 0xf103, 0xf104,
- 0xf105, 0xf106, 0xf107, 0xf108, 0xf109, 0xf208, 0xf209, 0xf307,
- 0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301,
- 0xf302, 0xf303, 0xf300, 0xf310, 0xf206, 0xf200, 0xf03c, 0xf10a,
- 0xf10b, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf30e, 0xf702, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603,
- 0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116,
- 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
- 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
-};
-
-unsigned short shift_map[NR_KEYS] = {
- 0xf200, 0xf01b, 0xf021, 0xf040, 0xf023, 0xf024, 0xf025, 0xf05e,
- 0xf026, 0xf02a, 0xf028, 0xf029, 0xf05f, 0xf02b, 0xf07f, 0xf009,
- 0xfb51, 0xfb57, 0xfb45, 0xfb52, 0xfb54, 0xfb59, 0xfb55, 0xfb49,
- 0xfb4f, 0xfb50, 0xf07b, 0xf07d, 0xf201, 0xf702, 0xfb41, 0xfb53,
- 0xfb44, 0xfb46, 0xfb47, 0xfb48, 0xfb4a, 0xfb4b, 0xfb4c, 0xf03a,
- 0xf022, 0xf07e, 0xf700, 0xf07c, 0xfb5a, 0xfb58, 0xfb43, 0xfb56,
- 0xfb42, 0xfb4e, 0xfb4d, 0xf03c, 0xf03e, 0xf03f, 0xf700, 0xf30c,
- 0xf703, 0xf020, 0xf207, 0xf10a, 0xf10b, 0xf10c, 0xf10d, 0xf10e,
- 0xf10f, 0xf110, 0xf111, 0xf112, 0xf113, 0xf213, 0xf203, 0xf307,
- 0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301,
- 0xf302, 0xf303, 0xf300, 0xf310, 0xf206, 0xf200, 0xf03e, 0xf10a,
- 0xf10b, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf30e, 0xf702, 0xf30d, 0xf200, 0xf701, 0xf205, 0xf114, 0xf603,
- 0xf20b, 0xf601, 0xf602, 0xf117, 0xf600, 0xf20a, 0xf115, 0xf116,
- 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
- 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
-};
-
-unsigned short altgr_map[NR_KEYS] = {
- 0xf200, 0xf200, 0xf200, 0xf040, 0xf200, 0xf024, 0xf200, 0xf200,
- 0xf07b, 0xf05b, 0xf05d, 0xf07d, 0xf05c, 0xf200, 0xf200, 0xf200,
- 0xfb71, 0xfb77, 0xf918, 0xfb72, 0xfb74, 0xfb79, 0xfb75, 0xfb69,
- 0xfb6f, 0xfb70, 0xf200, 0xf07e, 0xf201, 0xf702, 0xf914, 0xfb73,
- 0xf917, 0xf919, 0xfb67, 0xfb68, 0xfb6a, 0xfb6b, 0xfb6c, 0xf200,
- 0xf200, 0xf200, 0xf700, 0xf200, 0xfb7a, 0xfb78, 0xf916, 0xfb76,
- 0xf915, 0xfb6e, 0xfb6d, 0xf200, 0xf200, 0xf200, 0xf700, 0xf30c,
- 0xf703, 0xf200, 0xf207, 0xf50c, 0xf50d, 0xf50e, 0xf50f, 0xf510,
- 0xf511, 0xf512, 0xf513, 0xf514, 0xf515, 0xf208, 0xf202, 0xf911,
- 0xf912, 0xf913, 0xf30b, 0xf90e, 0xf90f, 0xf910, 0xf30a, 0xf90b,
- 0xf90c, 0xf90d, 0xf90a, 0xf310, 0xf206, 0xf200, 0xf07c, 0xf516,
- 0xf517, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf30e, 0xf702, 0xf30d, 0xf200, 0xf701, 0xf205, 0xf114, 0xf603,
- 0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116,
- 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
- 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
-};
-
-unsigned short ctrl_map[NR_KEYS] = {
- 0xf200, 0xf200, 0xf200, 0xf000, 0xf01b, 0xf01c, 0xf01d, 0xf01e,
- 0xf01f, 0xf07f, 0xf200, 0xf200, 0xf01f, 0xf200, 0xf008, 0xf200,
- 0xf011, 0xf017, 0xf005, 0xf012, 0xf014, 0xf019, 0xf015, 0xf009,
- 0xf00f, 0xf010, 0xf01b, 0xf01d, 0xf201, 0xf702, 0xf001, 0xf013,
- 0xf004, 0xf006, 0xf007, 0xf008, 0xf00a, 0xf00b, 0xf00c, 0xf200,
- 0xf007, 0xf000, 0xf700, 0xf01c, 0xf01a, 0xf018, 0xf003, 0xf016,
- 0xf002, 0xf00e, 0xf00d, 0xf200, 0xf20e, 0xf07f, 0xf700, 0xf30c,
- 0xf703, 0xf000, 0xf207, 0xf100, 0xf101, 0xf102, 0xf103, 0xf104,
- 0xf105, 0xf106, 0xf107, 0xf108, 0xf109, 0xf208, 0xf204, 0xf307,
- 0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301,
- 0xf302, 0xf303, 0xf300, 0xf310, 0xf206, 0xf200, 0xf200, 0xf10a,
- 0xf10b, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf30e, 0xf702, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603,
- 0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116,
- 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
- 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
-};
-
-unsigned short shift_ctrl_map[NR_KEYS] = {
- 0xf200, 0xf200, 0xf200, 0xf000, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf200, 0xf200, 0xf200, 0xf200, 0xf01f, 0xf200, 0xf200, 0xf200,
- 0xf011, 0xf017, 0xf005, 0xf012, 0xf014, 0xf019, 0xf015, 0xf009,
- 0xf00f, 0xf010, 0xf200, 0xf200, 0xf201, 0xf702, 0xf001, 0xf013,
- 0xf004, 0xf006, 0xf007, 0xf008, 0xf00a, 0xf00b, 0xf00c, 0xf200,
- 0xf200, 0xf200, 0xf700, 0xf200, 0xf01a, 0xf018, 0xf003, 0xf016,
- 0xf002, 0xf00e, 0xf00d, 0xf200, 0xf200, 0xf200, 0xf700, 0xf30c,
- 0xf703, 0xf200, 0xf207, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf208, 0xf200, 0xf307,
- 0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301,
- 0xf302, 0xf303, 0xf300, 0xf310, 0xf206, 0xf200, 0xf200, 0xf200,
- 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf30e, 0xf702, 0xf30d, 0xf200, 0xf701, 0xf205, 0xf114, 0xf603,
- 0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116,
- 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
- 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
-};
-
-unsigned short alt_map[NR_KEYS] = {
- 0xf200, 0xf81b, 0xf831, 0xf832, 0xf833, 0xf834, 0xf835, 0xf836,
- 0xf837, 0xf838, 0xf839, 0xf830, 0xf82d, 0xf83d, 0xf87f, 0xf809,
- 0xf871, 0xf877, 0xf865, 0xf872, 0xf874, 0xf879, 0xf875, 0xf869,
- 0xf86f, 0xf870, 0xf85b, 0xf85d, 0xf80d, 0xf702, 0xf861, 0xf873,
- 0xf864, 0xf866, 0xf867, 0xf868, 0xf86a, 0xf86b, 0xf86c, 0xf83b,
- 0xf827, 0xf860, 0xf700, 0xf85c, 0xf87a, 0xf878, 0xf863, 0xf876,
- 0xf862, 0xf86e, 0xf86d, 0xf82c, 0xf82e, 0xf82f, 0xf700, 0xf30c,
- 0xf703, 0xf820, 0xf207, 0xf500, 0xf501, 0xf502, 0xf503, 0xf504,
- 0xf505, 0xf506, 0xf507, 0xf508, 0xf509, 0xf208, 0xf209, 0xf907,
- 0xf908, 0xf909, 0xf30b, 0xf904, 0xf905, 0xf906, 0xf30a, 0xf901,
- 0xf902, 0xf903, 0xf900, 0xf310, 0xf206, 0xf200, 0xf83c, 0xf50a,
- 0xf50b, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf30e, 0xf702, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603,
- 0xf118, 0xf210, 0xf211, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116,
- 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
- 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
-};
-
-unsigned short ctrl_alt_map[NR_KEYS] = {
- 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf811, 0xf817, 0xf805, 0xf812, 0xf814, 0xf819, 0xf815, 0xf809,
- 0xf80f, 0xf810, 0xf200, 0xf200, 0xf201, 0xf702, 0xf801, 0xf813,
- 0xf804, 0xf806, 0xf807, 0xf808, 0xf80a, 0xf80b, 0xf80c, 0xf200,
- 0xf200, 0xf200, 0xf700, 0xf200, 0xf81a, 0xf818, 0xf803, 0xf816,
- 0xf802, 0xf80e, 0xf80d, 0xf200, 0xf200, 0xf200, 0xf700, 0xf30c,
- 0xf703, 0xf200, 0xf207, 0xf500, 0xf501, 0xf502, 0xf503, 0xf504,
- 0xf505, 0xf506, 0xf507, 0xf508, 0xf509, 0xf208, 0xf200, 0xf307,
- 0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301,
- 0xf302, 0xf303, 0xf300, 0xf20c, 0xf206, 0xf200, 0xf200, 0xf50a,
- 0xf50b, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
- 0xf30e, 0xf702, 0xf30d, 0xf200, 0xf701, 0xf205, 0xf114, 0xf603,
- 0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf20c,
- 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d,
- 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
-};
-
-ushort *key_maps[MAX_NR_KEYMAPS] = {
- plain_map, shift_map, altgr_map, 0,
- ctrl_map, shift_ctrl_map, 0, 0,
- alt_map, 0, 0, 0,
- ctrl_alt_map, 0
-};
-
-unsigned int keymap_count = 7;
-
-/*
- * Philosophy: most people do not define more strings, but they who do
- * often want quite a lot of string space. So, we statically allocate
- * the default and allocate dynamically in chunks of 512 bytes.
- */
-
-char func_buf[] = {
- '\033', '[', '[', 'A', 0,
- '\033', '[', '[', 'B', 0,
- '\033', '[', '[', 'C', 0,
- '\033', '[', '[', 'D', 0,
- '\033', '[', '[', 'E', 0,
- '\033', '[', '1', '7', '~', 0,
- '\033', '[', '1', '8', '~', 0,
- '\033', '[', '1', '9', '~', 0,
- '\033', '[', '2', '0', '~', 0,
- '\033', '[', '2', '1', '~', 0,
- '\033', '[', '2', '3', '~', 0,
- '\033', '[', '2', '4', '~', 0,
- '\033', '[', '2', '5', '~', 0,
- '\033', '[', '2', '6', '~', 0,
- '\033', '[', '2', '8', '~', 0,
- '\033', '[', '2', '9', '~', 0,
- '\033', '[', '3', '1', '~', 0,
- '\033', '[', '3', '2', '~', 0,
- '\033', '[', '3', '3', '~', 0,
- '\033', '[', '3', '4', '~', 0,
- '\033', '[', '1', '~', 0,
- '\033', '[', '2', '~', 0,
- '\033', '[', '3', '~', 0,
- '\033', '[', '4', '~', 0,
- '\033', '[', '5', '~', 0,
- '\033', '[', '6', '~', 0,
- '\033', '[', 'M', 0,
- '\033', '[', 'P', 0,
-};
-
-char *funcbufptr = func_buf;
-int funcbufsize = sizeof(func_buf);
-int funcbufleft = 0; /* space left */
-
-char *func_table[MAX_NR_FUNC] = {
- func_buf + 0,
- func_buf + 5,
- func_buf + 10,
- func_buf + 15,
- func_buf + 20,
- func_buf + 25,
- func_buf + 31,
- func_buf + 37,
- func_buf + 43,
- func_buf + 49,
- func_buf + 55,
- func_buf + 61,
- func_buf + 67,
- func_buf + 73,
- func_buf + 79,
- func_buf + 85,
- func_buf + 91,
- func_buf + 97,
- func_buf + 103,
- func_buf + 109,
- func_buf + 115,
- func_buf + 120,
- func_buf + 125,
- func_buf + 130,
- func_buf + 135,
- func_buf + 140,
- func_buf + 145,
- 0,
- 0,
- func_buf + 149,
- 0,
-};
-
-struct kbdiacr {
- unsigned char diacr, base, result;
-};
-
-struct kbdiacr accent_table[MAX_DIACR] = {
- {'`', 'A', '\300'}, {'`', 'a', '\340'},
- {'\'', 'A', '\301'}, {'\'', 'a', '\341'},
- {'^', 'A', '\302'}, {'^', 'a', '\342'},
- {'~', 'A', '\303'}, {'~', 'a', '\343'},
- {'"', 'A', '\304'}, {'"', 'a', '\344'},
- {'O', 'A', '\305'}, {'o', 'a', '\345'},
- {'0', 'A', '\305'}, {'0', 'a', '\345'},
- {'A', 'A', '\305'}, {'a', 'a', '\345'},
- {'A', 'E', '\306'}, {'a', 'e', '\346'},
- {',', 'C', '\307'}, {',', 'c', '\347'},
- {'`', 'E', '\310'}, {'`', 'e', '\350'},
- {'\'', 'E', '\311'}, {'\'', 'e', '\351'},
- {'^', 'E', '\312'}, {'^', 'e', '\352'},
- {'"', 'E', '\313'}, {'"', 'e', '\353'},
- {'`', 'I', '\314'}, {'`', 'i', '\354'},
- {'\'', 'I', '\315'}, {'\'', 'i', '\355'},
- {'^', 'I', '\316'}, {'^', 'i', '\356'},
- {'"', 'I', '\317'}, {'"', 'i', '\357'},
- {'-', 'D', '\320'}, {'-', 'd', '\360'},
- {'~', 'N', '\321'}, {'~', 'n', '\361'},
- {'`', 'O', '\322'}, {'`', 'o', '\362'},
- {'\'', 'O', '\323'}, {'\'', 'o', '\363'},
- {'^', 'O', '\324'}, {'^', 'o', '\364'},
- {'~', 'O', '\325'}, {'~', 'o', '\365'},
- {'"', 'O', '\326'}, {'"', 'o', '\366'},
- {'/', 'O', '\330'}, {'/', 'o', '\370'},
- {'`', 'U', '\331'}, {'`', 'u', '\371'},
- {'\'', 'U', '\332'}, {'\'', 'u', '\372'},
- {'^', 'U', '\333'}, {'^', 'u', '\373'},
- {'"', 'U', '\334'}, {'"', 'u', '\374'},
- {'\'', 'Y', '\335'}, {'\'', 'y', '\375'},
- {'T', 'H', '\336'}, {'t', 'h', '\376'},
- {'s', 's', '\337'}, {'"', 'y', '\377'},
- {'s', 'z', '\337'}, {'i', 'j', '\377'},
-};
-
-unsigned int accent_table_size = 68;
-
-
-
-
-/* These #defines have been copied from drivers/char/pc_keyb.h, by
- * Martin Mares (mj@ucw.cz).
- * converted to offsets by Till Straumann <strauman@slac.stanford.edu>
- */
-#define KBD_STATUS_REG 0x4 /* Status register (R) */
-#define KBD_CNTL_REG 0x4 /* Controller command register (W) */
-#define KBD_DATA_REG 0x0 /* Keyboard data register (R/W) */
-
-/*
- * Keyboard Controller Commands
- */
-
-#define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */
-#define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */
-#define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */
-#define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */
-#define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */
-#define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */
-#define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */
-#define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */
-#define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */
-
-/*
- * Keyboard Commands
- */
-
-#define KBD_CMD_ENABLE 0xF4 /* Enable scanning */
-#define KBD_CMD_DISABLE 0xF5 /* Disable scanning */
-#define KBD_CMD_RESET 0xFF /* Reset */
-
-/*
- * Keyboard Replies
- */
-
-#define KBD_REPLY_POR 0xAA /* Power on reset */
-#define KBD_REPLY_ACK 0xFA /* Command ACK */
-#define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */
-
-/*
- * Status Register Bits
- */
-
-#define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */
-#define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
-#define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */
-#define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */
-#define KBD_STAT_PERR 0x80 /* Parity error */
-
-/*
- * Controller Mode Register Bits
- */
-
-#define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */
-#define KBD_MODE_SYS 0x04 /* The system flag (?) */
-#define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */
-#define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */
-#define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */
-#define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */
-#define KBD_MODE_RFU 0x80
-
-#endif /* USE_KBD_SUPPORT */
-
-
-/* Early messages after mm init but before console init are kept in log
- * buffers.
- */
-#define PAGE_LOG_CHARS (PAGE_SIZE-sizeof(int)-sizeof(u_long)-1)
-
-typedef struct _console_log {
- struct _console_log *next;
- int offset;
- u_char data[PAGE_LOG_CHARS];
-} console_log;
-
-#ifdef STATIC_LOG_ALLOC
-
-#define STATIC_LOG_DATA_PAGE_NB 3
-
-static u_char log_page_pool [STATIC_LOG_DATA_PAGE_NB * PAGE_SIZE];
-
-#endif
-#endif
-
-static board_memory_map mem_map = {
- (__io_ptr) _IO_BASE, /* from libcpu/io.h */
- (__io_ptr) _ISA_MEM_BASE,
-};
-
-board_memory_map *ptr_mem_map = &mem_map;
-
-void log_putc(const u_char c) {
- console_log *l;
- for(l=console_global_data.log; l; l=l->next) {
- if (l->offset<PAGE_LOG_CHARS) break;
- }
- if (!l) {
- l=__palloc(sizeof(console_log));
- memset(l, 0, sizeof(console_log));
- if (!console_global_data.log)
- console_global_data.log = l;
- else {
- console_log *p;
- for (p=console_global_data.log;
- p->next; p=p->next);
- p->next = l;
- }
- }
- l->data[l->offset++] = c;
-}
-
-/* This puts is non standard since it does not automatically add a newline
- * at the end. So it is made private to avoid confusion in other files.
- */
-static
-void puts(const u_char *s)
-{
- char c;
-
- while ( ( c = *s++ ) != '\0' ) {
- debug_putc_onlcr((const char)c);
- }
-}
-
-
-static
-void flush_log(void) {
- console_log *p, *next;
- if (console_global_data.vacuum_sent) {
-#ifdef TRACE_FLUSH_LOG
- printk("%d characters sent into oblivion before MM init!\n",
- console_global_data.vacuum_sent);
-#endif
- }
- for(p=console_global_data.log; p; p=next) {
- puts(p->data);
- next = p->next;
- pfree(p);
- }
-}
-
-#ifndef INL_CONSOLE_INB
-#error "BSP probably didn't define a console port"
-#endif
-
-void serial_putc(const u_char c)
-{
- while ((INL_CONSOLE_INB(lsr) & LSR_THRE) == 0) ;
- INL_CONSOLE_OUTB(thr, c);
-}
-
-int serial_getc(void)
-{
- while ((INL_CONSOLE_INB(lsr) & LSR_DR) == 0) ;
- return (INL_CONSOLE_INB(rbr));
-}
-
-int serial_tstc(void)
-{
- return ((INL_CONSOLE_INB(lsr) & LSR_DR) != 0);
-}
-
-#ifdef USE_VGA_SUPPORT
-static void scroll(void)
-{
- int i;
-
- memcpy ( (u_char *)vidmem, (u_char *)vidmem + console_global_data.cols * 2,
- ( console_global_data.lines - 1 ) * console_global_data.cols * 2 );
- for ( i = ( console_global_data.lines - 1 ) * console_global_data.cols * 2;
- i < console_global_data.lines * console_global_data.cols * 2;
- i += 2 )
- vidmem[i] = ' ';
-}
-
-/*
- * cursor() sets an offset (0-1999) into the 80x25 text area
- */
-static void
-cursor(int x, int y)
-{
- int pos = console_global_data.cols*y + x;
- vga_outb(14, 0x14);
- vga_outb(0x15, pos>>8);
- vga_outb(0x14, 15);
- vga_outb(0x15, pos);
-}
-
-void
-vga_putc(const u_char c)
-{
- int x,y;
-
- x = console_global_data.orig_x;
- y = console_global_data.orig_y;
-
- if ( c == '\n' ) {
- if ( ++y >= console_global_data.lines ) {
- scroll();
- y--;
- }
- } else if (c == '\b') {
- if (x > 0) {
- x--;
- }
- } else if (c == '\r') {
- x = 0;
- } else {
- vidmem [ ( x + console_global_data.cols * y ) * 2 ] = c;
- if ( ++x >= console_global_data.cols ) {
- x = 0;
- if ( ++y >= console_global_data.lines ) {
- scroll();
- y--;
- }
- }
- }
-
- cursor(x, y);
-
- console_global_data.orig_x = x;
- console_global_data.orig_y = y;
-}
-#endif /* USE_VGA_SUPPORT */
-
-#ifdef USE_KBD_SUPPORT
-/* Keyboard support */
-static int kbd_getc(void)
-{
- unsigned char dt, brk, val;
- unsigned code;
-loop:
- while((kbd_inb(KBD_STATUS_REG) & KBD_STAT_OBF) == 0) ;
-
- dt = kbd_inb(KBD_DATA_REG);
-
- brk = dt & 0x80; /* brk == 1 on key release */
- dt = dt & 0x7f; /* keycode */
-
- if (console_global_data.shfts)
- code = shift_map[dt];
- else if (console_global_data.ctls)
- code = ctrl_map[dt];
- else
- code = plain_map[dt];
-
- val = KVAL(code);
- switch (KTYP(code) & 0x0f) {
- case KT_LATIN:
- if (brk)
- break;
- if (console_global_data.alts)
- val |= 0x80;
- if (val == 0x7f) /* map delete to backspace */
- val = '\b';
- return val;
-
- case KT_LETTER:
- if (brk)
- break;
- if (console_global_data.caps)
- val -= 'a'-'A';
- return val;
-
- case KT_SPEC:
- if (brk)
- break;
- if (val == KVAL(K_CAPS))
- console_global_data.caps = !console_global_data.caps;
- else if (val == KVAL(K_ENTER)) {
-enter: /* Wait for key up */
- while (1) {
- while((kbd_inb(KBD_STATUS_REG) & KBD_STAT_OBF) == 0) ;
- dt = kbd_inb(KBD_DATA_REG);
- if (dt & 0x80) /* key up */ break;
- }
- return 10;
- }
- break;
-
- case KT_PAD:
- if (brk)
- break;
- if (val < 10)
- return val;
- if (val == KVAL(K_PENTER))
- goto enter;
- break;
-
- case KT_SHIFT:
- switch (val) {
- case KG_SHIFT:
- case KG_SHIFTL:
- case KG_SHIFTR:
- console_global_data.shfts = brk ? 0 : 1;
- break;
- case KG_ALT:
- case KG_ALTGR:
- console_global_data.alts = brk ? 0 : 1;
- break;
- case KG_CTRL:
- case KG_CTRLL:
- case KG_CTRLR:
- console_global_data.ctls = brk ? 0 : 1;
- break;
- }
- break;
-
- case KT_LOCK:
- switch (val) {
- case KG_SHIFT:
- case KG_SHIFTL:
- case KG_SHIFTR:
- if (brk)
- console_global_data.shfts = !console_global_data.shfts;
- break;
- case KG_ALT:
- case KG_ALTGR:
- if (brk)
- console_global_data.alts = !console_global_data.alts;
- break;
- case KG_CTRL:
- case KG_CTRLL:
- case KG_CTRLR:
- if (brk)
- console_global_data.ctls = !console_global_data.ctls;
- break;
- }
- break;
- }
- /* if (brk) return (0); */ /* Ignore initial 'key up' codes */
- goto loop;
-}
-
-static int kbd_get(int ms) {
- int status, data;
- while(1) {
- status = kbd_inb(KBD_STATUS_REG);
- if (status & KBD_STAT_OBF) {
- data = kbd_inb(KBD_DATA_REG);
- if (status & (KBD_STAT_GTO | KBD_STAT_PERR))
- return -1;
- else
- return data;
- }
- if (--ms < 0) return -1;
-#ifdef __BOOT__
- boot_udelay(1000);
-#else
- rtems_bsp_delay(1000);
-#endif
- }
-}
-
-static void kbd_put(u_char c, int ms, int port) {
- while (kbd_inb(KBD_STATUS_REG) & KBD_STAT_IBF) {
- if (--ms < 0) return;
-#ifdef __BOOT__
- boot_udelay(1000);
-#else
- rtems_bsp_delay(1000);
-#endif
- }
- kbd_outb(port, c);
-}
-
-int kbdreset(void)
-{
- int c;
-
- /* Flush all pending data */
- while(kbd_get(10) != -1);
-
- /* Send self-test */
- kbd_put(KBD_CCMD_SELF_TEST, 10, KBD_CNTL_REG);
- c = kbd_get(1000);
- if (c != 0x55) return 1;
-
- /* Enable then reset the KB */
- kbd_put(KBD_CCMD_KBD_ENABLE, 10, KBD_CNTL_REG);
-
- while (1) {
- kbd_put(KBD_CMD_RESET, 10, KBD_DATA_REG);
- c = kbd_get(1000);
- if (c == KBD_REPLY_ACK) break;
- if (c != KBD_REPLY_RESEND) return 2;
- }
-
- if (kbd_get(1000) != KBD_REPLY_POR) return 3;
-
- /* Disable the keyboard while setting up the controller */
- kbd_put(KBD_CMD_DISABLE, 10, KBD_DATA_REG);
- if (kbd_get(10)!=KBD_REPLY_ACK) return 4;
-
- /* Enable interrupts and keyboard controller */
- kbd_put(KBD_CCMD_WRITE_MODE, 10, KBD_CNTL_REG);
- kbd_put(KBD_MODE_KBD_INT | KBD_MODE_SYS |
- KBD_MODE_DISABLE_MOUSE | KBD_MODE_KCC,
- 10, KBD_DATA_REG);
-
- /* Reenable the keyboard */
- kbd_put(KBD_CMD_ENABLE, 10, KBD_DATA_REG);
- if (kbd_get(10)!=KBD_REPLY_ACK) return 5;
-
- return 0;
-}
-
-int kbd_tstc(void)
-{
- return ((kbd_inb(KBD_STATUS_REG) & KBD_STAT_OBF) != 0);
-}
-#endif /* USE_KBD_SUPPORT */
-
-const struct console_io
-vacuum_console_functions = {
- vacuum_putc,
- vacuum_getc,
- vacuum_tstc
-};
-
-static const struct console_io
-log_console_functions = {
- log_putc,
- vacuum_getc,
- vacuum_tstc
-}
-,
-serial_console_functions = {
- serial_putc,
- serial_getc,
- serial_tstc
-}
-#if defined(USE_KBD_SUPPORT) && defined(USE_VGA_SUPPORT)
-,
-vga_console_functions = {
- vga_putc,
- kbd_getc,
- kbd_tstc
-}
-#endif
-;
-
-console_io* curIo = (console_io*) &vacuum_console_functions;
-
-int select_console(ioType t) {
- static ioType curType = CONSOLE_VACUUM;
-
- switch (t) {
- case CONSOLE_VACUUM : curIo = (console_io*)&vacuum_console_functions; break;
- case CONSOLE_LOG : curIo = (console_io*)&log_console_functions; break;
- case CONSOLE_SERIAL : curIo = (console_io*)&serial_console_functions; break;
-#if defined(USE_KBD_SUPPORT) && defined(USE_VGA_SUPPORT)
- case CONSOLE_VGA : curIo = (console_io*)&vga_console_functions; break;
-#endif
- default : curIo = (console_io*)&vacuum_console_functions;break;
- }
- if (curType == CONSOLE_LOG) flush_log();
- curType = t;
- return 0;
-}
-
-/* we use this so that we can do without the ctype library */
-#define is_digit(c) ((c) >= '0' && (c) <= '9')
-
-
-/* provide this for the bootloader only; otherwise
- * use libcpu implementation
- */
-#if defined(__BOOT__)
-static int skip_atoi(const char **s)
-{
- int i=0;
-
- while (is_digit(**s))
- i = i*10 + *((*s)++) - '0';
- return i;
-}
-
-/* Based on linux/lib/vsprintf.c and modified to suit our needs,
- * bloat has been limited since we basically only need %u, %x, %s and %c.
- * But we need 64 bit values !
- */
-int k_vsprintf(char *buf, const char *fmt, va_list args);
-
-int printk(const char *fmt, ...) {
- va_list args;
- int i;
- /* Should not be a problem with 8kB of stack */
- char buf[1024];
-
- va_start(args, fmt);
- i = k_vsprintf(buf, fmt, args);
- va_end(args);
- puts(buf);
- return i;
-}
-
-#endif
-
-/* Necessary to avoid including a library, and GCC won't do this inline. */
-#define div10(num, rmd) \
-do { u32 t1, t2, t3; \
- __asm__ ("lis %4,0xcccd; " \
- "addi %4,%4,0xffffcccd; " /* Build 0xcccccccd */ \
- "mulhwu %3,%0+1,%4; " /* (num.l*cst.l).h */ \
- "mullw %2,%0,%4; " /* (num.h*cst.l).l */ \
- "addc %3,%3,%2; " \
- "mulhwu %2,%0,%4; " /* (num.h*cst.l).h */ \
- "addi %4,%4,-1; " /* Build 0xcccccccc */ \
- "mullw %1,%0,%4; " /* (num.h*cst.h).l */ \
- "adde %2,%2,%1; " \
- "mulhwu %1,%0,%4; " /* (num.h*cst.h).h */ \
- "addze %1,%1; " \
- "mullw %0,%0+1,%4; " /* (num.l*cst.h).l */ \
- "addc %3,%3,%0; " \
- "mulhwu %0,%0+1,%4; " /* (num.l*cst.h).h */ \
- "adde %2,%2,%0; " \
- "addze %1,%1; " \
- "srwi %2,%2,3; " \
- "srwi %0,%1,3; " \
- "rlwimi %2,%1,29,0,2; " \
- "mulli %4,%2,10; " \
- "sub %4,%0+1,%4; " \
- "mr %0+1,%2; " : \
- "=r" (num), "=&r" (t1), "=&r" (t2), "=&r"(t3), "=&b" (rmd) : \
- "0" (num)); \
- \
-} while(0);
-
-#define SIGN 1 /* unsigned/signed long */
-#define LARGE 2 /* use 'ABCDEF' instead of 'abcdef' */
-#define HEX 4 /* hexadecimal instead of decimal */
-#define ADDR 8 /* Value is an addres (p) */
-#define ZEROPAD 16 /* pad with zero */
-#define HALF 32
-#define LONG 64 /* long argument */
-#define LLONG 128 /* 64 bit argument */
-
-#if defined(__BOOT__)
-static char * number(char * str, int size, int type, u64 num)
-{
- char fill,sign,tmp[24];
- const char *digits="0123456789abcdef";
- int i;
-
- if (type & LARGE)
- digits = "0123456789ABCDEF";
- fill = (type & ZEROPAD) ? '0' : ' ';
- sign = 0;
- if (type & SIGN) {
- if ((s64)num <0) {
- sign = '-';
- num = -num;
- size--;
- }
- }
-
- i = 0;
- do {
- unsigned rem;
- if (type&HEX) {
- rem = num & 0x0f;
- num >>=4;
- } else {
- div10(num, rem);
- }
- tmp[i++] = digits[rem];
- } while (num != 0);
-
- size -= i;
- if (!(type&(ZEROPAD)))
- while(size-->0)
- *str++ = ' ';
- if (sign)
- *str++ = sign;
-
- while (size-- > 0)
- *str++ = fill;
- while (i-- > 0)
- *str++ = tmp[i];
- while (size-- > 0)
- *str++ = ' ';
- return str;
-}
-
-int k_vsprintf(char *buf, const char *fmt, va_list args)
-{
- int len;
- u64 num;
- int i;
- char * str;
- const char *s;
-
- int flags; /* flags to number() and private */
-
- int field_width; /* width of output field */
-
- for (str=buf ; *fmt ; ++fmt) {
- if (*fmt != '%') {
- *str++ = *fmt;
- continue;
- }
-
- /* process flags, only 0 padding needed */
- flags = 0;
- if (*++fmt == '0' ) {
- flags |= ZEROPAD;
- fmt++;
- }
-
- /* get field width */
- field_width = -1;
- if (is_digit(*fmt))
- field_width = skip_atoi(&fmt);
-
- /* get the conversion qualifier */
- if (*fmt == 'h') {
- flags |= HALF;
- fmt++;
- } else if (*fmt == 'L') {
- flags |= LLONG;
- fmt++;
- } else if (*fmt == 'l') {
- flags |= LONG;
- fmt++;
- }
-
- switch (*fmt) {
- case 'c':
- *str++ = (unsigned char) va_arg(args, int);
- while (--field_width > 0)
- *str++ = ' ';
- continue;
-
- case 's':
- s = va_arg(args, char *);
- len = strlen(s);
-
- for (i = 0; i < len; ++i)
- *str++ = *s++;
- while (len < field_width--)
- *str++ = ' ';
- continue;
-
- case 'p':
- if (field_width == -1) {
- field_width = 2*sizeof(void *);
- }
- flags |= ZEROPAD|HEX|ADDR;
- break;
-
- case 'X':
- flags |= LARGE;
- case 'x':
- flags |= HEX;
- break;
-
- case 'd':
- case 'i':
- flags |= SIGN;
- case 'u':
- break;
-
- default:
- if (*fmt != '%')
- *str++ = '%';
- if (*fmt)
- *str++ = *fmt;
- else
- --fmt;
- continue;
- }
- /* This ugly code tries to minimize the number of va_arg()
- * since they expand to a lot of code on PPC under the SYSV
- * calling conventions (but not with -mcall-aix which has
- * other problems). Arguments have at least the size of a
- * long allocated, and we use this fact to minimize bloat.
- * (and pointers are assimilated to unsigned long too).
- */
- if (sizeof(long long) > sizeof(long) && flags & LLONG)
- num = va_arg(args, unsigned long long);
- else {
- u_long n = va_arg(args, unsigned long);
- if (flags & HALF) {
- if (flags & SIGN)
- n = (short) n;
- else
- n = (unsigned short) n;
- } else if (! flags & LONG) {
- /* Here the compiler correctly removes this
- * do nothing code on 32 bit PPC.
- */
- if (flags & SIGN)
- n = (int) n;
- else
- n = (unsigned) n;
- }
- if (flags & SIGN) num = (long) n; else num = n;
- }
- str = number(str, field_width, flags, num);
- }
- *str = '\0';
- return str-buf;
-}
-#endif
-#endif
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/printk_support.c b/c/src/lib/libbsp/powerpc/ep1a/console/printk_support.c
deleted file mode 100644
index e5b75f4ff2..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/console/printk_support.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * This file contains the ep1a printk support routines.
- */
-
-/*
- * COPYRIGHT (c) 2011-2014.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <bsp.h>
-#include <rtems/libio.h>
-#include <stdlib.h>
-#include <assert.h>
-#include <termios.h>
-#include <rtems/bspIo.h>
-
-rtems_device_minor_number BSPPrintkPort = 0;
-
-/* const char arg to be compatible with BSP_output_char decl. */
-static void debug_putc_onlcr(const char c)
-{
- volatile int i;
-
- /*
- * Note: Hack to get printk to work. Depends upon bit
- * and silverchip to initialize the port and just
- * forces a character to be polled out of com1
- * regardless of where the console is.
- */
- volatile unsigned char *ptr = (void *)0xff800000;
-
- if ('\n'==c){
- *ptr = '\r';
- __asm__ volatile("sync");
- for (i=0;i<0x0fff;i++);
- }
-
- *ptr = c;
- __asm__ volatile("sync");
- for (i=0;i<0x0fff;i++);
-}
-
-BSP_output_char_function_type BSP_output_char = debug_putc_onlcr;
-BSP_polling_getchar_function_type BSP_poll_char = NULL;
-
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/rsPMCQ1.c b/c/src/lib/libbsp/powerpc/ep1a/console/rsPMCQ1.c
deleted file mode 100644
index deee170df9..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/console/rsPMCQ1.c
+++ /dev/null
@@ -1,402 +0,0 @@
-/* rsPMCQ1.c - Radstone PMCQ1 Common Initialisation Code
- *
- * Copyright 2000 Radstone Technology
- *
- * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
- * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
- * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
- *
- * You are hereby granted permission to use, copy, modify, and distribute
- * this file, provided that this notice, plus the above copyright notice
- * and disclaimer, appears in all copies. Radstone Technology will provide
- * no support for this code.
- *
- * COPYRIGHT (c) 2005.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- *
- */
-
-/*
-DESCRIPTION
-These functions are responsible for scanning for PMCQ1's and setting up
-the Motorola MC68360's if present.
-
-USAGE
-call rsPMCQ1Init() to perform ba sic initialisation of the PMCQ1's.
-*/
-
-/* includes */
-#include <libcpu/io.h>
-#include <bsp/irq.h>
-#include <stdlib.h>
-#include <rtems/bspIo.h>
-#include <bsp/pci.h>
-#include <bsp.h>
-#include "rsPMCQ1.h"
-#include "m68360.h"
-
-/* defines */
-#if 1
-#define DEBUG_360
-#endif
-
-/* Local data */
-PPMCQ1BoardData pmcq1BoardData = NULL;
-
-static unsigned char rsPMCQ1Initialized = FALSE;
-
-/* forward declarations */
-
-static void MsDelay(void)
-{
- printk(".");
-}
-
-static void write8( int addr, int data ){
- out_8((uint8_t *)addr, (uint8_t)data);
-}
-
-static void write16( int addr, int data ) {
- out_be16((uint16_t *)addr, (uint16_t)data );
-}
-
-static void write32( int addr, int data ) {
- out_be32((uint32_t *)addr, (uint32_t)data );
-}
-
-static void rsPMCQ1_scc_nullFunc(void) {}
-
-/*******************************************************************************
-* rsPMCQ1Int - handle a PMCQ1 interrupt
-*
-* This routine gets called when the QUICC or MA causes
-* an interrupt.
-*
-* RETURNS: NONE.
-*/
-
-static void rsPMCQ1Int( void *ptr )
-{
- unsigned long status;
- unsigned long status1;
- unsigned long mask;
- uint32_t data;
- PPMCQ1BoardData boardData = ptr;
-
- status = PMCQ1_Read_EPLD(boardData->baseaddr, PMCQ1_INT_STATUS );
- mask = PMCQ1_Read_EPLD(boardData->baseaddr, PMCQ1_INT_MASK );
-
- if (((mask & PMCQ1_INT_MASK_QUICC) == 0) && (status & PMCQ1_INT_STATUS_QUICC))
- {
- /* If there is a handler call it otherwise mask the interrupt */
- if (boardData->quiccInt) {
- boardData->quiccInt(boardData->quiccArg);
- } else {
- *(volatile unsigned long *)(boardData->baseaddr + PMCQ1_INT_MASK) |= PMCQ1_INT_MASK_QUICC;
- }
- }
-
- if (((mask & PMCQ1_INT_MASK_MA) == 0) && (status & PMCQ1_INT_STATUS_MA))
- {
- /* If there is a handler call it otherwise mask the interrupt */
- if (boardData->maInt) {
- boardData->maInt(boardData->maArg);
-
- data = PMCQ1_Read_EPLD(boardData->baseaddr, PMCQ1_INT_STATUS );
- data &= (~PMCQ1_INT_STATUS_MA);
- PMCQ1_Write_EPLD(boardData->baseaddr, PMCQ1_INT_STATUS, data );
-
- } else {
- *(volatile unsigned long *)(boardData->baseaddr + PMCQ1_INT_MASK) |= PMCQ1_INT_MASK_MA;
- }
- }
-
- RTEMS_COMPILER_MEMORY_BARRIER();
-
- /* Clear Interrupt on QSPAN */
- *(volatile unsigned long *)(boardData->bridgeaddr + 0x600) = 0x00001000;
-
- /* read back the status register to ensure that the pci write has completed */
- status1 = *(volatile unsigned long *)(boardData->bridgeaddr + 0x600);
- (void) status1; /* avoid set but not used warning */
- RTEMS_COMPILER_MEMORY_BARRIER();
-
-}
-
-
-/*******************************************************************************
-*
-* rsPMCQ1MaIntConnect - connect a MiniAce interrupt routine
-*
-* This routine is called to connect a MiniAce interrupt handler
-* upto a PMCQ1.
-*
-* RETURNS: OK if PMCQ1 found, ERROR if not.
-*/
-
-unsigned int rsPMCQ1MaIntConnect (
- unsigned long busNo, /* Pci Bus number of PMCQ1 */
- unsigned long slotNo, /* Pci Slot number of PMCQ1 */
- unsigned long funcNo, /* Pci Function number of PMCQ1 */
- FUNCTION_PTR routine,/* interrupt routine */
- uintptr_t arg /* argument to pass to interrupt routine */
-)
-{
- PPMCQ1BoardData boardData;
- uint32_t data;
- unsigned int status = RTEMS_IO_ERROR;
-
- for (boardData = pmcq1BoardData; boardData; boardData = boardData->pNext)
- {
- if ((boardData->busNo == busNo) && (boardData->slotNo == slotNo) &&
- (boardData->funcNo == funcNo))
- {
- boardData->maInt = routine;
- boardData->maArg = arg;
-
- data = PMCQ1_Read_EPLD(boardData->baseaddr, PMCQ1_INT_MASK );
- data &= (~PMCQ1_INT_MASK_MA);
- PMCQ1_Write_EPLD(boardData->baseaddr, PMCQ1_INT_MASK, data );
-
- data = PMCQ1_Read_EPLD(boardData->baseaddr, PMCQ1_INT_STATUS );
- data &= (~PMCQ1_INT_STATUS_MA);
- PMCQ1_Write_EPLD(boardData->baseaddr, PMCQ1_INT_STATUS, data );
-
- status = RTEMS_SUCCESSFUL;
- break;
- }
- }
-
- return (status);
-}
-
-/*******************************************************************************
-*
-* rsPMCQ1QuiccIntConnect - connect a Quicc interrupt routine
-*
-* This routine is called to connect a Quicc interrupt handler
-* upto a PMCQ1.
-*
-* RETURNS: OK if PMCQ1 found, ERROR if not.
-*/
-unsigned int rsPMCQ1QuiccIntConnect(
- unsigned long busNo, /* Pci Bus number of PMCQ1 */
- unsigned long slotNo, /* Pci Slot number of PMCQ1 */
- unsigned long funcNo, /* Pci Function number of PMCQ1 */
- FUNCTION_PTR routine,/* interrupt routine */
- uintptr_t arg /* argument to pass to interrupt routine */
-)
-{
- PPMCQ1BoardData boardData;
- unsigned int status = RTEMS_IO_ERROR;
-
- for (boardData = pmcq1BoardData; boardData; boardData = boardData->pNext)
- {
- if ((boardData->busNo == busNo) && (boardData->slotNo == slotNo) &&
- (boardData->funcNo == funcNo))
- {
- boardData->quiccInt = routine;
- boardData->quiccArg = arg;
- status = RTEMS_SUCCESSFUL;
- break;
- }
- }
- return (status);
-}
-
-/*******************************************************************************
-*
-* rsPMCQ1Init - initialize the PMCQ1's
-*
-* This routine is called to initialize the PCI card to a quiescent state.
-*
-* RETURNS: OK if PMCQ1 found, ERROR if not.
-*/
-
-unsigned int rsPMCQ1Init(void)
-{
- int busNo;
- int slotNo;
- uint32_t baseaddr = 0;
- uint32_t bridgeaddr = 0;
- unsigned long pbti0_ctl;
- int i;
- unsigned char int_vector;
- int fun;
- uint32_t temp;
- PPMCQ1BoardData boardData;
- rtems_irq_connect_data IrqData = {
- .name = 0,
- .hdl = rsPMCQ1Int,
- .handle = NULL,
- .on = (rtems_irq_enable) rsPMCQ1_scc_nullFunc,
- .off = (rtems_irq_disable) rsPMCQ1_scc_nullFunc,
- .isOn = (rtems_irq_is_enabled) rsPMCQ1_scc_nullFunc,
- };
-
- if (rsPMCQ1Initialized)
- {
- return RTEMS_SUCCESSFUL;
- }
- for (i=0;;i++){
- if ( pci_find_device(PCI_VEN_ID_RADSTONE, PCI_DEV_ID_PMCQ1, i, &busNo, &slotNo, &fun) != 0 )
- break;
-
- pci_read_config_dword(busNo, slotNo, 0, PCI_BASE_ADDRESS_2, &baseaddr);
- pci_read_config_dword(busNo, slotNo, 0, PCI_BASE_ADDRESS_0, &bridgeaddr);
-#ifdef DEBUG_360
- printk("PMCQ1 baseaddr 0x%08x bridgeaddr 0x%08x\n", baseaddr, bridgeaddr );
-#endif
-
- /* Set function code to normal mode and enable window */
- pbti0_ctl = *(unsigned long *)(bridgeaddr + 0x100) & 0xff0fffff;
- eieio();
- *(unsigned long *)(bridgeaddr + 0x100) = pbti0_ctl | 0x00500080;
- eieio();
-
- /* Assert QBUS reset */
- *(unsigned long *)(bridgeaddr + 0x800) |= 0x00000080;
- eieio();
-
- /*
- * Hold QBus in reset for 1ms
- */
- MsDelay();
-
- /* Take QBUS out of reset */
- *(unsigned long *)(bridgeaddr + 0x800) &= ~0x00000080;
- eieio();
-
- MsDelay();
-
- /* If a QUICC is fitted initialise it */
- if (PMCQ1_Read_EPLD(baseaddr, PMCQ1_BUILD_OPTION) & PMCQ1_QUICC_FITTED)
- {
-#ifdef DEBUG_360
- printk(" Found QUICC busNo %d slotNo %d\n", busNo, slotNo);
-#endif
-
- /* Initialise MBAR (must use function code of 7) */
- *(unsigned long *)(bridgeaddr + 0x100) = pbti0_ctl | 0x00700080;
- eieio();
-
- /* place internal 8K SRAM and registers at address 0x0 */
- *(unsigned long *)(baseaddr + Q1_360_MBAR) = 0x1;
- eieio();
-
- /* Set function code to normal mode */
- *(unsigned long *)(bridgeaddr + 0x100) = pbti0_ctl | 0x00500080;
- eieio();
-
- /* Disable the SWT and perform basic initialisation */
- write8(baseaddr+Q1_360_SIM_SYPCR,0);
- eieio();
-
- write32(baseaddr+Q1_360_SIM_MCR,0xa0001029);
- write16(baseaddr+Q1_360_SIM_PICR,0);
- write16(baseaddr+Q1_360_SIM_PITR,0);
-
- write16(baseaddr+Q1_360_CPM_ICCR,0x770);
- write16(baseaddr+Q1_360_CPM_SDCR,0x770);
- write32(baseaddr+Q1_360_CPM_CICR,0x00e49f00);
- write16(baseaddr+Q1_360_SIM_PEPAR,0x2080);
- eieio();
-
- /* Enable SRAM */
- write32(baseaddr+Q1_360_SIM_GMR,0x00001000); /* external master wait state */
- eieio();
- write32(baseaddr+Q1_360_SIM_OR0,0x1ff00000); /*| MEMC_OR_FC*/
- eieio();
- write32(baseaddr+Q1_360_SIM_BR0,0);
- eieio();
- write32(baseaddr+Q1_360_SIM_OR1,(0x5ff00000 | 0x00000780)); /*| MEMC_OR_FC*/
- eieio();
- write32(baseaddr+Q1_360_SIM_BR1,(0x00000040 | 0x00000001 | 0x00200280) );
- eieio();
- }
-
- /*
- * If a second PCI window is present then make it opposite
- * endian to simplify 1553 integration.
- */
- pci_read_config_dword(busNo, slotNo, 0, PCI_BASE_ADDRESS_3, &temp);
- if (temp) {
- *(unsigned long *)(bridgeaddr + 0x110) |= 0x00500880;
- }
-
- /*
- * Create descriptor structure for this card
- */
- if ((boardData = malloc(sizeof(struct _PMCQ1BoardData))) == NULL)
- {
- printk("Error Unable to allocate memory for _PMCQ1BoardData\n");
- return(RTEMS_IO_ERROR);
- }
-
- boardData->pNext = pmcq1BoardData;
- boardData->busNo = busNo;
- boardData->slotNo = slotNo;
- boardData->funcNo = 0;
- boardData->baseaddr = baseaddr;
- boardData->bridgeaddr = bridgeaddr;
- boardData->quiccInt = NULL;
- boardData->maInt = NULL;
- pmcq1BoardData = boardData;
- mc68360_scc_create_chip( boardData, int_vector );
-
- /*
- * Connect PMCQ1 interrupt handler.
- */
- pci_read_config_byte(busNo, slotNo, 0, 0x3c, &int_vector);
-#ifdef DEBUG_360
- printk("PMCQ1 int_vector %d\n", int_vector);
-#endif
- IrqData.name = ((unsigned int)BSP_PCI_IRQ0 + int_vector);
- IrqData.handle = boardData;
- if (!BSP_install_rtems_shared_irq_handler (&IrqData)) {
- printk("Error installing interrupt handler!\n");
- rtems_fatal_error_occurred(1);
- }
-
- /*
- * Enable PMCQ1 Interrupts from QSPAN-II
- */
-
- *(unsigned long *)(bridgeaddr + 0x600) = 0x00001000;
- eieio();
- *(unsigned long *)(bridgeaddr + 0x604) |= 0x00001000;
-
- eieio();
- }
-
- if (i > 0)
- {
- rsPMCQ1Initialized = TRUE;
- }
- return((i > 0) ? RTEMS_SUCCESSFUL : RTEMS_IO_ERROR);
-}
-
-uint32_t PMCQ1_Read_EPLD( uint32_t base, uint32_t reg )
-{
- uint32_t data;
-
- data = ( *((unsigned long *) (base + reg)) );
-#ifdef DEBUG_360
- printk("EPLD Read 0x%x: 0x%08x\n", reg + base, data );
-#endif
- return data;
-}
-
-void PMCQ1_Write_EPLD( uint32_t base, uint32_t reg, uint32_t data )
-{
- *((unsigned long *) (base + reg)) = data;
-#ifdef DEBUG_360
- printk("EPLD Write 0x%x: 0x%08x\n", reg+base, data );
-#endif
-}
-
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/rsPMCQ1.h b/c/src/lib/libbsp/powerpc/ep1a/console/rsPMCQ1.h
deleted file mode 100644
index c0c0924766..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/console/rsPMCQ1.h
+++ /dev/null
@@ -1,163 +0,0 @@
-/* rsPMCQ1.h - Radstone PMCQ1 private header
- *
- * Copyright 2000 Radstone Technology
- *
- * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
- * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
- * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
- *
- * You are hereby granted permission to use, copy, modify, and distribute
- * this file, provided that this notice, plus the above copyright notice
- * and disclaimer, appears in all copies. Radstone Technology will provide
- * no support for this code.
- *
- * COPYRIGHT (c) 2005.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- *
- */
-
-#include <libcpu/io.h>
-#include <bsp/irq.h>
-
-/*
- modification history
- --------------------
- 01a,20Dec00,jpb created
- */
-
-#ifndef __INCPMCQ1H
-#define __INCPMCQ1H
-
-/*
- * PMCQ1 definitions
- */
-
-/*
- * 360 definitions
- */
-
-#define Q1_360_MBAR 0x0003ff00 /* master base address register */
-
-#define REG_B_OFFSET 0x1000 /* offset to the internal registers */
-
-#define Q1_360_SIM_MCR (REG_B_OFFSET+0x00)
-#define Q1_360_SIM_PEPAR (REG_B_OFFSET+0x16)
-#define Q1_360_SIM_SYPCR (REG_B_OFFSET+0x22)
-#define Q1_360_SIM_PICR (REG_B_OFFSET+0x26)
-#define Q1_360_SIM_PITR (REG_B_OFFSET+0x2A)
-#define Q1_360_SIM_GMR (REG_B_OFFSET+0x40)
-#define Q1_360_SIM_BR0 (REG_B_OFFSET+0x50)
-#define Q1_360_SIM_OR0 (REG_B_OFFSET+0x54)
-#define Q1_360_SIM_BR1 (REG_B_OFFSET+0x60)
-#define Q1_360_SIM_OR1 (REG_B_OFFSET+0x64)
-
-#define Q1_360_CPM_ICCR (REG_B_OFFSET+0x500)
-#define Q1_360_CPM_SDCR (REG_B_OFFSET+0x51E)
-#define Q1_360_CPM_CICR (REG_B_OFFSET+0x540)
-
-/*
- * EPLD offsets
- *
- * Only top 4 data bits are used
- */
-#define PMCQ1_CODE_VERSION 0x00040000 /* Code Version */
-
-#define PMCQ1_BOARD_REVISION 0x00040004 /* Board Revision */
-
-#define PMCQ1_BUILD_OPTION 0x00040008 /* Build Option */
-#define PMCQ1_ACE_FITTED 0x80000000
-#define PMCQ1_QUICC_FITTED 0x40000000
-#define PMCQ1_SRAM_SIZE 0x30000000 /* 01 - 1MB */
-#define PMCQ1_SRAM_FITTED 0x20000000
-
-#define PMCQ1_INT_STATUS 0x0004000c /* Interrupt Status */
-#define PMCQ1_INT_STATUS_MA 0x20000000
-#define PMCQ1_INT_STATUS_QUICC 0x10000000
-
-#define PMCQ1_INT_MASK 0x00040010 /* Interrupt Mask */
-#define PMCQ1_INT_MASK_QUICC 0x20000000
-#define PMCQ1_INT_MASK_MA 0x10000000
-
-#define PMCQ1_RT_ADDRESS 0x00040014 /* RT Address Latch */
-
-#define PMCQ1_DRIVER_ENABLE 0x0004001c /* Channel Drive Enable */
-#define PMCQ1_DRIVER_ENABLE_3 0x80000000
-#define PMCQ1_DRIVER_ENABLE_2 0x40000000
-#define PMCQ1_DRIVER_ENABLE_1 0x20000000
-#define PMCQ1_DRIVER_ENABLE_0 0x10000000
-
-#define PMCQ1_MINIACE_REGS 0x000c0000
-#define PMCQ1_MINIACE_MEM 0x00100000
-#define PMCQ1_RAM 0x00200000
-
-/*
-#define PMCQ1_Read_EPLD( _base, _reg ) ( *((unsigned long *) ((unsigned32)_base + _reg)) )
-#define PMCQ1_Write_EPLD( _base, _reg, _data ) *((unsigned long *) ((unsigned32)_base + _reg)) = _data
-*/
-uint32_t PMCQ1_Read_EPLD( uint32_t base, uint32_t reg );
-void PMCQ1_Write_EPLD( uint32_t base, uint32_t reg, uint32_t data );
-
-/*
- * QSPAN-II register offsets
- */
-
-#define QSPAN2_INT_STATUS 0x00000600
-
-typedef void (*FUNCTION_PTR) (int);
-
-#define PCI_ID(v, d) ((d << 16) | v)
-
-
-#define PCI_VEN_ID_RADSTONE 0x11b5
-#define PCI_DEV_ID_PMC1553 0x0001
-#define PCI_DEV_ID_PMCF1 0x0002
-#define PCI_DEV_ID_PMCMMA 0x0003
-#define PCI_DEV_ID_PMCQ1 0x0007
-#define PCI_DEV_ID_PMCQ2 0x0008
-#define PCI_DEV_ID_PMCF1V2 0x0012
-
-
-
-typedef struct _PMCQ1BoardData
-{
- struct _PMCQ1BoardData *pNext;
- unsigned long busNo;
- unsigned long slotNo;
- unsigned long funcNo;
- unsigned long baseaddr;
- unsigned long bridgeaddr;
- FUNCTION_PTR quiccInt;
- uintptr_t quiccArg;
- FUNCTION_PTR maInt;
- uintptr_t maArg;
-} PMCQ1BoardData, *PPMCQ1BoardData;
-
-extern PPMCQ1BoardData pmcq1BoardData;
-
-/*
- * Function declarations
- */
-extern unsigned int rsPMCQ1QuiccIntConnect(
- unsigned long busNo,
- unsigned long slotNo,
- unsigned long funcNo,
- FUNCTION_PTR routine,
- uintptr_t arg
-);
-
-unsigned int rsPMCQ1Init(void);
-
-unsigned int rsPMCQ1MaIntConnect (
- unsigned long busNo, /* Pci Bus number of PMCQ1 */
- unsigned long slotNo, /* Pci Slot number of PMCQ1 */
- unsigned long funcNo, /* Pci Function number of PMCQ1 */
- FUNCTION_PTR routine,/* interrupt routine */
- uintptr_t arg /* argument to pass to interrupt routine */
-);
-
-#endif /* __INCPMCQ1H */
diff --git a/c/src/lib/libbsp/powerpc/ep1a/include/bsp.h b/c/src/lib/libbsp/powerpc/ep1a/include/bsp.h
deleted file mode 100644
index d989785a7d..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/include/bsp.h
+++ /dev/null
@@ -1,209 +0,0 @@
-/*
- * COPYRIGHT (c) 1989-2008.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_POWERPC_EP1A_BSP_H
-#define LIBBSP_POWERPC_EP1A_BSP_H
-
-#include <bspopts.h>
-#include <bsp/default-initial-extension.h>
-
-#include <rtems.h>
-#include <rtems/console.h>
-#include <libcpu/io.h>
-#include <rtems/clockdrv.h>
-#include <bsp/vectors.h>
-
-/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
-#define _IO_BASE CHRP_ISA_IO_BASE
-#define _ISA_MEM_BASE CHRP_ISA_MEM_BASE
-/* address of our ram on the PCI bus */
-#define PCI_DRAM_OFFSET CHRP_PCI_DRAM_OFFSET
-#define PCI_MEM_BASE 0x80000000
-#define PCI_MEM_BASE_ADJUSTMENT 0
-/* address of our ram on the PCI bus */
-#define PCI_DRAM_OFFSET CHRP_PCI_DRAM_OFFSET
-
-/* offset of pci memory as seen from the CPU */
-#undef PCI_MEM_BASE
-#define PCI_MEM_BASE 0x00000000
-
-/* Override the default values for the following DEFAULT */
-#define PCI_CONFIG_ADDR 0xfec00000 /* 0xcf8 */
-#define PCI_CONFIG_DATA 0xfee00000 /* 0xcfc */
-
-/*
- * EP1A configuration Registers.
- * Note: All addresses assume flash boot.
- */
-
-#define EQUIPMENT_PRESENT_REGISTER1 ((volatile unsigned char *)0xffa00000)
-#define EQUIPMENT_PRESENT_REGISTER2 ((volatile unsigned char *)0xffa00008)
-#define BOARD_REVISION_REGISTER1 ((volatile unsigned char *)0xffa00010)
-#define BOARD_REVISION_REGISTER2 ((volatile unsigned char *)0xffa00018)
-#define GENERAL_REGISTER1 ((volatile unsigned char *)0xffa00020)
-#define GENERAL_REGISTER2 ((volatile unsigned char *)0xffa00028)
-#define WATCHDOG_TRIGGER ((volatile unsigned char *)0xffa00030)
-
-/* EQUIPMENT_PRESENT_REGISTER1 */
-#define BANK_MEMORY_SIZE_128MB 0x20
-#define BANK_MEMORY_SIZE_64MB 0x10
-#define ECC_ENABLED 0x04
-
-/* EQUIPMENT-PRESENT_REGISTER2 */
-#define PLL_CFG_MASK 0xf8
-#define MHZ_33_66_200 0x70 /* PCI MEM CPU Frequency */
-#define MHZ_33_100_200 0x80 /* PCI MEM CPU Frequency */
-#define MHZ_33_66_266 0xb0 /* PCI MEM CPU Frequency */
-#define MHZ_33_66_333 0x50 /* PCI MEM CPU Frequency */
-#define MHZ_33_100_333 0x08 /* PCI MEM CPU Frequency */
-#define MHZ_33_100_350 0x78 /* PCI MEM CPU Frequency */
-
-#define PMC_SLOT1_PRESENT 0x02
-#define PMC_SLOT2_PRESENT 0x01
-
-/* BOARD_REVISION_REGISTER1 */
-#define ARTWORK_REVISION_MASK 0xf0
-#define BUILD_REVISION_MASK 0x0f
-
-/* BOARD_REVISION_REGISTER2 */
-#define HARDWARE_ID_MASK 0xe0
-#define HARDWARE_ID_PPC5_EP1A 0xe0
-#define HARDWARE_ID_EP1B 0xc0
-
-/* GENERAL_REGISTER1 */
-#define DISABLE_WATCHDOG 0x80
-#define DISABLE_RESET_SWITCH 0x40
-#define DISABLE_USER_FLASH 0x20
-#define DISABLE_BOOT_FLASH 0x10
-#define LED4_OFF 0x08
-#define LED3_OFF 0x04
-#define LED2_OFF 0x02
-#define LED1_OFF 0x01
-
-
-/* GENERAL_REGISTER2 */
-#define BSP_FLASH_VPP_ENABLE 0x01
-#define BSP_FLASH_PAGE_MASK 0x38
-#define BSP_FLASH_PAGE_SHIFT 0x03
-#define BSP_BIT_SLOWSTART 0x04
-#define BSP_OFFLINE 0x02
-#define BSP_SYSFAIL 0x01
-
-/* WATCHDOG_TRIGGER */
-#define BSP_FLASH_BASE 0xff000000
-#define BSP_VME_A16_BASE 0x9fff0000
-#define BSP_VME_A24_BASE 0x9f000000
-
-/*
- * address definitions for several devices
- *
- */
-#define UART_OFFSET_1_8245 (0x04500)
-#define UART_OFFSET_2_8245 (0x04600)
-#define UART_BASE_COM1 0xff800000
-#define UART_BASE_COM2 0xff800040
-
-#include <bsp/openpic.h>
-
-/* Note docs list 0x41000 but OpenPIC has a 0x1000 pad at the start
- * assume that open pic specifies this pad but not mentioned in
- * 8245 docs.
- * This is an offset from EUMBBAR
- */
-#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
-
-/* BSP_PIC_DO_EOI is optionally used by the 'vmeUniverse' driver
- * to implement VME IRQ priorities in software.
- * Note that this requires support by the interrupt controller
- * driver (cf. libbsp/shared/powerpc/irq/openpic_i8259_irq.c)
- * and the BSP-specific universe initialization/configuration
- * (cf. libbsp/shared/powerpc/vme/VMEConfig.h vme_universe.c)
- *
- * ********* IMPORTANT NOTE ********
- * When deriving from this file (new BSPs)
- * DO NOT define "BSP_PIC_DO_EOI" if you don't know what
- * you are doing i.e., w/o implementing the required pieces
- * mentioned above.
- * ********* IMPORTANT NOTE ********
- */
-#define BSP_PIC_DO_EOI openpic_eoi(0)
-
-
-#ifndef ASM
-#define outport_byte(port,value) outb(value,port)
-#define outport_word(port,value) outw(value,port)
-#define outport_long(port,value) outl(value,port)
-
-#define inport_byte(port,value) (value = inb(port))
-#define inport_word(port,value) (value = inw(port))
-#define inport_long(port,value) (value = inl(port))
-
-/*
- * EUMMBAR
- */
-extern unsigned int EUMBBAR;
-
-/*
- * Total memory
- */
-extern unsigned int BSP_mem_size;
-
-/*
- * PCI Bus Frequency
- */
-extern unsigned int BSP_bus_frequency;
-
-/*
- * processor clock frequency
- */
-extern unsigned int BSP_processor_frequency;
-
-/*
- * Time base divisior (how many tick for 1 second).
- */
-extern unsigned int BSP_time_base_divisor;
-
-#define BSP_Convert_decrementer( _value ) \
- ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
-
-#define Processor_Synchronize() \
- __asm__ (" eieio ")
-
-extern void BSP_panic(char *s);
-extern int BSP_disconnect_clock_handler (void);
-extern int BSP_connect_clock_handler (void);
-
-/*
- * FLASH
- */
-int BSP_FLASH_Enable_writes( uint32_t area );
-int BSP_FLASH_Disable_writes( uint32_t area );
-void BSP_FLASH_set_page( uint8_t page );
-
-#define BSP_FLASH_ENABLE_WRITES( _area) BSP_FLASH_Enable_writes( _area )
-#define BSP_FLASH_DISABLE_WRITES(_area) BSP_FLASH_Disable_writes( _area )
-#define BSP_FLASH_SET_PAGE(_page) BSP_FLASH_set_page( _page )
-
-/* clear hostbridge errors
- *
- * enableMCP: whether to enable MCP checkstop / machine check interrupts
- * on the hostbridge and in HID0.
- *
- * NOTE: HID0 and MEREN are left alone if this flag is 0
- *
- * quiet : be silent
- *
- * RETURNS : raven MERST register contents (lowermost 16 bits), 0 if
- * there were no errors
- */
-extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
-
-#endif
-
-#endif
diff --git a/c/src/lib/libbsp/powerpc/ep1a/include/tm27.h b/c/src/lib/libbsp/powerpc/ep1a/include/tm27.h
deleted file mode 100644
index 8f819a5d5c..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/include/tm27.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * @file
- * @ingroup powerpc_ep1a
- * @brief Implementations for interrupt mechanisms for Time Test 27
- */
-
-/*
- * COPYRIGHT (c) 1989-2014.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef _RTEMS_TMTEST27
-#error "This is an RTEMS internal file you must not include directly."
-#endif
-
-#ifndef __tm27_h
-#define __tm27_h
-
-#include <bsp/irq.h>
-
-#define MUST_WAIT_FOR_INTERRUPT 1
-
-void nullFunc() {}
-
-static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER,
- 0,
- (rtems_irq_enable)nullFunc,
- (rtems_irq_disable)nullFunc,
- (rtems_irq_is_enabled) nullFunc};
-void Install_tm27_vector(void (*_handler)())
-{
- clockIrqData.hdl = _handler;
- if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
- printk("Error installing clock interrupt handler!\n");
- rtems_fatal_error_occurred(1);
- }
-}
-
-#define Cause_tm27_intr() \
- do { \
- uint32_t _clicks = 8; \
- __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
- } while (0)
-
-
-#define Clear_tm27_intr() \
- do { \
- uint32_t _clicks = 0xffffffff; \
- __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
- } while (0)
-
-#define Lower_tm27_intr() \
- do { \
- uint32_t _msr = 0; \
- _ISR_Set_level( 0 ); \
- __asm__ volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
- _msr |= 0x8002; \
- __asm__ volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
- } while (0)
-#endif
diff --git a/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c b/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c
deleted file mode 100644
index cba05a4e31..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c
+++ /dev/null
@@ -1,216 +0,0 @@
-/*
- * This file contains the implementation of rtems initialization
- * related to interrupt handling.
- */
-
-/*
- * CopyRight (C) 1999 valette@crf.canon.fr
- *
- * Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com>
- * to make it valid for MVME2300 Motorola boards.
- *
- * Till Straumann <strauman@slac.stanford.edu>, 12/20/2001:
- * Use the new interface to openpic_init
- *
- * COPYRIGHT (c) 1989-2008.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <libcpu/io.h>
-#include <libcpu/spr.h>
-#include <bsp/pci.h>
-#include <bsp/residual.h>
-#include <bsp/openpic.h>
-#include <bsp/irq.h>
-#include <bsp.h>
-#include <bsp/vectors.h>
-#include <bsp/motorola.h>
-#include <rtems/bspIo.h>
-
-/*
-#define SHOW_ISA_PCI_BRIDGE_SETTINGS
-*/
-#define TRACE_IRQ_INIT
-
-static void IRQ_Default_rtems_irq_hdl(
- rtems_irq_hdl_param ptr
-)
-{
-}
-
-static void IRQ_Default_rtems_irq_enable(
- const struct __rtems_irq_connect_data__ *ptr
-)
-{
-}
-
-static void IRQ_Default_rtems_irq_disable(
- const struct __rtems_irq_connect_data__ *ptr
-)
-{
-}
-
-static int IRQ_Default_rtems_irq_is_enabled(
- const struct __rtems_irq_connect_data__ *ptr)
-{
- return 1;
-}
-
-static rtems_irq_connect_data rtemsIrq[BSP_IRQ_NUMBER];
-static rtems_irq_global_settings initial_config;
-
-static rtems_irq_connect_data defaultIrq = {
- .name = 0,
- .hdl = IRQ_Default_rtems_irq_hdl,
- .handle = NULL,
- .on = IRQ_Default_rtems_irq_enable,
- .on = IRQ_Default_rtems_irq_disable,
- .isOn = IRQ_Default_rtems_irq_is_enabled
-};
-
-static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={
- /*
- * actual rpiorities for interrupt :
- * 0 means that only current interrupt is masked
- * 255 means all other interrupts are masked
- */
- /*
- * ISA interrupts.
- * The second entry has a priority of 255 because
- * it is the slave pic entry and is should always remain
- * unmasked.
- */
- 0,0,
- 255,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- /*
- * PCI Interrupts
- */
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, /* for raven prio 0 means unactive... */
- /*
- * Processor exceptions handled as interrupts
- */
- 0
-};
-
-static unsigned char mcp750_openpic_initpolarities[] = {
- 1, /* 0 8259 cascade */
- 0, /* 1 all the rest of them */
- 0, /* 2 all the rest of them */
- 0, /* 3 all the rest of them */
- 0, /* 4 all the rest of them */
- 0, /* 5 all the rest of them */
- 0, /* 6 all the rest of them */
- 0, /* 7 all the rest of them */
- 0, /* 8 all the rest of them */
- 0, /* 9 all the rest of them */
- 0, /* 10 all the rest of them */
- 0, /* 11 all the rest of them */
- 0, /* 12 all the rest of them */
- 0, /* 13 all the rest of them */
- 0, /* 14 all the rest of them */
- 0, /* 15 all the rest of them */
- 0, /* 16 all the rest of them */
- 0, /* 17 all the rest of them */
- 1, /* 18 all the rest of them */
- 1, /* 19 all the rest of them */
- 1, /* 20 all the rest of them */
- 1, /* 21 all the rest of them */
- 1, /* 22 all the rest of them */
- 1, /* 23 all the rest of them */
- 1, /* 24 all the rest of them */
- 1, /* 25 all the rest of them */
-};
-
-static unsigned char mcp750_openpic_initsenses[] = {
- 1, /* 0 MCP750_INT_PCB(8259) */
- 0, /* 1 MCP750_INT_FALCON_ECC_ERR */
- 1, /* 2 MCP750_INT_PCI_ETHERNET */
- 1, /* 3 MCP750_INT_PCI_PMC */
- 1, /* 4 MCP750_INT_PCI_WATCHDOG_TIMER1 */
- 1, /* 5 MCP750_INT_PCI_PRST_SIGNAL */
- 1, /* 6 MCP750_INT_PCI_FALL_SIGNAL */
- 1, /* 7 MCP750_INT_PCI_DEG_SIGNAL */
- 1, /* 8 MCP750_INT_PCI_BUS1_INTA */
- 1, /* 9 MCP750_INT_PCI_BUS1_INTB */
- 1, /*10 MCP750_INT_PCI_BUS1_INTC */
- 1, /*11 MCP750_INT_PCI_BUS1_INTD */
- 1, /*12 MCP750_INT_PCI_BUS2_INTA */
- 1, /*13 MCP750_INT_PCI_BUS2_INTB */
- 1, /*14 MCP750_INT_PCI_BUS2_INTC */
- 1, /*15 MCP750_INT_PCI_BUS2_INTD */
- 1,
- 1,
- 1,
- 1,
- 1,
- 1,
- 1,
- 1,
- 1,
- 1
-};
-
- /*
- * This code assumes the exceptions management setup has already
- * been done. We just need to replace the exceptions that will
- * be handled like interrupt. On mcp750/mpc750 and many PPC processors
- * this means the decrementer exception and the external exception.
- */
-void BSP_rtems_irq_mng_init(unsigned cpuId)
-{
- int i;
-
- /*
- * First initialize the Interrupt management hardware
- */
-#ifdef TRACE_IRQ_INIT
- printk("Going to initialize openpic compliant device\n");
-#endif
- /* FIXME (t.s.): we should probably setup the EOI delay by
- * passing a non-zero 'epic_freq' argument (frequency of the
- * EPIC serial interface) but I don't know the value on this
- * board (8245 SDRAM freq, IIRC)...
- */
- openpic_init(1, mcp750_openpic_initpolarities, mcp750_openpic_initsenses, 0, 16, 0 /* epic_freq */);
-
-#ifdef TRACE_IRQ_INIT
- printk("Going to initialize the PCI/ISA bridge IRQ related setting (VIA 82C586)\n");
-#endif
-
- /*
- * Initialize Rtems management interrupt table
- */
- /*
- * re-init the rtemsIrq table
- */
- for (i = 0; i < BSP_IRQ_NUMBER; i++) {
- rtemsIrq[i] = defaultIrq;
- rtemsIrq[i].name = i;
- }
- /*
- * Init initial Interrupt management config
- */
- initial_config.irqNb = BSP_IRQ_NUMBER;
- initial_config.defaultEntry = defaultIrq;
- initial_config.irqHdlTbl = rtemsIrq;
- initial_config.irqBase = BSP_LOWEST_OFFSET;
- initial_config.irqPrioTbl = irqPrioTable;
-
-printk("Call BSP_rtems_irq_mngt_set\n");
- if (!BSP_rtems_irq_mngt_set(&initial_config)) {
- /*
- * put something here that will show the failure...
- */
- BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
- }
-
-#ifdef TRACE_IRQ_INIT
- printk("RTEMS IRQ management is now operationnal\n");
-#endif
-}
-
diff --git a/c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c b/c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c
deleted file mode 100644
index 23b1ce24e5..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/irq/openpic_xxx_irq.c
+++ /dev/null
@@ -1,234 +0,0 @@
-/*
- * This file contains the i8259/openpic-specific implementation of
- * the function described in irq.h
- *
- * Copyright (C) 1998, 1999 valette@crf.canon.fr
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <stdlib.h>
-
-#include <bsp.h>
-#include <bsp/irq.h>
-#include <bsp/irq_supp.h>
-#include <bsp/VMEConfig.h>
-#include <bsp/openpic.h>
-#include <libcpu/io.h>
-#include <bsp/vectors.h>
-#include <stdlib.h>
-
-#include <rtems/bspIo.h> /* for printk */
-#define RAVEN_INTR_ACK_REG 0xfeff0030
-
-#ifdef BSP_PCI_ISA_BRIDGE_IRQ
-/*
- * pointer to the mask representing the additionnal irq vectors
- * that must be disabled when a particular entry is activated.
- * They will be dynamically computed from the priority table given
- * in BSP_rtems_irq_mngt_set();
- * CAUTION : this table is accessed directly by interrupt routine
- * prologue.
- */
-rtems_i8259_masks irq_mask_or_tbl[BSP_IRQ_NUMBER];
-#endif
-
-/*
- * default handler connected on each irq after bsp initialization
- */
-static rtems_irq_connect_data default_rtems_entry;
-
-static rtems_irq_connect_data* rtems_hdl_tbl;
-
-#ifdef BSP_PCI_ISA_BRIDGE_IRQ
-/*
- * Check if IRQ is an ISA IRQ
- */
-static inline int is_isa_irq(const rtems_irq_number irqLine)
-{
- return (((int) irqLine <= BSP_ISA_IRQ_MAX_OFFSET) &
- ((int) irqLine >= BSP_ISA_IRQ_LOWEST_OFFSET)
- );
-}
-#endif
-
-/*
- * Check if IRQ is an OPENPIC IRQ
- */
-static inline int is_pci_irq(const rtems_irq_number irqLine)
-{
- return (((int) irqLine <= BSP_PCI_IRQ_MAX_OFFSET) &
- ((int) irqLine >= BSP_PCI_IRQ_LOWEST_OFFSET)
- );
-}
-
-/*
- * ------------------------ RTEMS Irq helper functions ----------------
- */
-void
-BSP_enable_irq_at_pic(const rtems_irq_number name)
-{
-#ifdef BSP_PCI_ISA_BRIDGE_IRQ
- if (is_isa_irq(name)) {
- /*
- * Enable interrupt at PIC level
- */
-printk("ERROR BSP_irq_enable_at_i8259s Being Called for %d\n", (int)name);
- BSP_irq_enable_at_i8259s ((int) name);
- }
-#endif
-
- if (is_pci_irq(name)) {
- /*
- * Enable interrupt at OPENPIC level
- */
-printk(" openpic_enable_irq %d\n", (int)name );
- openpic_enable_irq ((int) name);
- }
-}
-
-int
-BSP_disable_irq_at_pic(const rtems_irq_number name)
-{
-#ifdef BSP_PCI_ISA_BRIDGE_IRQ
- if (is_isa_irq(name)) {
- /*
- * disable interrupt at PIC level
- */
- return BSP_irq_disable_at_i8259s ((int) name);
- }
-#endif
- if (is_pci_irq(name)) {
- /*
- * disable interrupt at OPENPIC level
- */
- return openpic_disable_irq ((int) name );
- }
- return -1;
-}
-
-/*
- * RTEMS Global Interrupt Handler Management Routines
- */
-int BSP_setup_the_pic(rtems_irq_global_settings* config)
-{
- int i;
- /*
- * Store various code accelerators
- */
- default_rtems_entry = config->defaultEntry;
- rtems_hdl_tbl = config->irqHdlTbl;
-
- /*
- * continue with PCI IRQ
- */
- for (i=BSP_PCI_IRQ_LOWEST_OFFSET; i < BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER ; i++) {
- /*
- * Note that openpic_set_priority() sets the TASK priority of the PIC
- */
- openpic_set_source_priority(i - BSP_PCI_IRQ_LOWEST_OFFSET,
- config->irqPrioTbl[i]);
- if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
- openpic_enable_irq ((int) i );
- }
- else {
- openpic_disable_irq ((int) i );
- }
- }
-
-#ifdef BSP_PCI_ISA_BRIDGE_IRQ
- if ( BSP_ISA_IRQ_NUMBER > 0 ) {
- /*
- * Must enable PCI/ISA bridge IRQ
- */
- openpic_enable_irq (0);
- }
-#endif
-
- return 1;
-}
-
-int _BSP_vme_bridge_irq = -1;
-
-unsigned BSP_spuriousIntr = 0;
-
-/*
- * High level IRQ handler called from shared_raw_irq_code_entry
- */
-int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum)
-{
- register unsigned int irq;
-#ifdef BSP_PCI_ISA_BRIDGE_IRQ
- register unsigned isaIntr; /* boolean */
- register unsigned oldMask = 0; /* old isa pic masks */
- register unsigned newMask; /* new isa pic masks */
-#endif
-
- if (excNum == ASM_DEC_VECTOR) {
-/* printk("ASM_DEC_VECTOR\n"); */
- bsp_irq_dispatch_list(rtems_hdl_tbl, BSP_DECREMENTER, default_rtems_entry.hdl);
-
- return 0;
-
- }
- irq = openpic_irq(0);
- if (irq == OPENPIC_VEC_SPURIOUS) {
-/* printk("OPENPIC_VEC_SPURIOUS interrupt %d\n", OPENPIC_VEC_SPURIOUS ); */
- ++BSP_spuriousIntr;
- return 0;
- }
-
- /* some BSPs might want to use a different numbering... */
- irq = irq - OPENPIC_VEC_SOURCE + BSP_PCI_IRQ_LOWEST_OFFSET;
-/* printk("OpenPic Irq: %d\n", irq); */
-
-#ifdef BSP_PCI_ISA_BRIDGE_IRQ
- isaIntr = (irq == BSP_PCI_ISA_BRIDGE_IRQ);
- if (isaIntr) {
-/* printk("BSP_PCI_ISA_BRIDGE_IRQ\n"); */
- /*
- * Acknowledge and read 8259 vector
- */
- irq = (unsigned int) (*(unsigned char *) RAVEN_INTR_ACK_REG);
- /*
- * store current PIC mask
- */
- oldMask = i8259s_cache;
- newMask = oldMask | irq_mask_or_tbl [irq];
- i8259s_cache = newMask;
- outport_byte(PIC_MASTER_IMR_IO_PORT, i8259s_cache & 0xff);
- outport_byte(PIC_SLAVE_IMR_IO_PORT, ((i8259s_cache & 0xff00) >> 8));
- BSP_irq_ack_at_i8259s (irq);
- openpic_eoi(0);
- }
-#endif
-
-
- /* dispatch handlers */
-/* printk("dispatch\n"); */
-irq -=16;
- bsp_irq_dispatch_list(rtems_hdl_tbl, irq, default_rtems_entry.hdl);
-/* printk("Back from dispatch\n"); */
-
-#ifdef BSP_PCI_ISA_BRIDGE_IRQ
- if (isaIntr) {\
- i8259s_cache = oldMask;
- outport_byte(PIC_MASTER_IMR_IO_PORT, i8259s_cache & 0xff);
- outport_byte(PIC_SLAVE_IMR_IO_PORT, ((i8259s_cache & 0xff00) >> 8));
- }
- else
-#endif
- {
-#ifdef BSP_PCI_VME_DRIVER_DOES_EOI
- /* leave it to the VME bridge driver to do EOI, so
- * it can re-enable the openpic while handling
- * VME interrupts (-> VME priorities in software)
- */
- if (_BSP_vme_bridge_irq != irq)
-#endif
- openpic_eoi(0);
- }
- return 0;
-}
diff --git a/c/src/lib/libbsp/powerpc/ep1a/make/custom/ep1a.cfg b/c/src/lib/libbsp/powerpc/ep1a/make/custom/ep1a.cfg
deleted file mode 100644
index 2b2c2d29eb..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/make/custom/ep1a.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Config file for the Radstone PowerPC 8245 ep1a
-#
-#
-
-include $(RTEMS_ROOT)/make/custom/default.cfg
-
-RTEMS_CPU=powerpc
-RTEMS_CPU_MODEL=mpc8245
-
-# This contains the compiler options necessary to select the CPU model
-# and (hopefully) optimize for it.
-#
-CPU_CFLAGS = -mcpu=603e -Dppc603e -mmultiple -mstring -mstrict-align
-
-# optimize flag: typically -O2
-CFLAGS_OPTIMIZE_V = -O2 -g
diff --git a/c/src/lib/libbsp/powerpc/ep1a/pci/no_host_bridge.c b/c/src/lib/libbsp/powerpc/ep1a/pci/no_host_bridge.c
deleted file mode 100644
index 123f793056..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/pci/no_host_bridge.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * COPYRIGHT (c) 1989-2008.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <libcpu/io.h>
-#include <libcpu/spr.h>
-
-#include <bsp.h>
-#include <bsp/pci.h>
-#include <bsp/consoleIo.h>
-#include <bsp/residual.h>
-#include <bsp/openpic.h>
-
-#include <rtems/bspIo.h>
-
-/*
- * For the 8240 and the 8245 there is no host bridge the
- * Open PIC device is built into the processor chip.
- */
-void detect_host_bridge(void)
-{
- OpenPIC=(volatile struct OpenPIC *) (EUMBBAR + BSP_OPEN_PIC_BASE_OFFSET );
-}
diff --git a/c/src/lib/libbsp/powerpc/ep1a/preinstall.am b/c/src/lib/libbsp/powerpc/ep1a/preinstall.am
deleted file mode 100644
index 88a9e135fa..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/preinstall.am
+++ /dev/null
@@ -1,143 +0,0 @@
-## Automatically generated by ampolish3 - Do not edit
-
-if AMPOLISH3
-$(srcdir)/preinstall.am: Makefile.am
- $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
-endif
-
-PREINSTALL_DIRS =
-DISTCLEANFILES += $(PREINSTALL_DIRS)
-
-all-am: $(PREINSTALL_FILES)
-
-PREINSTALL_FILES =
-CLEANFILES = $(PREINSTALL_FILES)
-
-all-local: $(TMPINSTALL_FILES)
-
-TMPINSTALL_FILES =
-CLEANFILES += $(TMPINSTALL_FILES)
-
-$(PROJECT_LIB)/$(dirstamp):
- @$(MKDIR_P) $(PROJECT_LIB)
- @: > $(PROJECT_LIB)/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
-
-$(PROJECT_INCLUDE)/$(dirstamp):
- @$(MKDIR_P) $(PROJECT_INCLUDE)
- @: > $(PROJECT_INCLUDE)/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
-
-$(PROJECT_INCLUDE)/bsp/$(dirstamp):
- @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
- @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-
-$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
-PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
-
-$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
-
-$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
-
-$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
-
-$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
-
-$(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
-
-$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
-PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
-
-$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
-TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
-
-$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
-TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
-
-$(PROJECT_INCLUDE)/bsp/uart.h: ../../powerpc/shared/console/uart.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart.h
-
-$(PROJECT_INCLUDE)/bsp/motorola.h: ../../powerpc/shared/motorola/motorola.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/motorola.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/motorola.h
-
-$(PROJECT_INCLUDE)/bsp/residual.h: ../../powerpc/shared/residual/residual.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/residual.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/residual.h
-
-$(PROJECT_INCLUDE)/bsp/pnp.h: ../../powerpc/shared/residual/pnp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pnp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pnp.h
-
-$(PROJECT_INCLUDE)/bsp/consoleIo.h: ../../powerpc/shared/console/consoleIo.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/consoleIo.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/consoleIo.h
-
-$(PROJECT_INCLUDE)/bsp/rsPMCQ1.h: console/rsPMCQ1.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/rsPMCQ1.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/rsPMCQ1.h
-
-$(PROJECT_INCLUDE)/bsp/console_private.h: ../../shared/console_private.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/console_private.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/console_private.h
-
-$(PROJECT_INCLUDE)/bsp/openpic.h: ../../powerpc/shared/openpic/openpic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/openpic.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/openpic.h
-
-$(PROJECT_INCLUDE)/bsp/pci.h: ../../powerpc/shared/pci/pci.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pci.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pci.h
-
-$(PROJECT_INCLUDE)/bsp/irq.h: ../../powerpc/shared/irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
-
-$(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
-
-$(PROJECT_INCLUDE)/bsp/vmeUniverse.h: ../../shared/vmeUniverse/vmeUniverse.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeUniverse.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeUniverse.h
-
-$(PROJECT_INCLUDE)/bsp/VMEConfig.h: vme/VMEConfig.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEConfig.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEConfig.h
-
-$(PROJECT_INCLUDE)/bsp/vme_am_defs.h: ../../shared/vmeUniverse/vme_am_defs.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vme_am_defs.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vme_am_defs.h
-
-$(PROJECT_INCLUDE)/bsp/VME.h: ../../shared/vmeUniverse/VME.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VME.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VME.h
-
-$(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h: ../../shared/vmeUniverse/vmeUniverseDMA.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h
-
-$(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h: ../../shared/vmeUniverse/bspVmeDmaList.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h
-
-$(PROJECT_INCLUDE)/bsp/VMEDMA.h: ../../shared/vmeUniverse/VMEDMA.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEDMA.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEDMA.h
-
diff --git a/c/src/lib/libbsp/powerpc/ep1a/start/start.S b/c/src/lib/libbsp/powerpc/ep1a/start/start.S
deleted file mode 100644
index 51596ac418..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/start/start.S
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * This is based on the mvme-crt0.S file from libgloss/rs6000.
- * crt0.S -- startup file for PowerPC systems.
- *
- * (c) 1998, Radstone Technology plc.
- *
- *
- * This is an unpublished work the copyright in which vests
- * in Radstone Technology plc. All rights reserved.
- *
- * The information contained herein is the property of Radstone
- * Technology plc. and is supplied without liability for
- * errors or omissions and no part may be reproduced, used or
- * disclosed except as authorized by contract or other written
- * permission. The copyright and the foregoing
- * restriction on reproduction, use and disclosure extend to
- * all the media in which this information may be
- * embodied.
- *
- * Copyright (c) 1995 Cygnus Support
- *
- * The authors hereby grant permission to use, copy, modify, distribute,
- * and license this software and its documentation for any purpose, provided
- * that existing copyright notices are retained in all copies and that this
- * notice is included verbatim in any distributions. No written agreement,
- * license, or royalty fee is required for any of the authorized uses.
- * Modifications to this software may be copyrighted by their authors
- * and need not follow the licensing terms described here, provided that
- * the new terms are clearly indicated on the first page of each file where
- * they apply.
- */
-/*
-#include <ppc-asm.h>
-#include <bsp.h>
-*/
-
-#include <rtems/asm.h>
-#include <rtems/score/cpu.h>
-#include <libcpu/io.h>
-#include <ppc-asm.h>
-
-#define H0_60X_ICE 0x8000 /* HID0 I-Cache Enable */
-#define H0_60X_DCE 0x4000 /* HID0 D-Cache Enable */
-
- .file "start.s"
-
- .extern FUNC_NAME(atexit)
- .globl FUNC_NAME(__atexit)
- .section ".sdata","aw"
- .align 2
-FUNC_NAME(__atexit): /* tell C's eabi-ctor's we have an atexit function */
- .long FUNC_NAME(atexit)@fixup /* and that it is to register __do_global_dtors */
-
- .section ".fixup","aw"
- .align 2
- .long FUNC_NAME(__atexit)
-
- .text
- .globl __rtems_entry_point
- .type __rtems_entry_point,@function
-__rtems_entry_point:
-
- /* Set MSR */
- /*
- * Enable data and instruction address translation and floating point
- */
- li r3,MSR_IR | MSR_DR | MSR_FP
- mtmsr r3
-
- /* XXX - ADD BACK IN CACHING INSTRUCTIONS */
-
- /* clear bss */
- lis r6,__bss_start@h
- ori r6,r6,__bss_start@l
- lis r7,__bss_end@h
- ori r7,r7,__bss_end@l
-
- cmplw 1,r6,r7
- bc 4,4,.Lbss_done
-
- subf r8,r6,r7 /* number of bytes to zero */
- srwi r9,r8,2 /* number of words to zero */
- mtctr r9
- li r0,0 /* zero to clear memory */
- addi r6,r6,-4 /* adjust so we can use stwu */
-.Lbss_loop:
- stwu r0,4(r6) /* zero bss */
- bdnz .Lbss_loop
-
-.Lbss_done:
-
- /* clear sbss */
- lis r6,__sbss_start@h
- ori r6,r6,__sbss_start@l
- lis r7,__sbss_end@h
- ori r7,r7,__sbss_end@l
-
- cmplw 1,r6,r7
- bc 4,4,.Lsbss_done
-
- subf r8,r6,r7 /* number of bytes to zero */
- srwi r9,r8,2 /* number of words to zero */
- mtctr r9
- li r0,0 /* zero to clear memory */
- addi r6,r6,-4 /* adjust so we can use stwu */
-.Lsbss_loop:
- stwu r0,4(r6) /* zero sbss */
- bdnz .Lsbss_loop
-
-.Lsbss_done:
-
- lis sp,__stack@h
- ori sp,sp,__stack@l
-
- /* set up initial stack frame */
- addi sp,sp,-4 /* make sure we don't overwrite debug mem */
- lis r0,0
- stw r0,0(sp) /* clear back chain */
- stwu sp,-56(sp) /* push another stack frame */
-
- li r3, 0 /* command line */
-
- /* Let her rip */
- bl FUNC_NAME(boot_card)
-
- /*
- * This should never get reached
- */
- /*
- * Return MSR to its reset state
- */
- li r3,0
- mtmsr r3
- isync
-
- /*
- * Call reset entry point
- */
- lis r3,0xfff0
- ori r3,r3,0x100
- mtlr r3
- blr
-.Lstart:
- .size __rtems_entry_point,.Lstart-__rtems_entry_point
-
- .comm environ,4,4
diff --git a/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c b/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c
deleted file mode 100644
index dc675e2332..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c
+++ /dev/null
@@ -1,353 +0,0 @@
-/*
- * This routine does the bulk of the system initialization.
- */
-
-/*
- * COPYRIGHT (c) 1989-2014.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <bsp/consoleIo.h>
-#include <bsp/bootcard.h>
-#include <libcpu/spr.h>
-#include <bsp/residual.h>
-#include <bsp/pci.h>
-#include <bsp/openpic.h>
-#include <bsp/irq.h>
-#include <bsp/VME.h>
-#include <bsp.h>
-#include <libcpu/bat.h>
-#include <libcpu/pte121.h>
-#include <libcpu/cpuIdent.h>
-#include <bsp/vectors.h>
-#include <rtems/powerpc/powerpc.h>
-#include <rtems/counter.h>
-
-extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];
-extern unsigned long __SBSS2_START__[], __SBSS2_END__[];
-
-extern unsigned long __rtems_end[];
-extern void L1_caches_enables(void);
-extern unsigned get_L2CR(void);
-extern void set_L2CR(unsigned);
-extern Triv121PgTbl BSP_pgtbl_setup(void);
-extern void BSP_pgtbl_activate(Triv121PgTbl);
-extern void BSP_vme_config(void);
-extern void ShowBATS(void);
-unsigned int rsPMCQ1Init(void);
-
-uint32_t bsp_clicks_per_usec;
-
-SPR_RW(SPRG1)
-
-uint8_t LightIdx = 0;
-
-extern int RAM_END;
-unsigned int BSP_mem_size = (unsigned int)&RAM_END;
-
-static void BSP_Increment_Light(void)
-{
- uint8_t data;
-
- data = *GENERAL_REGISTER1;
- data &= 0xf0;
- data |= LightIdx++;
- *GENERAL_REGISTER1 = data;
-}
-
-/*
- * Vital Board data Start using DATA RESIDUAL
- */
-uint32_t VME_Slot1 = FALSE;
-
-/*
- * PCI Bus Frequency
- */
-unsigned int BSP_bus_frequency;
-
-/*
- * processor clock frequency
- */
-unsigned int BSP_processor_frequency;
-
-/*
- * Time base divisior (how many tick for 1 second).
- */
-unsigned int BSP_time_base_divisor = 1000; /* XXX - Just a guess */
-
-void BSP_panic(char *s)
-{
- printk("%s PANIC %s\n",_RTEMS_version, s);
- __asm__ __volatile ("sc");
-}
-
-void _BSP_Fatal_error(unsigned int v)
-{
- printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
- __asm__ __volatile ("sc");
-}
-
-int BSP_FLASH_Disable_writes(
- uint32_t area
-)
-{
- unsigned char data;
-
- data = *GENERAL_REGISTER1;
- data |= DISABLE_USER_FLASH;
- *GENERAL_REGISTER1 = data;
-
- return RTEMS_SUCCESSFUL;
-}
-
-int BSP_FLASH_Enable_writes(
- uint32_t area /* IN */
-)
-{
- unsigned char data;
-
- data = *GENERAL_REGISTER1;
- data &= (~DISABLE_USER_FLASH);
- *GENERAL_REGISTER1 = data;
-
- return RTEMS_SUCCESSFUL;
-}
-
-void BSP_FLASH_set_page(
- uint8_t page
-)
-{
- unsigned char data;
-
- /* Set the flash page register. */
- data = *GENERAL_REGISTER2;
- data &= ~(BSP_FLASH_PAGE_MASK);
- data |= 0x80 | (page << BSP_FLASH_PAGE_SHIFT);
- *GENERAL_REGISTER2 = data;
-}
-
-/*
- * bsp_pretasking_hook
- *
- * BSP pretasking hook. Called just before drivers are initialized.
- */
-void bsp_pretasking_hook(void)
-{
- rsPMCQ1Init();
-}
-
-unsigned int EUMBBAR;
-
-static unsigned int get_eumbbar(void)
-{
- register int a, e;
-
- __asm__ volatile( "lis %0,0xfec0; ori %0,%0,0x0000": "=r" (a) );
- __asm__ volatile("sync");
-
- __asm__ volatile("lis %0,0x8000; ori %0,%0,0x0078": "=r"(e) );
- __asm__ volatile("stwbrx %0,0x0,%1": "=r"(e): "r"(a));
- __asm__ volatile("sync");
-
- __asm__ volatile("lis %0,0xfee0; ori %0,%0,0x0000": "=r" (a) );
- __asm__ volatile("sync");
-
- __asm__ volatile("lwbrx %0,0x0,%1": "=r" (e): "r" (a));
- __asm__ volatile("isync");
- return e;
-}
-
-static void Read_ep1a_config_registers( ppc_cpu_id_t myCpu ) {
- unsigned char value;
-
- /*
- * Print out the board and revision.
- */
-
- printk("Board: ");
- printk( get_ppc_cpu_type_name(myCpu) );
-
- value = *BOARD_REVISION_REGISTER2 & HARDWARE_ID_MASK;
- if ( value == HARDWARE_ID_PPC5_EP1A )
- printk(" EP1A ");
- else if ( value == HARDWARE_ID_EP1B )
- printk(" EP1B ");
- else
- printk(" Unknown ");
-
- value = *BOARD_REVISION_REGISTER2&0x1;
- printk("Board ID %08x", value);
- if(value == 0x0){
- VME_Slot1 = TRUE;
- printk("VME Slot 1\n");
- }
- else{
- VME_Slot1 = FALSE;
- printk("\n");
- }
-
- printk("Revision: ");
- value = *BOARD_REVISION_REGISTER1;
- printk("%d%c\n\n", value>>4, 'A'+(value&BUILD_REVISION_MASK) );
-
- /*
- * Get the CPU, XXX frequency
- */
- value = *EQUIPMENT_PRESENT_REGISTER2 & PLL_CFG_MASK;
- switch( value ) {
- case MHZ_33_66_200: /* PCI, MEM, & CPU Frequency */
- BSP_processor_frequency = 200000000;
- BSP_bus_frequency = 33000000;
- break;
- case MHZ_33_100_200: /* PCI, MEM, & CPU Frequency */
- BSP_processor_frequency = 200000000;
- BSP_bus_frequency = 33000000;
- break;
- case MHZ_33_66_266: /* PCI, MEM, & CPU Frequency */
- BSP_processor_frequency = 266000000;
- BSP_bus_frequency = 33000000;
- break;
- case MHZ_33_66_333: /* PCI, MEM, & CPU Frequency */
- BSP_processor_frequency = 333000000;
- BSP_bus_frequency = 33000000;
- break;
- case MHZ_33_100_333: /* PCI, MEM, & CPU Frequency */
- BSP_processor_frequency = 333000000;
- BSP_bus_frequency = 33000000;
- break;
- case MHZ_33_100_350: /* PCI, MEM, & CPU Frequency */
- BSP_processor_frequency = 350000000;
- BSP_bus_frequency = 33000000;
- break;
- default:
- printk("ERROR: Unknown Processor frequency 0x%02x please fill in bspstart.c\n",value);
- BSP_processor_frequency = 350000000;
- BSP_bus_frequency = 33000000;
- break;
- }
-}
-
-/*
- * bsp_start
- *
- * This routine does the bulk of the system initialization.
- */
-void bsp_start( void )
-{
- uintptr_t intrStackStart;
- uintptr_t intrStackSize;
- ppc_cpu_id_t myCpu;
- Triv121PgTbl pt=0; /* R = e; */
-
- /*
- * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
- * function store the result in global variables so that it can be used
- * latter...
- */
- BSP_Increment_Light();
- myCpu = get_ppc_cpu_type();
- get_ppc_cpu_revision();
-
- EUMBBAR = get_eumbbar();
- printk("EUMBBAR 0x%08x\n", EUMBBAR );
-
- /*
- * Note this sets BSP_processor_frequency based upon register settings.
- * It must be done prior to setting up hooks.
- */
- Read_ep1a_config_registers( myCpu );
-
- bsp_clicks_per_usec = BSP_processor_frequency/(BSP_time_base_divisor * 1000);
- rtems_counter_initialize_converter(
- BSP_processor_frequency / (BSP_time_base_divisor / 1000)
- );
-
-ShowBATS();
-#if 0 /* XXX - Add back in cache enable when we get this up and running!! */
- /*
- * enables L1 Cache. Note that the L1_caches_enables() codes checks for
- * relevant CPU type so that the reason why there is no use of myCpu...
- */
- L1_caches_enables();
-#endif
-
- /*
- * Initialize the interrupt related settings.
- */
- intrStackStart = (uintptr_t) __rtems_end;
- intrStackSize = rtems_configuration_get_interrupt_stack_size();
-
- /*
- * Initialize default raw exception hanlders.
- */
- ppc_exc_initialize(intrStackStart, intrStackSize);
-
- /*
- * Init MMU block address translation to enable hardware
- * access
- */
- setdbat(1, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE);
- setdbat(3, 0x90000000, 0x90000000, 0x10000000, IO_PAGE);
-
-
-#ifdef SHOW_MORE_INIT_SETTINGS
- printk("Going to start PCI buses scanning and initialization\n");
-#endif
- pci_initialize();
-
-#ifdef SHOW_MORE_INIT_SETTINGS
- printk("Number of PCI buses found is : %d\n", pci_bus_count());
-#endif
-#ifdef TEST_RAW_EXCEPTION_CODE
- printk("Testing exception handling Part 1\n");
-
- /*
- * Cause a software exception
- */
- __asm__ __volatile ("sc");
-
- /*
- * Check we can still catch exceptions and returned coorectly.
- */
- printk("Testing exception handling Part 2\n");
- __asm__ __volatile ("sc");
-#endif
-
- /*
- * Initalize RTEMS IRQ system
- */
- BSP_rtems_irq_mng_init(0);
-
- /* Activate the page table mappings only after
- * initializing interrupts because the irq_mng_init()
- * routine needs to modify the text
- */
- if (pt) {
-#ifdef SHOW_MORE_INIT_SETTINGS
- printk("Page table setup finished; will activate it NOW...\n");
-#endif
- BSP_pgtbl_activate(pt);
- }
-
- /*
- * Initialize VME bridge - needs working PCI
- * and IRQ subsystems...
- */
-#ifdef SHOW_MORE_INIT_SETTINGS
- printk("Going to initialize VME bridge\n");
-#endif
- /* VME initialization is in a separate file so apps which don't use
- * VME or want a different configuration may link against a customized
- * routine.
- */
- BSP_vme_config();
-
-#ifdef SHOW_MORE_INIT_SETTINGS
- ShowBATS();
- printk("Exit from bspstart\n");
-#endif
-}
diff --git a/c/src/lib/libbsp/powerpc/ep1a/startup/linkcmds b/c/src/lib/libbsp/powerpc/ep1a/startup/linkcmds
deleted file mode 100644
index 69644e37d8..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/startup/linkcmds
+++ /dev/null
@@ -1,208 +0,0 @@
-OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
- "elf32-powerpc")
-
-OUTPUT_ARCH(powerpc)
-ENTRY(_start)
-
-/*
- * Number of Decrementer countdowns per millisecond
- *
- * Calculated by: (66.67 Mhz * 1000) / 4 cycles per click
- */
-
-SECTIONS
-{
- .vectors 0x00100 :
- {
- *(.vectors)
- }
-
- /* Read-only sections, merged into text segment: */
- /* SDS ROM worked at 0x30000 */
- . = 0x30000;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rela.text : { *(.rela.text) }
- .rela.data : { *(.rela.data) }
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- .rela.got1 : { *(.rela.got1) }
- .rela.got2 : { *(.rela.got2) }
- .rela.ctors : { *(.rela.ctors) }
- .rela.dtors : { *(.rela.dtors) }
- .rela.init : { *(.rela.init) }
- .rela.fini : { *(.rela.fini) }
- .rela.bss : { *(.rela.bss) }
- .rela.plt : { *(.rela.plt) }
- .rela.sdata : { *(.rela.sdata2) }
- .rela.sbss : { *(.rela.sbss2) }
- .rela.sdata2 : { *(.rela.sdata2) }
- .rela.sbss2 : { *(.rela.sbss2) }
- .plt : { *(.plt) }
- .text :
- {
- _start = .;
- *(.text*)
- /*
- * Special FreeBSD sysctl sections.
- */
- . = ALIGN (16);
- __start_set_sysctl_set = .;
- *(set_sysctl_*);
- __stop_set_sysctl_set = ABSOLUTE(.);
- *(set_domain_*);
- *(set_pseudo_*);
-
- *(.gnu.linkonce.t.*)
- *(.descriptors)
- /* .gnu.warning sections are handled specially by elf32.em. */
- *(.gnu.warning)
- } =0
- .init : { _init = .; *(.init) }
- .fini : { _fini = .; *(.fini) }
- .rodata : { *(.rodata*) KEEP (*(SORT(.rtemsroset.*))) *(.gnu.linkonce.r*) }
- .rodata1 : { *(.rodata1) }
- .tdata : {
- _TLS_Data_begin = .;
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- *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
- _TLS_BSS_end = .;
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- _TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
- _TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
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- _TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
- _TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
- .eh_frame : { *(.eh_frame) }
- _etext = .;
- PROVIDE (etext = .);
- PROVIDE (__SDATA2_START__ = .);
- .sdata2 : { *(.sdata2) *(.gnu.linkonce.s2.*) }
- .sbss2 : { *(.sbss2) *(.gnu.linkonce.sb2.*) }
- PROVIDE (__SBSS2_START__ = .);
- .sbss2 : { *(.sbss2) }
- PROVIDE (__SBSS2_END__ = .);
- /* Adjust the address for the data segment. We want to adjust up to
- the same address within the page on the next page up. It would
- be more correct to do this:
- . = ALIGN(0x40000) + (ALIGN(8) & (0x40000 - 1));
- The current expression does not correctly handle the case of a
- text segment ending precisely at the end of a page; it causes the
- data segment to skip a page. The above expression does not have
- this problem, but it will currently (2/95) cause BFD to allocate
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- This will prevent the text segment from being shared among
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- . = ALIGN(8) + 0x40000;
- PROVIDE (sdata = .);
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diff --git a/c/src/lib/libbsp/powerpc/ep1a/vme/VMEConfig.h b/c/src/lib/libbsp/powerpc/ep1a/vme/VMEConfig.h
deleted file mode 100644
index 1a57610133..0000000000
--- a/c/src/lib/libbsp/powerpc/ep1a/vme/VMEConfig.h
+++ /dev/null
@@ -1,113 +0,0 @@
-#ifndef RTEMS_BSP_VME_CONFIG_H
-#define RTEMS_BSP_VME_CONFIG_H
-
-/* BSP specific address space configuration parameters */
-
-/*
- * Authorship
- * ----------
- * This software was created by
- * Till Straumann <strauman@slac.stanford.edu>, 2002,
- * Stanford Linear Accelerator Center, Stanford University.
- *
- * Acknowledgement of sponsorship
- * ------------------------------
- * This software was produced by
- * the Stanford Linear Accelerator Center, Stanford University,
- * under Contract DE-AC03-76SFO0515 with the Department of Energy.
- *
- * Government disclaimer of liability
- * ----------------------------------
- * Neither the United States nor the United States Department of Energy,
- * nor any of their employees, makes any warranty, express or implied, or
- * assumes any legal liability or responsibility for the accuracy,
- * completeness, or usefulness of any data, apparatus, product, or process
- * disclosed, or represents that its use would not infringe privately owned
- * rights.
- *
- * Stanford disclaimer of liability
- * --------------------------------
- * Stanford University makes no representations or warranties, express or
- * implied, nor assumes any liability for the use of this software.
- *
- * Stanford disclaimer of copyright
- * --------------------------------
- * Stanford University, owner of the copyright, hereby disclaims its
- * copyright and all other rights in this software. Hence, anyone may
- * freely use it for any purpose without restriction.
- *
- * Maintenance of notices
- * ----------------------
- * In the interest of clarity regarding the origin and status of this
- * SLAC software, this and all the preceding Stanford University notices
- * are to remain affixed to any copy or derivative of this software made
- * or distributed by the recipient and are to be affixed to any copy of
- * software made or distributed by the recipient that contains a copy or
- * derivative of this software.
- *
- * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
- */
-/*
- * The BSP maps VME address ranges into
- * one BAT.
- * NOTE: the BSP (startup/bspstart.c) uses
- * hardcoded window lengths that match this
- * layout:
- *
- * BSP_VME_BAT_IDX defines
- * which BAT to use for mapping the VME bus.
- * If this is undefined, no extra BAT will be
- * configured and VME has to share the available
- * PCI address space with PCI devices.
- */
-#undef BSP_VME_BAT_IDX
-
-#define _VME_A32_WIN0_ON_PCI 0x90000000
-#define _VME_A24_ON_PCI 0x9f000000
-#define _VME_A16_ON_PCI 0x9fff0000
-
-/* start of the A32 window on the VME bus
- * TODO: this should perhaps be a configuration option
- */
-#define _VME_A32_WIN0_ON_VME 0x20000000
-
-/* if _VME_DRAM_OFFSET is defined, the BSP
- * will map our RAM onto the VME bus, starting
- * at _VME_DRAM_OFFSET
- */
-#undef _VME_DRAM_OFFSET
-#define _VME_DRAM_OFFSET 0xc0000000
-#define _VME_DRAM_32_OFFSET1 0x20000000
-#define _VME_DRAM_32_OFFSET2 0x20b00000
-#define _VME_DRAM_24_OFFSET1 0x00000000
-#define _VME_DRAM_24_OFFSET2 0x00100000
-#define _VME_DRAM_16_OFFSET1 0x00000000
-#define _VME_DRAM_16_OFFSET2 0x00008000
-
-#define _VME_A24_SIZE 0x00100000
-#define _VME_A16_SIZE 0x00008000
-
-#undef _VME_CSR_ON_PCI
-
-/* Tell the interrupt manager that the universe driver
- * already called openpic_eoi() and that this step hence
- * must be omitted.
- */
-
-#define BSP_PCI_VME_DRIVER_DOES_EOI
-
-/* don't reference vmeUniverse0PciIrqLine directly here - leave it up to
- * bspstart() to set BSP_vme_bridge_irq. That way, we can generate variants
- * of the BSP with / without the universe driver...
- */
-extern int _BSP_vme_bridge_irq;
-
-extern int BSP_VMEInit(void);
-extern int BSP_VMEIrqMgrInstall(void);
-
-#define BSP_VME_UNIVERSE_INSTALL_IRQ_MGR(err) \
- do { \
- err = vmeUniverseInstallIrqMgr(0,5,1,6); \
- } while (0)
-
-#endif
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-06 17:34:33 +0000