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-rw-r--r--rtemsbsd/powerpc/include/asm/atomic.h109
-rw-r--r--rtemsbsd/powerpc/include/asm/byteorder.h94
-rw-r--r--rtemsbsd/powerpc/include/asm/cache.h37
-rw-r--r--rtemsbsd/powerpc/include/asm/cacheflush.h6
-rw-r--r--rtemsbsd/powerpc/include/asm/fsl_pamu_stash.h0
-rw-r--r--rtemsbsd/powerpc/include/asm/mpc85xx.h51
-rw-r--r--rtemsbsd/powerpc/include/asm/pgtable.h0
-rw-r--r--rtemsbsd/powerpc/include/asm/types.h62
8 files changed, 359 insertions, 0 deletions
diff --git a/rtemsbsd/powerpc/include/asm/atomic.h b/rtemsbsd/powerpc/include/asm/atomic.h
new file mode 100644
index 00000000..0db27562
--- /dev/null
+++ b/rtemsbsd/powerpc/include/asm/atomic.h
@@ -0,0 +1,109 @@
+/*-
+ * Copyright (c) 2010 Isilon Systems, Inc.
+ * Copyright (c) 2010 iX Systems, Inc.
+ * Copyright (c) 2010 Panasas, Inc.
+ * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice unmodified, this list of conditions, and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+#ifndef _ASM_ATOMIC_H_
+#define _ASM_ATOMIC_H_
+
+#include <sys/cdefs.h>
+#include <sys/types.h>
+#include <machine/atomic.h>
+
+typedef struct {
+ volatile u_int counter;
+} atomic_t;
+
+#define ATOMIC_INIT(v) { (v) }
+
+#define atomic_add(i, v) atomic_add_return((i), (v))
+#define atomic_sub(i, v) atomic_sub_return((i), (v))
+#define atomic_inc_return(v) atomic_add_return(1, (v))
+#define atomic_add_negative(i, v) (atomic_add_return((i), (v)) < 0)
+#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0)
+#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
+#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
+#define atomic_dec_return(v) atomic_sub_return(1, (v))
+
+static inline int
+atomic_add_return(int i, atomic_t *v)
+{
+ return i + atomic_fetchadd_int(&v->counter, i);
+}
+
+static inline int
+atomic_sub_return(int i, atomic_t *v)
+{
+ return atomic_fetchadd_int(&v->counter, -i) - i;
+}
+
+static inline void
+atomic_set(atomic_t *v, int i)
+{
+ atomic_store_rel_int(&v->counter, i);
+}
+
+static inline int
+atomic_read(atomic_t *v)
+{
+ return atomic_load_acq_int(&v->counter);
+}
+
+static inline int
+atomic_inc(atomic_t *v)
+{
+ return atomic_fetchadd_int(&v->counter, 1) + 1;
+}
+
+static inline int
+atomic_dec(atomic_t *v)
+{
+ return atomic_fetchadd_int(&v->counter, -1) - 1;
+}
+
+static inline int atomic_add_unless(atomic_t *v, int a, int u)
+{
+ int c, old;
+ c = atomic_read(v);
+ for (;;) {
+ if (unlikely(c == (u)))
+ break;
+ old = atomic_cmpset_int(&v->counter, c, c + (a));
+ if (likely(old == c))
+ break;
+ c = old;
+ }
+ return c != (u);
+}
+
+#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
+
+
+
+
+#endif /* _ASM_ATOMIC_H_ */
diff --git a/rtemsbsd/powerpc/include/asm/byteorder.h b/rtemsbsd/powerpc/include/asm/byteorder.h
new file mode 100644
index 00000000..7168e49b
--- /dev/null
+++ b/rtemsbsd/powerpc/include/asm/byteorder.h
@@ -0,0 +1,94 @@
+/*-
+ * Copyright (c) 2010 Isilon Systems, Inc.
+ * Copyright (c) 2010 iX Systems, Inc.
+ * Copyright (c) 2010 Panasas, Inc.
+ * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice unmodified, this list of conditions, and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+#ifndef _ASM_BYTEORDER_H_
+#define _ASM_BYTEORDER_H_
+
+#include <sys/types.h>
+#include <sys/endian.h>
+#include <asm/types.h>
+
+#if BYTE_ORDER == LITTLE_ENDIAN
+#define __LITTLE_ENDIAN
+#else
+#define __BIG_ENDIAN
+#endif
+
+#define cpu_to_le64 htole64
+#define le64_to_cpu le64toh
+#define cpu_to_le32 htole32
+#define le32_to_cpu le32toh
+#define cpu_to_le16 htole16
+#define le16_to_cpu le16toh
+#define cpu_to_be64 htobe64
+#define be64_to_cpu be64toh
+#define cpu_to_be32 htobe32
+#define be32_to_cpu be32toh
+#define cpu_to_be16 htobe16
+#define be16_to_cpu be16toh
+#define __be16_to_cpu be16toh
+
+#define cpu_to_le64p(x) htole64(*((uint64_t *)x))
+#define le64_to_cpup(x) le64toh(*((uint64_t *)x))
+#define cpu_to_le32p(x) htole32(*((uint32_t *)x))
+#define le32_to_cpup(x) le32toh(*((uint32_t *)x))
+#define cpu_to_le16p(x) htole16(*((uint16_t *)x))
+#define le16_to_cpup(x) le16toh(*((uint16_t *)x))
+#define cpu_to_be64p(x) htobe64(*((uint64_t *)x))
+#define be64_to_cpup(x) be64toh(*((uint64_t *)x))
+#define cpu_to_be32p(x) htobe32(*((uint32_t *)x))
+#define be32_to_cpup(x) be32toh(*((uint32_t *)x))
+#define cpu_to_be16p(x) htobe16(*((uint16_t *)x))
+#define be16_to_cpup(x) be16toh(*((uint16_t *)x))
+
+#define cpu_to_le64s(x) do { *((uint64_t *)x) = cpu_to_le64p((x)) } while (0)
+#define le64_to_cpus(x) do { *((uint64_t *)x) = le64_to_cpup((x)) } while (0)
+#define cpu_to_le32s(x) do { *((uint32_t *)x) = cpu_to_le32p((x)) } while (0)
+#define le32_to_cpus(x) do { *((uint32_t *)x) = le32_to_cpup((x)) } while (0)
+#define cpu_to_le16s(x) do { *((uint16_t *)x) = cpu_to_le16p((x)) } while (0)
+#define le16_to_cpus(x) do { *((uint16_t *)x) = le16_to_cpup((x)) } while (0)
+#define cpu_to_be64s(x) do { *((uint64_t *)x) = cpu_to_be64p((x)) } while (0)
+#define be64_to_cpus(x) do { *((uint64_t *)x) = be64_to_cpup((x)) } while (0)
+#define cpu_to_be32s(x) do { *((uint32_t *)x) = cpu_to_be32p((x)) } while (0)
+#define be32_to_cpus(x) do { *((uint32_t *)x) = be32_to_cpup((x)) } while (0)
+#define cpu_to_be16s(x) do { *((uint16_t *)x) = cpu_to_be16p((x)) } while (0)
+#define be16_to_cpus(x) do { *((uint16_t *)x) = be16_to_cpup((x)) } while (0)
+
+#define swab16 bswap16
+#define swab32 bswap32
+#define swab64 bswap64
+
+static inline void
+be16_add_cpu(u16 *var, u16 val)
+{
+ *var = cpu_to_be16(be16_to_cpu(*var) + val);
+}
+
+#endif /* _ASM_BYTEORDER_H_ */
diff --git a/rtemsbsd/powerpc/include/asm/cache.h b/rtemsbsd/powerpc/include/asm/cache.h
new file mode 100644
index 00000000..9dd32cbe
--- /dev/null
+++ b/rtemsbsd/powerpc/include/asm/cache.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2015 embedded brains GmbH
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __ASM_CACHE_H
+#define __ASM_CACHE_H
+
+#include <rtems/score/cpu.h>
+
+#ifdef PPC_DEFAULT_CACHE_LINE_SIZE
+#define __cacheline_aligned __attribute__((__aligned__(PPC_DEFAULT_CACHE_LINE_SIZE)))
+#define ____cacheline_aligned __cacheline_aligned
+#endif
+
+#endif /* __ASM_CACHE_H */
diff --git a/rtemsbsd/powerpc/include/asm/cacheflush.h b/rtemsbsd/powerpc/include/asm/cacheflush.h
new file mode 100644
index 00000000..5c5bcef5
--- /dev/null
+++ b/rtemsbsd/powerpc/include/asm/cacheflush.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_CACHEFLUSH_H
+#define __ASM_CACHEFLUSH_H
+
+#include <asm/cache.h>
+
+#endif /* __ASM_CACHEFLUSH_H */
diff --git a/rtemsbsd/powerpc/include/asm/fsl_pamu_stash.h b/rtemsbsd/powerpc/include/asm/fsl_pamu_stash.h
new file mode 100644
index 00000000..e69de29b
--- /dev/null
+++ b/rtemsbsd/powerpc/include/asm/fsl_pamu_stash.h
diff --git a/rtemsbsd/powerpc/include/asm/mpc85xx.h b/rtemsbsd/powerpc/include/asm/mpc85xx.h
new file mode 100644
index 00000000..5490b2da
--- /dev/null
+++ b/rtemsbsd/powerpc/include/asm/mpc85xx.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2015 embedded brains GmbH
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ASM_MPC85XX_H
+#define _ASM_MPC85XX_H
+
+#include <libcpu/powerpc-utility.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xfff7ff)
+#define SVR_REV(svr) ((svr) & 0xff)
+#define SVR_MAJ(svr) (((svr) >> 4) & 0xf)
+#define SVR_MIN(svr) ((svr) & 0xf)
+
+#define SVR_B4860 0X868000
+
+#define SPRN_ATBL FSL_EIS_ATBL
+#define SPRN_ATBU FSL_EIS_ATBU
+#define SPRN_SVR FSL_EIS_SVR
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* _ASM_MPC85XX_H */
diff --git a/rtemsbsd/powerpc/include/asm/pgtable.h b/rtemsbsd/powerpc/include/asm/pgtable.h
new file mode 100644
index 00000000..e69de29b
--- /dev/null
+++ b/rtemsbsd/powerpc/include/asm/pgtable.h
diff --git a/rtemsbsd/powerpc/include/asm/types.h b/rtemsbsd/powerpc/include/asm/types.h
new file mode 100644
index 00000000..fb2fd568
--- /dev/null
+++ b/rtemsbsd/powerpc/include/asm/types.h
@@ -0,0 +1,62 @@
+/*-
+ * Copyright (c) 2010 Isilon Systems, Inc.
+ * Copyright (c) 2010 iX Systems, Inc.
+ * Copyright (c) 2010 Panasas, Inc.
+ * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice unmodified, this list of conditions, and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+#ifndef _ASM_TYPES_H_
+#define _ASM_TYPES_H_
+
+#ifdef _KERNEL
+
+typedef uint8_t u8;
+typedef uint8_t __u8;
+typedef uint16_t u16;
+typedef uint16_t __u16;
+typedef uint32_t u32;
+typedef uint32_t __u32;
+typedef uint64_t u64;
+typedef uint64_t __u64;
+
+typedef int8_t s8;
+typedef int8_t __s8;
+typedef int16_t s16;
+typedef int16_t __s16;
+typedef int32_t s32;
+typedef int32_t __s32;
+typedef int64_t s64;
+typedef int64_t __s64;
+
+/* DMA addresses come in generic and 64-bit flavours. */
+typedef vm_paddr_t dma_addr_t;
+typedef vm_paddr_t dma64_addr_t;
+
+typedef unsigned short umode_t;
+
+#endif /* _KERNEL */
+
+#endif /* _ASM_TYPES_H_ */