diff options
Diffstat (limited to 'freebsd/sys/mips/include/machine/cpufunc.h')
| -rw-r--r-- | freebsd/sys/mips/include/machine/cpufunc.h | 137 |
1 files changed, 22 insertions, 115 deletions
diff --git a/freebsd/sys/mips/include/machine/cpufunc.h b/freebsd/sys/mips/include/machine/cpufunc.h index 7945dd38..427aba74 100644 --- a/freebsd/sys/mips/include/machine/cpufunc.h +++ b/freebsd/sys/mips/include/machine/cpufunc.h @@ -69,7 +69,7 @@ static __inline void mips_barrier(void) { -#ifdef CPU_CNMIPS +#if defined(CPU_CNMIPS) || defined(CPU_RMI) || defined(CPU_NLM) __compiler_membar(); #else __asm __volatile (".set noreorder\n\t" @@ -106,18 +106,6 @@ mips_wbflush(void) #endif } -static __inline void -mips_read_membar(void) -{ - /* Nil */ -} - -static __inline void -mips_write_membar(void) -{ - mips_wbflush(); -} - #ifdef _KERNEL /* * XXX @@ -171,6 +159,7 @@ mips_wr_ ## n(uint64_t a0) \ MIPS_RW64_COP0(excpc, MIPS_COP_0_EXC_PC); MIPS_RW64_COP0(entryhi, MIPS_COP_0_TLB_HI); MIPS_RW64_COP0(pagemask, MIPS_COP_0_TLB_PG_MASK); +MIPS_RW64_COP0_SEL(userlocal, MIPS_COP_0_USERLOCAL, 2); #ifdef CPU_CNMIPS MIPS_RW64_COP0_SEL(cvmcount, MIPS_COP_0_COUNT, 6); MIPS_RW64_COP0_SEL(cvmctl, MIPS_COP_0_COUNT, 7); @@ -254,8 +243,13 @@ MIPS_RW32_COP0_SEL(config3, MIPS_COP_0_CONFIG, 3); #ifdef CPU_CNMIPS MIPS_RW32_COP0_SEL(config4, MIPS_COP_0_CONFIG, 4); #endif -#ifdef CPU_NLM +#ifdef BERI_LARGE_TLB +MIPS_RW32_COP0_SEL(config5, MIPS_COP_0_CONFIG, 5); +#endif +#if defined(CPU_NLM) || defined(BERI_LARGE_TLB) MIPS_RW32_COP0_SEL(config6, MIPS_COP_0_CONFIG, 6); +#endif +#if defined(CPU_NLM) || defined(CPU_MIPS1004K) MIPS_RW32_COP0_SEL(config7, MIPS_COP_0_CONFIG, 7); #endif MIPS_RW32_COP0(count, MIPS_COP_0_COUNT); @@ -266,11 +260,16 @@ MIPS_RW32_COP0(cause, MIPS_COP_0_CAUSE); MIPS_RW32_COP0(excpc, MIPS_COP_0_EXC_PC); #endif MIPS_RW32_COP0(status, MIPS_COP_0_STATUS); +MIPS_RW32_COP0_SEL(cmgcrbase, 15, 3); /* XXX: Some of these registers are specific to MIPS32. */ #if !defined(__mips_n64) MIPS_RW32_COP0(entryhi, MIPS_COP_0_TLB_HI); MIPS_RW32_COP0(pagemask, MIPS_COP_0_TLB_PG_MASK); +MIPS_RW32_COP0_SEL(userlocal, MIPS_COP_0_USERLOCAL, 2); +#endif +#ifdef CPU_NLM +MIPS_RW32_COP0_SEL(pagegrain, MIPS_COP_0_TLB_PG_MASK, 1); #endif #if !defined(__mips_n64) && !defined(__mips_n32) /* !PHYSADDR_64_BIT */ MIPS_RW32_COP0(entrylo0, MIPS_COP_0_TLB_LO0); @@ -292,6 +291,7 @@ MIPS_RW32_COP0_SEL(perfcnt0, MIPS_COP_0_PERFCNT, 0); MIPS_RW32_COP0_SEL(perfcnt1, MIPS_COP_0_PERFCNT, 1); MIPS_RW32_COP0_SEL(perfcnt2, MIPS_COP_0_PERFCNT, 2); MIPS_RW32_COP0_SEL(perfcnt3, MIPS_COP_0_PERFCNT, 3); +MIPS_RW32_COP0(hwrena, MIPS_COP_0_HWRENA); #undef MIPS_RW32_COP0 #undef MIPS_RW32_COP0_SEL @@ -351,29 +351,8 @@ breakpoint(void) } #if defined(__GNUC__) && !defined(__mips_o32) -static inline uint64_t -mips3_ld(const volatile uint64_t *va) -{ - uint64_t rv; - -#if defined(_LP64) - rv = *va; -#else - __asm volatile("ld %0,0(%1)" : "=d"(rv) : "r"(va)); -#endif - - return (rv); -} - -static inline void -mips3_sd(volatile uint64_t *va, uint64_t v) -{ -#if defined(_LP64) - *va = v; -#else - __asm volatile("sd %0,0(%1)" :: "r"(v), "r"(va)); -#endif -} +#define mips3_ld(a) (*(const volatile uint64_t *)(a)) +#define mips3_sd(a, v) (*(volatile uint64_t *)(a) = (v)) #else uint64_t mips3_ld(volatile uint64_t *va); void mips3_sd(volatile uint64_t *, uint64_t); @@ -384,87 +363,15 @@ void mips3_sd(volatile uint64_t *, uint64_t); #define readb(va) (*(volatile uint8_t *) (va)) #define readw(va) (*(volatile uint16_t *) (va)) #define readl(va) (*(volatile uint32_t *) (va)) +#if defined(__GNUC__) && !defined(__mips_o32) +#define readq(a) (*(volatile uint64_t *)(a)) +#endif #define writeb(va, d) (*(volatile uint8_t *) (va) = (d)) #define writew(va, d) (*(volatile uint16_t *) (va) = (d)) #define writel(va, d) (*(volatile uint32_t *) (va) = (d)) - -/* - * I/O macros. - */ - -#define outb(a,v) (*(volatile unsigned char*)(a) = (v)) -#define out8(a,v) (*(volatile unsigned char*)(a) = (v)) -#define outw(a,v) (*(volatile unsigned short*)(a) = (v)) -#define out16(a,v) outw(a,v) -#define outl(a,v) (*(volatile unsigned int*)(a) = (v)) -#define out32(a,v) outl(a,v) -#define inb(a) (*(volatile unsigned char*)(a)) -#define in8(a) (*(volatile unsigned char*)(a)) -#define inw(a) (*(volatile unsigned short*)(a)) -#define in16(a) inw(a) -#define inl(a) (*(volatile unsigned int*)(a)) -#define in32(a) inl(a) - -#define out8rb(a,v) (*(volatile unsigned char*)(a) = (v)) -#define out16rb(a,v) (__out16rb((volatile uint16_t *)(a), v)) -#define out32rb(a,v) (__out32rb((volatile uint32_t *)(a), v)) -#define in8rb(a) (*(volatile unsigned char*)(a)) -#define in16rb(a) (__in16rb((volatile uint16_t *)(a))) -#define in32rb(a) (__in32rb((volatile uint32_t *)(a))) - -#define _swap_(x) (((x) >> 24) | ((x) << 24) | \ - (((x) >> 8) & 0xff00) | (((x) & 0xff00) << 8)) - -static __inline void __out32rb(volatile uint32_t *, uint32_t); -static __inline void __out16rb(volatile uint16_t *, uint16_t); -static __inline uint32_t __in32rb(volatile uint32_t *); -static __inline uint16_t __in16rb(volatile uint16_t *); - -static __inline void -__out32rb(volatile uint32_t *a, uint32_t v) -{ - uint32_t _v_ = v; - - _v_ = _swap_(_v_); - out32(a, _v_); -} - -static __inline void -__out16rb(volatile uint16_t *a, uint16_t v) -{ - uint16_t _v_; - - _v_ = ((v >> 8) & 0xff) | (v << 8); - out16(a, _v_); -} - -static __inline uint32_t -__in32rb(volatile uint32_t *a) -{ - uint32_t _v_; - - _v_ = in32(a); - _v_ = _swap_(_v_); - return _v_; -} - -static __inline uint16_t -__in16rb(volatile uint16_t *a) -{ - uint16_t _v_; - - _v_ = in16(a); - _v_ = ((_v_ >> 8) & 0xff) | (_v_ << 8); - return _v_; -} - -void insb(uint8_t *, uint8_t *,int); -void insw(uint16_t *, uint16_t *,int); -void insl(uint32_t *, uint32_t *,int); -void outsb(uint8_t *, const uint8_t *,int); -void outsw(uint16_t *, const uint16_t *,int); -void outsl(uint32_t *, const uint32_t *,int); -u_int loadandclear(volatile u_int *addr); +#if defined(__GNUC__) && !defined(__mips_o32) +#define writeq(va, d) (*(volatile uint64_t *) (va) = (d)) +#endif #endif /* !_MACHINE_CPUFUNC_H_ */ |